SLLSE74D June   2011  – July 2016 TPD12S015A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: ICC
    6. 6.6  Electrical Characteristics: High-Speed ESD Lines: Dx, CLK
    7. 6.7  Electrical Characteristics: DC-DC Converter
    8. 6.8  Electrical Characteristics: Passive Components
    9. 6.9  Electrical Characteristics: Voltage Level Shifter: SCL, SDA Lines (x_A/x_B Ports)
    10. 6.10 Electrical Characteristics: Voltage Level Shifter: CEC Lines (x_A/x_B Ports)
    11. 6.11 Electrical Characteristics: Voltage Level Shifter: HPD Line (x_A/x_B Ports)
    12. 6.12 Electrical Characteristics: LS_OE, CT_CP_HPD
    13. 6.13 Electrical Characteristics: I/O Capacitance
    14. 6.14 Switching Characteristics
    15. 6.15 Switching Characteristics: Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 1.2 V
    16. 6.16 Switching Characteristics: Voltage Level Shifter: CEC Line (x_A & x_B ports); VCCA = 1.2 V
    17. 6.17 Switching Characteristics: Voltage Level Shifter: HPD Line (x_A & x_B ports); VCCA = 1.2 V
    18. 6.18 Switching Characteristics: Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 1.5 V
    19. 6.19 Switching Characteristics: Voltage Level Shifter: CEC Line (x_A & x_B ports); VCCA = 1.5 V
    20. 6.20 Switching Characteristics: Voltage Level Shifter: HPD Line (x_A & x_B ports); VCCA = 1.5 V
    21. 6.21 Switching Characteristics: Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 1.8 V
    22. 6.22 Switching Characteristics: Voltage Level Shifter: CEC Line (x_A & x_B ports); VCCA = 1.8 V
    23. 6.23 Switching Characteristics: Voltage Level Shifter: HPD Line (x_A & x_B ports); VCCA = 1.8 V
    24. 6.24 Switching Characteristics: Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 2.5 V
    25. 6.25 Switching Characteristics: Voltage Level Shifter: CEC Line (x_A & x_B ports); VCCA = 2.5 V
    26. 6.26 Switching Characteristics: Voltage Level Shifter: HPD Line (x_A & x_B ports); VCCA = 2.5 V
    27. 6.27 Switching Characteristics: Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 3.3 V
    28. 6.28 Switching Characteristics: Voltage Level Shifter: CEC Line (x_A & x_B ports); VCCA = 3.3 V
    29. 6.29 Switching Characteristics: Voltage Level Shifter: HPD Line (x_A & x_B ports); VCCA = 3.3 V
    30. 6.30 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rise-Time Accelerators
      2. 8.3.2 Internal Pullup Resistor
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Soft Start
      5. 8.3.5 DDC/CEC Level Shifting Function
      6. 8.3.6 DDC/CEC Level Shifting Function When VCCA = 1.8 V
      7. 8.3.7 CEC Level Shifting Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable
      2. 8.4.2 Power Save Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 CEC, HPD, SCL, SDA Level Shifting Function
        5. 9.2.2.5 ESD
        6. 9.2.2.6 Ground Offset Consideration
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resource
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Conforms to HDMI Compliance Tests Without Any External Components
  • Supports HDMI 1.3 and HDMI 1.4 Data Rate
  • Match Class D and Class C Pin Mapping
  • Excellent Matching Capacitance (0.05 pF) in Each Differential Signal Pair
  • Internal Boost Converter to Generate 5 V From a 2.3-V to 5.5-V Battery Voltage
  • Auto-Direction Sensing Level Shifting in the CEC, SDA, and SCL Paths
  • IEC 61000-4-2 (Level 4) System Level ESD Compliance
  • Improved Drop-In Replacement for the Industry Popular TPD12S015A
  • Industrial Temperature Range: –40°C to 85°C

2 Applications

  • Smart Phones
  • eBooks
  • Tablet PCs
  • Digital Camcorders
  • Portable Game Consoles
  • Digital Still Cameras

SCL_B or SDA_B Buffers of TPD12S015A Driving Long HDMI Cable (750-pF Load)

TPD12S015A DCC_llse74.gif

3 Description

The TPD12S015A device is an integrated HDMI companion chip solution. This device offers 8 low capacitance ESD clamps allowing HDMI 1.3/1.4 data rates. The 0.4-mm pitch DSBGA package pin mapping matches the HDMI Type D or Type C connectors. The integrated ESD clamps in monolithic silicon technology provide good matching between each differential signal pair. This provides an advantage over discrete ESD clamp solutions where variations between ESD clamps degrade the differential signal quality.

The TPD12S015A provides a regulated 5-V output (5VOUT) for sourcing the HDMI power line. The 5VOUT pin supplies minimum 55 mA to the HDMI receiver while meeting the HDMI 5VOUT specifications. The 5VOUT and the hot plug detect (HPD) circuitry are independent of the LS_OE control signal; they are controlled by the CT_CP_HPD pin. This independent control enables the detection scheme (5VOUT + HPD) to be active before enabling the HDMI link. The HPD_B port has a glitch filter to avoid false detection due to the bouncing while inserting the HDMI plug.

There are three noninverting bidirectional translation circuits for the SDA, SCL, and CEC lines; they are controlled by the LS_OE control signal. Each have a common power rail (VCCA) on the A side from 1.1 V to 3.6 V. On the B side, the SCL_B and SDA_B each have an internal 1.75-kΩ pullup connected to the regulated 5-V rail (5VOUT). The SCL and SDA pins meet the I2C specifications, and drive at least 750-pF loads which exceeds the HDMI cable specification. An LDO generates a 3.3-V internal rail for the CEC line operation when LS_OE = H & CT_CP_HPD = H. The CEC_B pin has a 26-kΩ pullup to this internal 3.3-V rail.

The TPD12S015A provides IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving 1.56-mm × 2.76-mm DSBGA package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPD12S015A DSBGA (28) 1.56 mm × 2.76 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Revision History

Changes from C Revision (March 2013) to D Revision

  • Added ESD Ratings table, Thermal Information table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo

Changes from B Revision (April 2012) to C Revision

  • Added Power Derating CurveGo
  • Changed Board Layout sectionGo