SLUSC25A
February 2015 – August 2017
TPS2388
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
4
Revision History
5
Pin Configuration and Functions
Pin Functions
5.1
Detailed Pin Description
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
7.1
Timing Diagrams
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Port Remapping
8.3.2
Port Power Priority
8.3.3
A/D Converter
8.3.4
I2C Watchdog
8.3.5
Foldback Protection
8.4
Device Functional Modes
8.4.1
Port Operating Modes
8.4.1.1
Semiauto
8.4.1.2
Manual
8.4.1.3
Power Off
8.4.2
Detection
8.4.3
Classification
8.4.4
DC Disconnect
8.5
Programming
8.5.1
I2C Serial Interface
8.6
Register Maps
8.6.1
Complete Register Set
8.6.2
INTERRUPT Register
Table 4.
INTERRUPT Register Field Descriptions
8.6.3
INTERRUPT MASK Register
Table 5.
INTERRUPT MASK Register Field Descriptions
8.6.4
POWER EVENT Register
Table 6.
POWER EVENT Register Field Descriptions
8.6.5
DETECTION EVENT Register
Table 7.
DETECTION EVENT Register Field Descriptions
8.6.6
FAULT EVENT Register
Table 8.
FAULT EVENT Register Field Descriptions
8.6.7
START/ILIM EVENT Register
Table 9.
START/ILIM EVENT Register Field Descriptions
8.6.8
SUPPLY EVENT Register
Table 10.
SUPPLY EVENT Register Field Descriptions
8.6.9
PORT 1 STATUS Register
8.6.10
PORT 2 STATUS Register
8.6.11
PORT 3 STATUS Register
8.6.12
PORT 4 STATUS Register
Table 11.
PORT STATUS Register Field Descriptions
8.6.13
POWER STATUS Register
Table 12.
POWER STATUS Register Field Descriptions
8.6.14
Pin Status Register
Table 13.
Pin Status Register Field Descriptions
8.6.15
OPERATING MODE Register
Table 14.
OPERATING MODE Register Field Descriptions
8.6.16
DISCONNECT ENABLE Register
Table 15.
DISCONNECT ENABLE Register Field Descriptions
8.6.17
DETECT/CLASS ENABLE Register
Table 16.
DETECT/CLASS ENABLE Register Field Descriptions
8.6.18
Port Power Priority/ICUT Disable Register Name
Table 17.
Port Power Priority/ICUT Disable Register Field Descriptions
8.6.19
TIMING CONFIGURATION Register
Table 18.
TIMING CONFIGURATION Register Field Descriptions
8.6.20
GENERAL MASK Register
Table 19.
GENERAL MASK Register Field Descriptions
8.6.21
DETECT/CLASS RESTART Register
Table 20.
DETECT/CLASS RESTART Register Field Descriptions
8.6.22
POWER ENABLE Register
Table 21.
POWER ENABLE Register Field Descriptions
8.6.23
RESET Register
Table 22.
RESET Register Field Descriptions
8.6.24
ID Register
Table 23.
ID Register Field Descriptions
8.6.25
Police 21 Configuration Register
8.6.26
Police 43 Configuration Register
Table 24.
Police 43 Register Field Descriptions
8.6.27
IEEE Power Enable Register
Table 25.
IEEE Power Enable Register Field Descriptions
8.6.28
Power-on Fault Register
Table 26.
Power-on Fault Register Field Descriptions
8.6.29
PORT RE-MAPPING Register
Table 27.
PORT RE-MAPPING Register Field Descriptions
8.6.30
Port 21 Multi Bit Priority Register
8.6.31
Port 43 Multi Bit Priority Register
Table 28.
Port 43 Register Field Descriptions
8.6.32
TEMPERATURE Register
Table 29.
TEMPERATURE Register Field Descriptions
8.6.33
INPUT VOLTAGE Register
Table 30.
INPUT VOLTAGE Register Field Descriptions
8.6.34
PORT 1 CURRENT Register
8.6.35
PORT 2 CURRENT Register
8.6.36
PORT 3 CURRENT Register
8.6.37
PORT 4 CURRENT Register
Table 31.
PORT 4 CURRENT Register Field Descriptions
8.6.38
PORT 1 VOLTAGE Register
8.6.39
PORT 2 VOLTAGE Register
8.6.40
PORT 3 VOLTAGE Register
8.6.41
PORT 4 VOLTAGE Register
Table 32.
PORT 4 VOLTAGE Register Field Descriptions
8.6.42
PoE Plus Register
Table 33.
PoE Plus Register Field Descriptions
8.6.43
FIRMWARE REVISION
Table 34.
FIRMWARE REVISION Register Field Descriptions
8.6.44
I2C WATCHDOG Register
Table 35.
I2C WATCHDOG Register Field Descriptions
8.6.45
DEVICE ID Register
Table 36.
DEVICE ID Register Field Descriptions
8.6.46
PORT 1 DETECT RESISTANCE Register
8.6.47
PORT 2 DETECT RESISTANCE Register
8.6.48
PORT 3 DETECT RESISTANCE Register
8.6.49
PORT 4 DETECT RESISTANCE Register
Table 37.
PORT 4 DETECT RESISTANCE Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.1.1
Introduction to PoE
9.1.2
TPS2388 Application
9.1.3
Kelvin Current Sensing Resistor
9.1.4
Connections on Unused Ports
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Power Pin Bypass Capacitors
9.2.2.2
Per Port Components
9.2.2.3
System Level Components (not shown in the schematic diagrams)
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
VDD
10.2
VPWR
11
Layout
11.1
Layout Guidelines
11.1.1
Port Current Kelvin Sensing
11.2
Layout Example
11.2.1
Component Placement and Routing Guidelines
11.2.1.1
Power Pin Bypass Capacitors
11.2.1.2
Per-Port Components
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTQ|56
MPQF168D
Thermal pad, mechanical data (Package|Pins)
RTQ|56
QFND490A
Orderable Information
slusc25a_oa
slusc25a_pm
1
Features
Fully IEEE 802.3at Compliant
Port Re-Mapping
1- and 3-Bit Fast Port Shutdown Input
“Never Fooled” 4-Point Detection
Type 1 and Type 2 PD Classification
Programmable Current Limit With Foldback
DC Disconnect Detection
Flexible Processor Controlled Operating Modes
Semiauto
Manual
14-Bit Port Current and Voltage Monitoring
100-ms Rolling Port Current Averaging
2% Current Sensing Accuracy
0.255-Ω Sense Resistor With Kelvin Sense
I
2
C Communication
I
2
C Watchdog for Failsafe Operation
8- and 16-Bit Access Mode Selectable
–40°C to 125°C Temperature Operation
56-Lead VQFN Package