SLVSCC6A March   2014  – June 2014 TPS2561A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Functions and Configurations
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Overcurrent Conditions
      2. 9.3.2 FAULTx Response
      3. 9.3.3 Thermal Sense
    4. 9.4 Device Functional Mode
      1. 9.4.1 Undervoltage Lockout (UVLO)
      2. 9.4.2 Enable (ENx)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Current Limit
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Determine Design Parameters
          2. 10.2.1.2.2 Programming the Current-Limit Threshold
          3. 10.2.1.2.3 Designing Above a Minimum Current Limit
          4. 10.2.1.2.4 Designing Below a Maximum Current Limit
          5. 10.2.1.2.5 Accounting for Resistor Tolerance
          6. 10.2.1.2.6 Power Dissipation and Junction Temperature
          7. 10.2.1.2.7 Auto-Retry Functionality
          8. 10.2.1.2.8 Two-Level Current-Limit Circuit
      2. 10.2.2 Application Curves
  11. 11Power Supply Requirements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Guidelines

For all applications, a 0.1-µF or greater ceramic bypass capacitor between IN and GND is recommended as close to the device as possible for local noise decoupling. This precaution reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the input to reduce voltage overshoot form exceeding the absolute-maximum voltage of the device during heavy transient conditions.

  • Output capacitance is not required, but placing a high-value electrolytic capacitor on the output pin is recommended when large transient currents are expected on the output.
  • The traces routing the RILIM resistor to the device should be as short as possible to reduce parasitic effects on the current limit accuracy.
  • The PowerPAD™ should be directly connected to PCB ground plane using wide and short copper trace.

12.2 Layout Example

layout_slvscc6.gif