SLVSC11C June   2013  – December 2014 TPS2592AA , TPS2592AL

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Application Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 GND
      2. 9.3.2 VIN
      3. 9.3.3 dV/dT
      4. 9.3.4 BFET
      5. 9.3.5 EN/UVLO
      6. 9.3.6 ILIM
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Simple 3.7-A eFuse Protection for Set Top Boxes
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Step by Step Design Procedure
          2. 10.2.1.2.2 Programming the Current-Limit Threshold: RILIM Selection
          3. 10.2.1.2.3 Undervoltage Lockout Set Point
          4. 10.2.1.2.4 Setting Output Voltage Ramp Time (TdVdT)
            1. 10.2.1.2.4.1 Case 1: Start-up without Load: Only Output Capacitance COUT Draws Current During Start-up
            2. 10.2.1.2.4.2 Case 2: Start-up with Load: Output Capacitance COUT and Load Draws Current During Start-up
        3. 10.2.1.3 Support Component Selection - CVIN
        4. 10.2.1.4 Application Curves
      2. 10.2.2 Inrush and Reverse Current Protection for Hold-Up Capacitor Application (e.g., SSD)
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Programming the Current-Limit Threshold: RILIM Selection
          2. 10.2.2.2.2 Undervoltage Lockout Set Point
          3. 10.2.2.2.3 Setting Output Voltage Ramp Time (TdVdT)
        3. 10.2.2.3 Application Curves
    3. 10.3 Maximum Device Power Dissipation Considerations
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
    2. 11.2 Output Short-Circuit Measurements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • VOPERATING = 4.5 V to 13.8 V, VABSMAX = 20 V
  • Integrated 28-mΩ Pass MOSFET
  • Fixed 15-V Over Voltage Clamp
  • 2-A to 3.7-A Adjustable ILIMIT (±15% Accuracy)
  • Reverse Current Blocking Support
  • Programmable OUT Slew Rate, UVLO
  • Built-in Thermal Shutdown
  • UL 2367 Recognized – File No. 169910*
    • *RILIM ≤ 100 kΩ (4 A max)
  • Safe During Single Point Failure Test (UL60950)
  • Small Foot Print – 10L (3 mm x 3 mm) VSON

2 Applications

  • Adapter Powered Devices
  • HDD and SSD Drives
  • Set Top Boxes
  • Servers / AUX Supplies
  • Fan Control
  • PCI/PCIe Cards

3 Description

The TPS2592Ax family of eFuses is a highly integrated circuit protection and power management solution in a tiny package. The devices use few external components and provide multiple protection modes. They are a robust defense against overloads, shorts circuits, voltage surges, excessive inrush current, and reverse current.

Current limit level can be set with a single external resistor. Over voltage events are limited by internal clamping circuits to a safe fixed maximum, with no external components required.

Applications with particular voltage ramp requirements can set dV/dT with a single capacitor to ensure proper output ramp rates. Many systems, such as SSDs, must not allow holdup capacitance energy to dump back through the FET body diode onto a drooping or shorted input bus. The BFET pin is for such systems. An external NFET can be connected “Back to Back (B2B)” with the TPS2592Ax output and the gate driven by BFET to prevent current flow from load to source (see Figure 40).

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS2592AA VSON (10) 3.00 mm × 3.00 mm
TPS2592AL
  1. For all available packages, see the orderable addendum at the end of the datasheet.

4 Application Schematic

TPS2592AA TPS2592AL top_page_12dec14_lvsc11.gif

Transient: Output Short Circuit

TPS2592AA TPS2592AL page_one_plot_slvsc11.gif