7.3.1 PWM Operation

The main control loop of the TPS54295 is an adaptive on-time pulse width modulation (PWM) controller that supports a proprietary D-CAP2 control mode. D-CAP2 control combines constant on-time control with an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with both low ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output.

At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off when the internal timer expires. This timer is set by the converter’s input voltage (V_INx) and the output voltage (V_OUTx) to maintain a pseudo-fixed frequency over the input voltage range hence it is called adaptive on-time control. The timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the nominal output voltage. An internal ramp is added to the reference voltage to simulate output voltage ripple, eliminating the need for ESR induced output ripple from D-CAP control.

7.3.2 PWM Frequency and Adaptive On-Time Control

TPS54295 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator. The TPS54295 runs with a pseudo-fixed frequency of 700 kHz by using the input voltage and output voltage to set the on-time timer. The on-time is inversely proportional to the input voltage and proportional to the output voltage, therefore, when the duty ratio is V_OUTx / V_INx, the frequency is constant.

7.3.3 Auto-Skip Eco-Mode Control

The TPS54295 is designed with auto-skip Eco-mode to increase light load efficiency. As the output current decreases from heavy load condition, the inductor current also reduces and eventually comes to the point where its ripple valley touches the zero level, which is the boundary between continuous conduction and discontinuous conduction modes. The rectifying MOSFET is turned off when zero inductor current is detected. As the load current further decreases the converter runs into discontinuous conduction mode. The on-time is kept almost half as it was in the continuous conduction mode because it takes longer to discharge the output capacitor with smaller load current to the nominal output voltage. The transition point to the light load operation current (I_OUT(LL)x) can be estimated with Equation 1 with 700 kHz used as f_SW.

Equation 1.

7.3.4 Soft Start and Prebiased Soft Start

The soft-start time is adjustable. When the ENx pin becomes high, 8-µA current begins charging the capacitor which is connected from the SSx pin to GND. Smooth control of the output voltage is maintained during start-up. Calculate the slow-start time with Equation 2. VFBx voltage is 0.765 V and SSx pin source current is 8 µA.

Equation 2.

The TPS54295 contains a unique circuit to prevent current from being pulled from the output during start-up if the output is prebiased. When the soft start commands a voltage higher than the prebias level (internal soft start becomes greater than internal feedback voltage), the controller slowly activates synchronous rectification by starting the first low side FET gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by-cycle basis until it coincides with the time dictated by 1 – D, where D is the duty cycle of the converter. This scheme prevents the initial sinking of the prebiased output, and ensures that the output voltage starts and ramps up smoothly into regulation from prebiased start-up to normal mode operation.

7.3.5 Overcurrent Protection

The output overcurrent protection (OCP) is implemented using a cycle-by-cycle valley detection control circuit. The switch current is monitored by measuring the low-side FET switch voltage between the SWx and PGNDx pins. This voltage is proportional to the switch current and the on-resistance of the FET. To improve the measurement accuracy, the voltage sensing is temperature compensated.

During the ON time of the high-side FET switch, the switch current increases at a linear rate determined by V_INx, V_OUTx, the ON time, and the output inductor value. During the ON time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current (I_OUTx). If the sensed voltage on the low-side FET is above the voltage proportional to the current limit, the converter keeps the low-side switch on until the measured voltage falls below the voltage corresponding to the current limit and a new switching cycle begins. In subsequent switching cycles, the on-time is set to the value determined for CCM and the current is monitored in the same manner.

Following are some important considerations for this type of overcurrent protection. The load current is one half of the peak-to-peak inductor current higher than the overcurrent threshold. Also when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter. When the overcurrent condition is removed, the output voltage returns to the regulated value. This protection is non-latching.

7.3.6 Overvoltage and Undervoltage Protection

TPS54295 monitors the resistor divided feedback voltage to detect overvoltage and undervoltage. If the feedback voltage is higher than 120% of the reference voltage, the OVP comparator output goes high and the circuit latches both the high-side MOSFET driver and the low-side MOSFET driver off. When the feedback voltage is lower than 68% of the reference voltage, the UVP comparator output goes high and an internal UVP delay counter begins counting. After 1.5 ms, TPS54295 latches OFF both the high-side MOSFET and the low-side MOSFET drivers. This function is enabled approximately 1.7 times the soft-start time after power on. The OVP and UVP latch off is reset when EN is toggled.

7.3.7 UVLO Protection

Undervoltage lockout protection (UVLO) monitors the voltage of the VREG5 pin. When the VREG5 voltage is lower than the UVLO threshold, the TPS54295 shuts down. As soon as the voltage increases above the UVLO threshold, the converter starts again.

7.3.8 Thermal Shutdown

TPS54295 monitors its temperature. If the temperature exceeds the threshold value (typically 155°C), the device shuts down. When the temperature falls below the threshold, the IC starts again.

When VIN1 starts up and VREG5 output voltage is below its nominal value, the thermal shutdown threshold is lower than 155°C. As long as VIN1 rises, T_J must be kept below 110°C.

7.4.1 Normal Operation

When the input voltage is above the UVLO threshold and the EN voltage is above the enable threshold, the TPS54295 can operate in the normal switching modes. Normal continuous conduction mode (CCM) occurs when the minimum switch current is above 0 A. In CCM, the TPS54295 operates at a quasi-fixed frequency of 700 kHz while V_OUT1 = V_OUT2 = 3.3 V.

7.4.2 Eco-Mode Operation

When the TPS54295 is in the normal CCM operating mode and the switch current falls to 0 A, the TPS54295 begins operating in pulse skipping Eco-mode. Each switching cycle is followed by a period of energy saving sleep time. The sleep time ends when the VFB voltage falls below the Eco-mode threshold voltage. As the output current decreases, the perceived time between switching pulses increases.

7.4.3 Standby Operation

When the TPS54295 is operating in either normal CCM or Eco-mode, it may be placed in standby mode by asserting the EN pin low.