SLVSB01D October   2011  – August 2016 TPS54295

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation
      2. 7.3.2 PWM Frequency and Adaptive On-Time Control
      3. 7.3.3 Auto-Skip Eco-Mode Control
      4. 7.3.4 Soft Start and Prebiased Soft Start
      5. 7.3.5 Overcurrent Protection
      6. 7.3.6 Overvoltage and Undervoltage Protection
      7. 7.3.7 UVLO Protection
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Eco-Mode Operation
      3. 7.4.3 Standby Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
        5. 8.2.2.5 VREG5 Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Input voltage VIN1, VIN2, EN1, EN2 –0.3 20 V
VBST1, VBST2 –0.3 26
VBST1, VBST2 (10-ns transient) –0.3 28
VBST1 – SW1 , VBST2 – SW2 –0.3 6.5
VFB1, VFB2 –0.3 6.5
SW1, SW2 –2 20
SW1, SW2 (10-ns transient) –3 22
Output voltage VREG5, SS1, SS2 –0.3 6.5 V
PGND1, PGND2 –0.3 0.3
Junction temperature, TJ –40 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to IC GND terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply input voltage VIN1, VIN2 4.5 18 V
Input voltage VBST1, VBST2 –0.1 24 V
VBST1, VBST2 (10-ns transient) –0.1 27
VBST1 – SW1, VBST2 – SW2 –0.1 5.7
VFB1, VFB2 –0.1 5.7
EN1, EN2 –0.1 18
SW1, SW2 –1 18
SW1, SW2 (10-ns transient) –3 21
Output voltage VREG5, SS1, SS2 –0.1 5.7 V
PGND1, PGND2 –0.1 0.1
VO1, VO2 0.76 7
TJ Operating Junction Temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) TPS54295 UNIT
PWP (HTSSOP) RSA (VQFN)
16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 47.5 34.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 27.1 40 °C/W
RθJB Junction-to-board thermal resistance 20.8 11.8 °C/W
ψJT Junction-to-top characterization parameter 1 0.7 °C/W
ψJB Junction-to-board characterization parameter 20.6 11.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.7 3.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over recommended free-air temperature range, VIN = 12 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
IIN VINx supply current TA = 25°C, VEN1 = VEN2 = 5 V, VVFB1 = VVFB2 = 0.8 V 1300 2000 µA
IVINSDN VINx shutdown current TA = 25°C, VEN1 = VEN2 = 0 V 80 150 µA
FEEDBACK VOLTAGE
VVFBTHLx VFBx threshold voltage TA = 25°C, VCH1 = 3.3 V, VCH2 = 1.5 V 758 765 773 mV
TCVFBx Temperature coefficient On the basis of 25°C(1) –115 115 ppm/℃
IVFBx VFBx Input Current VVFBx = 0.8 V, TA = 25°C –0.35 0.2 0.35 µA
VREG5 OUTPUT
VVREG5 VREG5 output voltage TA = 25°C, 6 V < VIN1 < 18 V, IVREG5 = 5 mA 5.5 V
IVREG5 Output current VIN1 = 6 V, VVREG5 = 4 V, TA = 25°C(1) 75 mA
MOSFETs
rDS(ON)H High-side switch resistance TA = 25℃, VVBSTx – VSWx = 5.5 V (1) 150 mΩ
rDS(ON)L Low-side switch resistance TA = 25℃ (1) 100 mΩ
ON-TIME TIMER CONTROL
TON1 SW1 ON time VSW1 = 12 V, VOUT1 = 1.2 V 165 ns
TON2 SW2 ON time VSW2 = 12 V, VOUT2 = 1.2 V 165 ns
TOFF1 SW1 minimum OFF time TA = 25℃, VVFB1 = 0.7 V(1) 220 ns
TOFF2 SW2 minimum OFF time TA = 25℃, VVFB2 = 0.7 V(1) 220 ns
SOFT START
ISSC SSx charge current VSSx = 0.5 V, TA = 25℃ –8.4 –8 –7.6 µA
TCISSC ISSC temperature coefficient On the basis of 25°C(1) (PWP) –4 3 nA/°C
On the basis of 25°C(1) (RSA) –4 5
ISSD SSx discharge current VSSx = 0.5 V 3 7 10 mA
UVLO
VUVREG5 VREG5 UVLO threshold VREG5 rising 3.83 V
Hysteresis 0.6
LOGIC THRESHOLDS
VENxH ENx H-level threshold voltage 2 V
VENxL ENx L-level threshold voltage 0.4 V
RENx_IN ENx input resistance VENx = 12 V 225 450 900 kΩ
CURRENT LIMITS
IOCL Current limit LOUT = 2.2 µH(1) 2.7 3.9 4.5 A
OUTPUT UNDERVOLTAGE AND OVERVOLTAGE PROTECTION (UVP, OVP)
VOVP Output OVP trip threshold measured on VFBx 115% 120% 125%
TOVPDEL Output OVP prop delay 3 10 µs
VUVP Output UVP trip threshold measured on VFBx 63% 68% 73%
TUVPDEL Output UVP delay time 1.5 ms
TUVPEN Output UVP enable delay UVP enable delay and soft-start time × 1.4 × 1.7 × 2
THERMAL SHUTDOWN
TSD Thermal shutdown threshold Shutdown temperature(1) 155 °C
Hysteresis(1) 25
(1) Ensured by design. Not production tested.

6.6 Typical Characteristics

One output is enabled unless otherwise noted. VI = VIN1 or VIN2. VIN = 12 V, TA = 25°C (unless otherwise noted).
TPS54295 icc_tj_lvsb01.gif Figure 1. Input Current vs Junction Temperature
TPS54295 icc_vi_lvsb01.gif
VENx = 12 V
Figure 3. EN Current vs EN Voltage
TPS54295 vo2_io_lvsb01.gif
VOUT2 = 1.5 V
Figure 5. Output Voltage vs Output Current
TPS54295 vo_vi_lvsb01.gif
VOUT2 = 1.5 V
Figure 7. Output Voltage vs Input Voltage
TPS54295 eff2_io_lvsb01.gif
VOUT1 = 3.3 V
Figure 9. Efficiency vs Output Current
TPS54295 eff4_io_lvsb01.gif
VOUT2 = 1.5 V
Figure 11. Efficiency vs Output Current
TPS54295 fsw2_vi_lvsb01.gif
VOUT2 = 1.5 V
Figure 13. Switching Frequency vs Input Voltage
TPS54295 fsw2_io_lvsb01.gif
VOUT2 = 1.5 V
Figure 15. Switching Frequency vs Output Current
TPS54295 sdcur_tj_lvsb01.gif Figure 2. Input Shutdown Current vs Junction Temperature
TPS54295 vo_io_lvsb01.gif
VOUT1 = 3.3 V
Figure 4. Output Voltage vs Output Current
TPS54295 vo3_io_lvsb01.gif
VOUT1 = 3.3 V
Figure 6. Output Voltage vs Input Voltage
TPS54295 eff_io_lvsb01.gif
VOUT1 = 3.3 V
Figure 8. Efficiency vs Output Current
TPS54295 eff3_io_lvsb01.gif
VOUT1 = 1.5 V
Figure 10. Efficiency vs Output Current
TPS54295 fsw_vi_lvsb01.gif
VOUT1 = 3.3 V
Figure 12. Switching Frequency vs Input Voltage
TPS54295 fsw_io_lvsb01.gif
VOUT1 = 3.3 V
Figure 14. Switching Frequency vs Output Current