SLVSCQ8A December   2015  – April 2016 TPS54A20

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Frequency Selection
      2. 7.3.2  External Clock Syncronization
      3. 7.3.3  Adjusting the Output Voltage
      4. 7.3.4  Soft Start
      5. 7.3.5  Startup into Pre-biased Outputs
      6. 7.3.6  Power Good (PGOOD)
      7. 7.3.7  Overcurrent Protection
      8. 7.3.8  Light Load Operation
      9. 7.3.9  Output Undervoltage/Overvoltage Protection
      10. 7.3.10 Input Undervoltage/Overvoltage Lockout
      11. 7.3.11 Enable and Adjusting Undervoltage Lockout
      12. 7.3.12 Series Capacitor Monitoring
        1. 7.3.12.1 Dropping Below 35% Threshold
        2. 7.3.12.2 Rising Above 65% Threshold
      13. 7.3.13 Thermal Shutdown
      14. 7.3.14 Phase A Power Stage
      15. 7.3.15 Phase B Power Stage
      16. 7.3.16 Internal Gate Drive Regulator
      17. 7.3.17 Voltage Feed Forward
      18. 7.3.18 Internal Oscillator
      19. 7.3.19 Pulse Frequency Detector
      20. 7.3.20 On-Time Generator
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Two-Phase Series Capacitor Buck Converter Topology
      2. 8.1.2 Converter Switch Configurations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Output Voltage
        2. 8.2.2.2  Switching Frequency
        3. 8.2.2.3  On-Time
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Input Capacitor Selection
        7. 8.2.2.7  Series Capacitor Selection
        8. 8.2.2.8  Soft-Start Time Selection
        9. 8.2.2.9  Bootstrap Capacitor Selection
        10. 8.2.2.10 Gate Drive Capacitor Selection
        11. 8.2.2.11 Under Voltage Lockout Set Point
        12. 8.2.2.12 Current Limit Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RNJ|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

The TPS54A20 is designed to operate from an input voltage supply range between 8V and 14V. This supply voltage must be well regulated. Power supplies must be well bypassed for proper electrical performance. This includes a minimum of one 4.7μF (after de-rating) ceramic capacitor, type X5R or better, from VIN to PGND. Additional local ceramic bypass capacitance may be required in systems with small input ripple specifications, in addition to bulk capacitance, if the TPS54A20 device is located more than a few inches away from its input power supply. In systems with an auxiliary power rail available, the power stage input, VIN, and the gate driver power input, VG+, may operate from separate input supplies. See the recommendations in the Layout section for further explanation.