SLVSAV0B April   2011  – October 2014 TPS55010

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Rating
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency PWM Control
      2. 8.3.2  Half Bridge and Bootstrap Voltage
      3. 8.3.3  Error Amplifier
      4. 8.3.4  Voltage Reference
      5. 8.3.5  Adjusting the Output Voltage
      6. 8.3.6  Enable and Adjusting Undervoltage Lockout
      7. 8.3.7  Adjusting Slow Start Time
      8. 8.3.8  Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      9. 8.3.9  How to Interface to RT/CLK Pin
      10. 8.3.10 Overcurrent Protection
      11. 8.3.11 Reverse Overcurrent Protection
      12. 8.3.12 FAULT Pin
      13. 8.3.13 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation of the Fly-Buck™ Converter
  9. Application And Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1  Design Guide - Step-by-Step Design Procedure
      2. 9.2.2  Primary Side Voltage
      3. 9.2.3  Voltage Feedback
        1. 9.2.3.1 Turns Ratio
      4. 9.2.4  Selecting the Switching Frequency and Primary Inductance
      5. 9.2.5  Primary Side Capacitor
      6. 9.2.6  Secondary Side Diode
      7. 9.2.7  Secondary Side Capacitor
      8. 9.2.8  Input Capacitor
      9. 9.2.9  Y - Capacitor
      10. 9.2.10 Slow Start Capacitor
      11. 9.2.11 Bootstrap Capacitor Selection
      12. 9.2.12 UVLO Resistors
      13. 9.2.13 Compensation
      14. 9.2.14 Design Tips
      15. 9.2.15 How to Specify a Fly-Buck Transformer
      16. 9.2.16 Application Curves
    3. 9.3 Typical Application, Dual Output
      1. 9.3.1 Design Guide Requirements
      2. 9.3.2 Detailed Design Procedures
        1. 9.3.2.1 Primary Side Voltage for Dual Output
        2. 9.3.2.2 Turns Ratio
        3. 9.3.2.3 Voltage Feedback
        4. 9.3.2.4 Selecting the Switching Frequency and Primary Inductance
          1. 9.3.2.4.1 Primary Side Capacitor
          2. 9.3.2.4.2 Secondary Side Diode
          3. 9.3.2.4.3 Secondary Side Capacitor
          4. 9.3.2.4.4 Input Capacitor
        5. 9.3.2.5 Compensation
        6. 9.3.2.6 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

Layout is a critical portion of good power supply design. There are several signal paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies performance. Care should be taken to minimize the loop area formed by the bypass capacitor connections and the VIN pins. See Figure 55 for a PCB layout example. The GND pins should be tied directly to the thermal pad under the IC. The power pad should be connected to any internal PCB ground planes using multiple vias directly under the IC. Additional vias can be used to connect the top side ground area to the internal planes near the input and output capacitors.

  • Locate the input bypass capacitor as close to the IC as possible.
  • The PH pin should be routed to the primary side of the transformer.
  • Since the PH connection is the switching node, the transformer should be located close to the PH pins, and the area of the PCB conductor minimized to prevent excessive capacitive coupling.
  • The boot capacitor must also be located close to the device.
  • The sensitive analog ground connections for the feedback voltage divider, compensation component, slow start capacitor and frequency set resistor should be connected to a separate analog ground trace as shown.
  • The RT/CLK pin is particularly sensitive to noise so the RT resistor should be located as close as possible to the IC and routed with minimal lengths of trace. Avoid connecting y capacitor on nodes which experience high dv/dt.

11.2 Layout Example

TPS55010 pcb_layout_lvsav0.gif Figure 55. PCB Layout Example