SLVSDD1E December   2017  – January 2019 TPS62800 , TPS62801 , TPS62802 , TPS62806 , TPS62807 , TPS62808

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
      2.      Efficiency vs. IOUT at 1.2VOUT
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Smart Enable and Shutdown (EN)
      2. 8.3.2 Softstart
      3. 8.3.3 VSEL/MODE Pin
        1. 8.3.3.1 Output Voltage Selection (R2D Converter)
        2. 8.3.3.2 Mode Selection: Power Save Mode / Forced PWM Operation
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Switch Current Limit / Short Circuit Protection
      6. 8.3.6 Thermal Shutdown
      7. 8.3.7 Output Voltage Discharge
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Save Mode Operation
      2. 8.4.2 Forced PWM Mode Operation
      3. 8.4.3 100% Mode Operation
      4. 8.4.4 Optimized Transient Performance from PWM to PFM Mode Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Output Capacitor Selection
        4. 9.2.2.4 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Custom Design With WEBENCH® Tools
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power Save Mode Operation

The DCS-Control™ topology supports Power Save Mode operation. At light loads the device operates in PFM (Pulse Frequency Modulation) mode that generates a single switching pulse to ramp up the inductor current and recharge the output capacitor, followed by a sleep period where most of the internal circuits are shutdown to achieve lowest operating quiescent current. During this time, the load current is supported by the output capacitor. The duration of the sleep period depends on the load current and the inductor peak current. During the sleep periods, the current consumption is reduced to typically 2.3 µA. This low quiescent current consumption is achieved by an ultra low power voltage reference, an integrated high impedance feedback divider network and an optimized Power Save Mode operation.

In PFM Mode, the switching frequency varies linearly with the load current. At medium and high load conditions, the device enters automatically PWM (Pulse Width Modulation) mode and operates in continuous conduction mode with a nominal switch frequency fsw of typically 4MHz or 1.5MHz. The switching frequency in PWM mode is controlled and depends on VIN and VOUT. The boundary between PWM and PFM mode is when the inductor current becomes discontinuous.

If the load current decreases, the converter seamlessly enters PFM mode to maintain high efficiency down to very light loads. Since DCS-Control™ supports both operation modes within one single building block, the transition from PWM to PFM Mode is seamless with minimum output voltage ripple.