SLVS754D March   2007  – January 2015 TPS65053

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Ratings
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
        1. 7.3.1.1 Dynamic Voltage Positioning
        2. 7.3.1.2 Soft Start
        3. 7.3.1.3 100% Duty Cycle Low Dropout Operation
        4. 7.3.1.4 Undervoltage Lockout
      2. 7.3.2 Mode Selection
      3. 7.3.3 Enable
      4. 7.3.4 Dynamic Ouput Voltage Scaling
      5. 7.3.5 RESET on the TPS65053x
      6. 7.3.6 RESET Generation and Output Monitoring on the TPS65058
      7. 7.3.7 Short-Circuit Protection
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 DCDC Output Voltage Setting
        2. 8.2.2.2 LDO Output Voltage Setting
        3. 8.2.2.3 Low Dropout Voltage Regulators
        4. 8.2.2.4 DCDC Output Filter Design (Inductor and Output Capacitor)
          1. 8.2.2.4.1 Inductor Selection
          2. 8.2.2.4.2 Output Capacitor Selection
        5. 8.2.2.5 DCDC Input Capacitor Selection
        6. 8.2.2.6 Sequencing and Output Logic Signal RESET
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Links
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Up To 95% Efficiency
  • Output Current for DC-DC Converters:
    • TPS65053: DCDC1 = 1 A; DCDC2 = 0.6 A
    • TPS650531, TPS650532: DCDC1 = 1 A; DCDC2 = 1 A
    • TPS65058: DCDC1 = 0.6 A; DCDC2 = 1 A
  • TPS65053, TPS650531, TPS650532: DC-DC Converters Externally Adjustable
  • TPS65058: DCDC1 Fixed at 3.3V, DCDC2 selectable between 1.8V and 1.2V with Dynamic Voltage Scaling for Core Processor Supply
  • VIN Range for DC-DC Converters
    From 2.5 V to 6 V
  • 2.25-MHz Fixed Frequency Operation
  • Power Save Mode at Light Load Current
  • 180° Out-of-Phase Operation
  • Output Voltage Accuracy in PWM Mode ±1%
  • Total Typical 32-μA Quiescent Current for Both DC-DC Converters
  • 100% Duty Cycle for Lowest Dropout
  • One General-Purpose 400-mA LDO
  • Two General-Purpose 200-mA LDOs
  • VIN Range for LDOs from 1.5 V to 6.5 V
  • Output Voltage for LDOs:
    • TPS65053 / TPS650531 / TPS650532: VLDO1 and VLDO2 Externally Adjustable, VLDO3 = 1.3 V / 1.2 V / 1.5 V
    • TPS65058: VLDO1 = 3.3 V, VLDO2 selectable between 1.8V and 1.2V, VLDO2 selectable between 1.8V and 1.3V

2 Applications

  • Cell Phones, Smart Phones
  • WLAN
  • PDAs, Pocket PCs, GPS
  • OMAP™ and Low-Power DSP Supply
  • Portable Media Players
  • Digital Cameras
  • Satellite Radio Modules

3 Description

The TPS6505xx family of devices are integrated power management ICs for applications powered by one Li-Ion or Li-Polymer cell, which require multiple power rails. The TPS6505xx devices provide two highly efficient, 2.25-MHz step-down converters targeted at providing the core voltage and I/O voltage in a processor-based system. Both step-down converters enter a low power mode at light load for maximum efficiency across the widest possible range of load currents. For low noise applications the devices can be forced into fixed frequency PWM mode by pulling the MODE pin high. The TPS6505xx devices also integrate one 400-mA LDO and two 200-mA LDO voltage regulators. Each LDO operates with an input voltage range between 1.5 V and 6.5 V allowing them to be supplied from one of the step-down converters or directly from the main battery.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS65053 VQFN (24) 4.00 mm x 4.00 mm
TPS650531
TPS650532
TPS65058
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Typical Application Schematic

fbd_lvs754.gif