SLVSCK1A April   2014  – April 2014 TPS65980

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 2.5-V to 15.75-V Input
      2. 8.3.2 3.3-V Outputs
      3. 8.3.3 Thermal Shutdown
      4. 8.3.4 Cable Power Out Current Limit
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with 2.5 V ≤ VTBT_IN ≤ 3.4 V
      2. 8.4.2 Operation with 10 V ≤ VTBT_IN ≤ 15.75 V
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Single-Port Bus-Powered Thunderbolt™ Device
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Performance Plots
      2. 9.2.2 Dual-Port Bus-Powered Thunderbolt™ Device
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Performance Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

VQFN (RHF) 24-Pin
TOP VIEW
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VQFN (RHF) 24-Pin
BOTTOM
po_bot_slvsck1.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 SS ANALOG Soft Start Capacitance. This pin sets the soft start ramp rate when the TBT_IN voltage ramps from 0V to high voltage.
2, 3, 4 GND GND Device Ground
5 HV_OK OUTPUT High Voltage Present Indicator. This pin indicates that a high voltage is present on TBT_IN. The output asserts high when the TBT_IN pin is above the VHVT voltage and the RESET output is asserting high.
6 RESET OUTPUT Reset output indicator. This pin asserts low when TBT_OUT is in under-voltage.
7 CBL_OUT PWROUT Current Limited Power Output to Thunderbolt™ Cable. This pin supplies power to the Thunderbolt™ cable. The current limit of this pin is set by the CBL_ILIMIT pin.
8 CBL_ILIMIT INPUT Current Limit Set. Logic input that sets the current limit state on the CBL_OUT pin. Tie pin to TBT_OUT for a logic high input.
9 DEV_EN INPUT Device Enable Input. When input pin is high, DEV_OUT is high impedance. When input pin low, DEV_OUT is connected to TBT_OUT.
10 GND ANALOG Device Ground
11, 12 TBT_OUT PWROUT Power Output to Thunderbolt™ circuitry. This pin supplies power to the Thunderbolt™ controller.
13, 14 DEV_OUT PWROUT Power Output to peripheral device. This pin supplies power to circuitry not associated with the Thunderbolt™ controller or the Thunderbolt™ cable. It is intended to supply power to the peripheral device main function.
15 CPP ANALOG Charge Pump Capacitance Positive Output
16 CPN ANALOG Charge Pump Capacitance Negative Output
17, 18 PGND GND Buck Controller Power Ground
19, 20 SW ANALOG Buck Controller Switch Output
21 BOOT ANALOG Buck Controller Bootstrap
22, 23 TBT_IN PWRIN Power Input from Thunderbolt™ Cable. This pin is the power supply to the device.
24 COMP ANALOG Buck Converter Compensation. This pin provides compensation to the buck converter feedback loop.