SBVS135J June   2010  – January 2018 TPS7A80

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Start-Up
      4. 7.3.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Dropout Voltage
        2. 8.2.1.2 Minimum Load
        3. 8.2.1.3 Input and Output Capacitor Requirements
        4. 8.2.1.4 Transient Response
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Noise
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
      2. 10.1.2 Thermal Considerations
      3. 10.1.3 Power Dissipation
      4. 10.1.4 Estimating Junction Temperature
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

DRB Package
8-Pin VSON
Top View
TPS7A80 po_bvs135.gif

Pin Functions

PINI/ODESCRIPTION
NAMENO.
EN 5 I Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. Refer to Shutdown in the Application and Implementation section for more details. EN must not be left floating and can be connected to IN if not used.
FB/SNS 3 I FB (adjustable version only): This pin is the input to the control loop error amplifier and is used to set the output voltage of the device.
SNS (fixed versions only): Output voltage sense pin.(1)
GND 4, pad Ground.
IN 7, 8 I Unregulated input supply.
OUT 1, 2 O Regulator output. A 4.7-μF or larger capacitor of any type is required for stability.
NR 6 Connect an external capacitor between this pin and ground to reduce output noise to very low levels. Also, the capacitor slows down the VOUT ramp (RC softstart).
In order to minimize the trace resistive drop, connect the SNS pin close to the load, and make sure that the trace inductance to the load is also minimized.