SLVSCK0A April   2014  – June 2014 TPS7A8101-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Application Circuit
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Internal Current-Limit
      2. 8.3.2 Shutdown
      3. 8.3.3 Startup
      4. 8.3.4 Undervoltage Lockout (UVLO)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Dropout Voltage
        2. 9.2.1.2 Minimum Load
        3. 9.2.1.3 Input And Output Capacitor Requirements
        4. 9.2.1.4 Transient Response
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Noise
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Layout Recommendations To Improve PSRR And Noise Performance
    2. 11.2 Layout Example
    3. 11.3 Thermal Information
      1. 11.3.1 Thermal Protection
      2. 11.3.2 Package Mounting
      3. 11.3.3 Power Dissipation
      4. 11.3.4 Estimating Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

8-Pin SON
DRB Package
(Top View)
po_slvsck0.gif

Pin Functions

PIN DESCRIPTION
NAME NO.
EN 5 Driving this pin high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. See to the Shutdown section for more details. The EN pin must not be left floating and can be connected to the IN pin if not used.
FB/SNS 3 This pin is the input to the error amplifier and is used to set the output voltage of the device.
GND 4 Ground
IN 7 Unregulated input supply
8
NR 6 Connect an external capacitor between this pin and ground to reduce output noise to very low levels. The capacitor also slows down the VO ramp (RC soft start).
OUT 1 Regulator output. A 4.7-μF or larger ceramic capacitor is required for stability.
2
Thermal Pad — The Thermal Pad should be connected to GND.