SBVS233A January   2016  – January 2016 TPS7A84

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configurations and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Low-Noise, High-PSRR Output
      2. 7.3.2  Integrated Resistance Network (ANY-OUT)
      3. 7.3.3  Bias Rail
      4. 7.3.4  Power-Good Function
      5. 7.3.5  Programmable Soft-Start
      6. 7.3.6  Internal Current Limit (ILIM)
      7. 7.3.7  Enable
      8. 7.3.8  Active Discharge Circuit
      9. 7.3.9  Undervoltage Lockout (UVLO)
      10. 7.3.10 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with 1.1 V ≤ VIN < 1.4 V
      2. 7.4.2 Operation with 1.4 V ≤ VIN ≤ 6.5 V
      3. 7.4.3 Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Recommended Capacitor Types
      2. 8.1.2  Input and Output Capacitor Requirements (CIN and COUT)
      3. 8.1.3  Noise-Reduction and Soft-Start Capacitor (CNR/SS)
      4. 8.1.4  Feed-Forward Capacitor (CFF)
      5. 8.1.5  Optimizing Noise and PSRR
      6. 8.1.6  Soft-Start and In-Rush Current
      7. 8.1.7  ANY-OUT Programmable Output Voltage
      8. 8.1.8  ANY-OUT Operation
      9. 8.1.9  Increasing ANY-OUT Resolution for LILO Conditions
      10. 8.1.10 Adjustable Operation
      11. 8.1.11 Sequencing Requirements
        1. 8.1.11.1 Sequencing with a Power-Good DC-DC Converter Pin
        2. 8.1.11.2 Sequencing with a Microcontroller (MCU)
      12. 8.1.12 Power-Good Operation
      13. 8.1.13 Undervoltage Lockout (UVLO) Operation
      14. 8.1.14 Dropout Voltage (VDO)
      15. 8.1.15 Behavior when Transitioning from Dropout into Regulation
      16. 8.1.16 Load Transient Response
      17. 8.1.17 Negative Biased Output
      18. 8.1.18 Power Dissipation (PD)
      19. 8.1.19 Estimating Junction Temperature
    2. 8.2 Typical Applications
      1. 8.2.1 Low-Input, Low-Output (LILO) Voltage Conditions
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application for a 5.0-V Rail
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Low Dropout: 180 mV (max) at 3 A
  • 1% (max) Accuracy Over Line, Load, and Temperature
  • Output Voltage Noise:
    • 4.4 µVRMS at 0.8-V Output
    • 7.7 µVRMS at 5.0-V Output
  • Input Voltage Range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • ANY-OUT™ Operation:
    • Output Voltage Range: 0.8 V to 3.95 V
  • Adjustable Operation:
    • Output Voltage Range: 0.8 V to 5.0 V
  • Power-Supply Ripple Rejection:
    • 40 dB at 500 kHz
  • Excellent Load Transient Response
  • Adjustable Soft-Start In-Rush Control
  • Open-Drain Power-Good (PG) Output
  • Stable with a 47-µF or Larger Ceramic Output Capacitor
  • 3.5-mm × 3.5-mm, 20-Pin VQFN

2 Applications

  • Digital Loads: SerDes, FPGAs, and DSPs
  • Instrumentation, Medical, and Audio
  • High-Speed Analog Circuits:
    • VCO, ADC, DAC, and LVDS
  • Imaging: CMOS Sensors and Video ASICs
  • Test and Measurement

3 Description

The TPS7A84 is a low-noise (4.4 µVRMS), low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180 mV of maximum dropout. The device output voltage is pin-programmable from 0.8 V to 3.95 V and adjustable from 0.8 V to 5.0 V using an external resistor divider.

The combination of low-noise (4.4 µVRMS), high-PSRR, and high output current capability makes the TPS7A84 ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84 limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and 5.0-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84 ensure optimal system performance.

The versatility of the TPS7A84 makes the device a component of choice for many demanding applications.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (nom)
TPS7A84 VQFN (20) 3.50 mm × 3.50 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Powering RF Components

TPS7A84 7A84_front_1.gif

Powering Digital Loads

TPS7A84 7A84_front_2.gif