SLVSDN4 June   2017 TPS82150

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Schematic spacespace
      2.      Efficiency vs Output Current, VIN=12V space
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommend Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM and PSM Operation
      2. 7.3.2 Low Dropout Operation (100% Duty Cycle)
      3. 7.3.3 Switch Current Limit
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Soft Startup (SS/TR)
      3. 7.4.3 Voltage Tracking (SS/TR)
      4. 7.4.4 Power Good Output (PG)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 1.8-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2 Setting the Output Voltage
          3. 8.2.1.2.3 Input and Output Capacitor Selection
          4. 8.2.1.2.4 Soft Startup Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 System Examples
      1. 8.3.1 Inverting Power Supply
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Consideration
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Materials Information
      1. 12.1.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • SIL|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TJ = -40°C to 125°C and VIN = 3.0V to 17V. Typical values are at TJ = 25°C and VIN = 12V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IQ Quiescent current into VIN No load, device not switching 20 35 µA
ISD Shutdown current into VIN EN = Low 1.5 7.4 µA
VUVLO Under voltage lock out threshold VIN falling 2.6 2.7 2.8 V
VIN rising 2.8 2.9 3.0 V
TJSD Thermal shutdown threshold TJ rising 160 °C
TJ falling 140 °C
LOGIC INTERFACE (EN)
VIH High-level input voltage 0.9 0.65 V
VIL Low-level input voltage 0.45 0.3 V
Ilkg(EN) Input leakage current into EN pin EN = High 0.01 1 µA
CONTROL (SS/TR, PG)
ISS/TR SS/TR pin source current 2.1 2.5 2.8 µA
VPG Power good threshold VOUT rising, referenced to VOUT nominal 92% 95% 99%
VOUT falling, referenced to VOUT nominal 87% 90% 94%
VPG,OL Power good low-level voltage Isink = 2mA 0.1 0.3 V
Ilkg(PG) Input leakage current into PG pin VPG = 1.8V 1 400 nA
OUTPUT
VFB Feedback regulation voltage PWM mode 785 800 815 mV
TJ = 0°C to 85°C 788 800 812
PSM COUT = 22µF 785 800 823
COUT = 2x22µF, TJ = 0°C to 85°C 788 800 815
Ilkg(FB) Feedback input leakage current VFB = 0.8V 1 100 nA
Line regulation IOUT = 1A, VOUT = 1.8V 0.002 %/V
Load regulation IOUT = 0.5A to 1A, VOUT = 1.8V 0.12 %/A
POWER SWITCH
RDS(on) High-side FET on-resistance ISW = 500mA, VIN ≥ 6V 90 170 mΩ
ISW = 500mA, VIN = 3V 120
Low-side FET on-resistance ISW = 500mA, VIN ≥ 6V 40 70
ISW = 500mA, VIN = 3V 50
RDP Dropout resistance 100% mode, VIN ≥ 6V 125 mΩ
100% mode, VIN = 3V 160
ILIMF High-side FET switch current limit VIN = 6V, TJ = 25°C 1.7 2.2 2.7 A
fSW PWM switching frequency IOUT = 1A, VOUT = 1.8V 2.0 MHz