SCDS356C November   2014  – March 2019 TS3DDR4000

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Static Electrical Characteristics
    6. 6.6 Dynamic Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Non-Volatile Dual In-line Memory Module (NVDIMM) application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Load Isolation Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.1 Layout Guidelines

Standard layout technique for 0.65 mm pitch BGA package shall be employed. The following commonly-used printed-circuit-board (PCB) layout guidelines are recommended:

  • Use Non-Solder-Mask-Defined (NSMD), rather than Solder-Mask-Defined (SMD) pads for the BGA solder balls to adhere if possible. For most applications, the NSMD pads provide more flexibility, fewer stress.
    • TS3DDR4000 solder_scds356.gifFigure 21. Solder-Mask-Defined (SMD) and Non-Solder-Mask-Defined (NSMD) Pads
  • One trace can generally be routed between two solder pads of a 0.65 mm pitch BGA. This allows the outer two rows of solder pads to be routed on the same top/bottom layer. The TS3DDR4000 has 4 rows, and thus no VIAs is generally required to route all the inner balls out.
  • Generally high-speed signal layout guidelines:
    • To minimize the effects of crosstalk on adjacent traces, keep the traces at least two times the trace width apart.
    • Separate high-speed signals from low-speed signals and digital from analog signals.
    • Avoid right-angle bends in a trace and try to route them at least with two 45° corners.
    • The high-speed differential signal traces should be routed parallel to each other as much as possible. The traces are recommended to be symmetrical.
    • A solid ground plane should be placed next to the high-speed signal layer. This also provides an excellent low-inductance path for the return current flow.