SLUSBW3D March 2014 – December 2017 UCC28630 , UCC28631 , UCC28632 , UCC28633 , UCC28634
PRODUCTION DATA.
The device internally monitors the current into the HV pin to determine if the voltage across the X-capacitor in the EMI filter has a sufficient AC ripple component. If insufficient AC content is detected, then a DC condition is internally flagged. This causes the controller to enter low-power mode for the reset period (t_{RESET(short)}), followed by bias voltage discharge to the reset level (V_{DD(reset)}) , and then the start-up HV current source turns on again to effectively discharge the X-capacitor by transferring charge to the VDD reservoir capacitor.
Because the device monitors the HV pin to detect a DC condition on the X-capacitor, the system cannot operate with DC input to the HV pin. Instead, the HV pin must be connected to an AC source only. The device interprets any DC input on the HV pin as DC across the X-capacitor, indicating an AC-disconnect event. This causes a repeating cycle of start-up and shutdown. The device requires an external 200-kΩ of resistance on the HV pin, to limit the current to a level below the saturation point of the internal HV current source. This limit produces a HV input current that is approximately proportional to AC line, so that the AC content can be sensed.
The size of the X-capacitor that can be discharged depends on the VDD energy storage capacitor. Assuming the worst case, a maximum X-capacitor disconnect voltage could be at the peak of 264 V_{RMS}, and assuming that it should be discharged down to 60-V SELV level, the minimum allowed VDD capacitor can be sized based on the worst case V_{DD(reset)} and V_{DD(start)} levels as described in Equation 3.
For example, for a 330-nF X-capacitor value, the required VDD capacitor is 15.9 µF, so a 22-µF capacitor suffices.
In order to reduce the power consumption from the high voltage AC line, the device pulses current into the HV pin at a low frequency with very low duty-cycle. The HV current source on-time (t_{ON(HV)}) , repeats at intervals of t_{SMP(HV)}. Moreover, the pulsing occurs in bursts, with a time delay between bursts. The sampling occurs in bursts of 21, at intervals of t_{SMP(HV)}, with a wait time of t_{WAIT(HV)} between bursts. This reduces the effective average duty-cycle to a very low value (approximately 0.2%), and minimizes the overhead of X-capacitor sampling current and device bias consumption overhead to approximately 2 mW of extra standby consumption at high-line 230 V_{AC}.
The device enables the X-capacitor monitor in latched fault mode, and in light-load regions where the power level is below P_{LL(%)}, as a percentage of the nominal rated level. Above the P_{LL(%)} level, the X-capacitor monitor is disabled. At this load level the bulk capacitor discharges at a rate that is sufficient to also discharge the X-capacitor, which appears in parallel with the bulk capacitor once the bulk voltage drops far enough to forward bias the bridge rectifier diodes. In this case ensure that the bulk capacitance value is not too large for the power level desired, which in-turn ensures that the bulk capacitor discharge rate is fast enough to discharge the X-capacitor to meet the 1-s discharge target. This can be calculated in Equation 5.
Assuming a worst case AC disconnect at the peak at 264 V_{RMS} (373 V_{PK}), and a requirement to discharge to SELV level of 60 V in t_{XCAP(dis)} of 1 s, for a P_{NOM} of 65 W at 87% efficiency, this is calculated in Equation 6.
Once the bulk capacitance value is chosen, also ensure that when the bulk capacitor has been discharged down to the line UV AC_{OFF} threshold, that it continues to discharge to an acceptable level during the line UV persistence delay time (t_{UV(delay)}) as shown in Equation 7.
Again, taking the example above:
Once the first constraint is satisfied, the second one is also automatically met.