SNLS592A December   2020  – June 2022 DS160PT801

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Device Comparison
  6. 6Device and Documentation Support
    1. 6.1 Device Support
      1. 6.1.1 Development Support
      2. 6.1.2 12.1.2 Device Nomenclature
    2. 6.2 Documentation Support
      1. 6.2.1 Related Documentation
    3. 6.3 Receiving Notification of Documentation Updates
    4. 6.4 Support Resources
    5. 6.5 Trademarks
    6. 6.6 Electrostatic Discharge Caution
    7. 6.7 Glossary
  7. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 8-lane (16-channel) protocol-aware PCI-express retimer supporting 16.0, 8.0, 5.0, and 2.5 GT/s interfaces
  • Inter-chip communication (ICC) enable dual chip link width scaling to form 16-lane Gen-4 retimer
  • Supports common clock, separate reference clock with no spread spectrum clocking (SSC), and separate reference clock with SSC
  • Supports 2x4 bifurcation
  • Adaptive receive CTLE and DFE supporting maximum PCIe Gen-4 channel loss
  • Supports equalization training
  • Low-latency architecture
  • On-chip eye opening monitor (EOM) and PCIe receive margining capability
  • Small 8.50-mm × 13.40-mm BGA package
  • Flow-through pinout enables signal breakout in two signal layers
  • Compatible with standard 1.00-mm BGA PCB manufacturing
  • Dual power supply: 1.17 V and 1.8 V
  • I2C configuration (up to 1 MHz) through the external EEPROM or I2C controller
  • Industrial temperature range: −40°C to 85°C