JAJSHN0F July 2014 – November 2020 DLPC3430 , DLPC3435
PRODUCTION DATA
PIN | I/O | TYPE | DESCRIPTION | |
---|---|---|---|---|
NAME | NO. | |||
VDD | C5, D5, D7, D12, J4, J12, K3, L4, L12, M6, M9, D9, D13, F13, H13, L13, M10, D3, E3 | — | PWR | Core 1.1-V power (main 1.1 V) |
VDDLP12 | C3 | — | PWR | DSI PHY Low Power mode driver supply. It is recommended to externally tie this pin to VDD. |
VSS | Common to all package types C4, D6, D8, D10, E4, E13, F4, G4, G12, H4, H12, J3, J13, K4, K12, L3, M4, M5, M8, M12, G13, C6, C8 Only available on DLPC3435 F6, F7, F8, F9, F10, G6, G7, G8, G9, G10, H6, H7, H8, H9, H10, J6, J7, J8, J9, J10, K6, K7, K8, K9, K10 |
— | GND | Core ground (eDRAM, DSI, I/O ground, thermal ground) |
VCC18 | C7, C9, D4, E12, F12, K13, M11 | — | PWR | All 1.8-V I/O power: (1.8-V power supply for all I/O pins except the host or parallel interface and the SPI flash interface. This includes RESETZ, PARKZ, LED_SEL, CMP_OUT, GPIO, IIC1, TSTPT, and JTAG pins) |
VCC_INTF | M3, M7, N3, N7 | — | PWR | Host or parallel interface I/O power: 1.8 V to 3.3 V (Includes IIC0, PDATA, video syncs, and HOST_IRQ pins) |
VCC_FLSH | D11 | — | PWR | Flash interface I/O power:
1.8 V to 3.3 V (Dedicated SPI0 power pin) |
VDD_PLLM | H2 | — | PWR | MCG PLL (primary clock generator phase lock loop) 1.1-V power |
VSS_PLLM | G3 | — | RTN | MCG PLL return |
VDD_PLLD | J2 | — | PWR | DCG PLL (DMD clock generator phase lock loop) 1.1-V power |
VSS_PLLD | H3 | — | RTN | DCG PLL return |
I/O | SUPPLY REFERENCE | ESD STRUCTURE | |
---|---|---|---|
SUBSCRIPT | DESCRIPTION | ||
1 | 1.8-V LVCMOS I/O buffer with 8-mA drive | Vcc18 | ESD diode to GND and supply rail |
2 | 1.8-V LVCMOS I/O buffer with 4-mA drive | Vcc18 | ESD diode to GND and supply rail |
3 | 1.8-V LVCMOS I/O buffer with 24-mA drive | Vcc18 | ESD diode to GND and supply rail |
4 | 1.8-V sub-LVDS output with 4-mA drive | Vcc18 | ESD diode to GND and supply rail |
5 | 1.8-V, 2.5-V, 3.3-V LVCMOS with 4-mA drive | Vcc_INTF | ESD diode to GND and supply rail |
6 | 1.8-V LVCMOS input | Vcc18 | ESD diode to GND and supply rail |
7 | 1.8-V, 2.5-V, 3.3-V I2C with 3-mA drive | Vcc_INTF | ESD diode to GND and supply rail |
8 | 1.8-V I2C with 3-mA drive | Vcc18 | ESD diode to GND and supply rail |
9 | 1.8-V, 2.5-V, 3.3-V LVCMOS with 8-mA drive | Vcc_INTF | ESD diode to GND and supply rail |
10 | DSI LVDS I/O | VDD for high
speed transmit, high speed receive, and low power receive. VDDLP12 for low power transmit |
ESD diode to GND and supply rail |
11 | 1.8-V, 2.5-V, 3.3-V LVCMOS input | Vcc_INTF | ESD diode to GND and supply rail |
12 | 1.8-V, 2.5-V, 3.3-V LVCMOS input | Vcc_FLSH | ESD diode to GND and supply rail |
13 | 1.8-V, 2.5-V, 3.3-V LVCMOS with 8-mA drive | Vcc_FLSH | ESD diode to GND and supply rail |