JAJSGK4E
March 2013 – January 2023
DRV2667
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Support for Haptic Piezo Actuators
7.3.2
Flexible Front End Interface
7.3.3
Ramp Down Behavior
7.3.4
Low Latency Startup
7.3.5
Low Power Standby Mode
7.3.6
Device Reset
7.3.7
Amplifier Gain
7.3.8
Adjustable Boost Voltage
7.3.9
Adjustable Current Limit
7.3.10
Internal Charge Pump
7.3.11
Device Protection
7.3.11.1
Thermal Protection
7.3.11.2
Overcurrent Protection
7.3.11.3
Brownout Protection
7.4
Device Functional Modes
7.4.1
FIFO Mode
7.4.1.1
Waveform Timeout
7.4.2
Direct Playback from RAM Mode
7.4.3
Waveform Synthesis Playback Mode
7.4.4
Waveform Sequencer
7.4.5
Analog Playback Mode
7.4.6
Low Voltage Operation Mode
7.5
Programming
7.5.1
Programming the Boost Voltage
7.5.2
Programming the Boost Current Limit
7.5.3
Programming the RAM
7.5.3.1
Accessing the RAM
7.5.3.2
RAM Format
7.5.3.2.1
Programming the Waveform Sequencer
7.5.4
I2C Interface
7.5.4.1
General I2C Operation
7.5.4.2
Single-Byte and Multiple-Byte Transfers
7.5.4.3
Single-Byte Write
7.5.4.4
Multiple-Byte Write and Incremental Multiple-Byte Write
7.5.4.5
Single-Byte Read
7.5.4.6
Multiple-Byte Read
7.6
Register Map
7.6.1
Address: 0x00
7.6.2
Address: 0x01
7.6.3
Address: 0x02
7.6.4
Address: 0x03
7.6.5
Address: 0x04
7.6.6
Address: 0x05
7.6.7
Address: 0x06
7.6.8
Address: 0x07
7.6.9
Address: 0x08
7.6.10
Address: 0x09
7.6.11
Address: 0x0A
7.6.12
Address: 0x0B
7.6.13
Address: 0xFF
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Inductor Selection
8.2.2.2
Piezo Actuator Selection
8.2.2.3
Boost Capacitor Selection
8.2.2.4
Bulk Capacitor Selection
8.2.3
Application Curves
8.3
Initialization Setup
8.3.1
Initialization Procedure
8.3.2
Typical Usage Examples
8.3.2.1
Single Click or Alert Example
8.3.2.2
Library Storage Example
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Community Resources
11.3
Trademarks
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGP|20
MPQF126G
サーマルパッド・メカニカル・データ
RGP|20
QFND079Y
発注情報
jajsgk4e_oa
jajsgk4e_pm
6.7
Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
T
start
Start-up time
Time from I
2
C write until boost and amplifier are fully enabled
2
ms
Figure 6-1
SCL and SDA Timing
Figure 6-2
Timing for Start and Stop Conditions