JAJSEY2Y July   1996  – March 2024 TLV431 , TLV431A , TLV431B

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics for TLV431
    6. 5.6 Electrical Characteristics for TLV431A
    7. 5.7 Electrical Characteristics for TLV431B
    8. 5.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open Loop (Comparator)
      2. 7.4.2 Closed Loop
  9. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Comparator with Integrated Reference (Open Loop)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Basic Operation
          2. 8.2.1.2.2 Overdrive
          3. 8.2.1.2.3 Output Voltage and Logic Input Level
            1. 8.2.1.2.3.1 Input Resistance
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Shunt Regulator/Reference
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Programming Output/Cathode Voltage
          2. 8.2.2.2.2 Total Accuracy
          3. 8.2.2.2.3 Stability
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DBZ|3
  • DBV|5
  • PK|3
  • DCK|6
  • LP|3
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions table are not implied.

GUID-70FDE77A-A12E-49FC-B4F7-7FB87DD89833-low.pngFigure 5-1 Reference Voltage vs Junction Temperature
GUID-0E735165-F199-432B-BF84-06434855A6C7-low.pngFigure 5-3 Reference Input Current vs Junction Temperature (for TLV431B)
GUID-0DE66D28-BE50-4F16-A57F-B9BD867BAE8D-low.pngFigure 5-5 Minimum Cathode Current vs Temperature
GUID-B262E988-0D1F-4495-9FD3-A6CB5A516740-low.pngFigure 5-7 Off-State Cathode Current vs Junction Temperature (for TLV431 and TLV431A)
GUID-9F0A9390-50F3-4BE8-9A33-9456D778002F-low.pngFigure 5-9 Ratio of Delta Reference Voltage to Delta Cathode Voltage vs Junction Temperature (for TLV431 and TLV431A)

‡Extrapolated from Life-test Data Taken at 125°C; the Activation Energy Assumed Is 0.7 eV.

GUID-B4ED74FE-1207-4C94-8BC8-CC5CA83F5AD0-low.pngFigure 5-11 Percentage Change in vREF vs Operating Life at 55°C
GUID-6C98AA5E-EF0F-42FC-8F43-B9D4E2240F77-low.pngFigure 5-2 Reference Input Current vs Junction Temperature (for TLV431 and TLV431A)
GUID-8605798F-036B-4B7E-AF66-08B6A14CE366-low.pngFigure 5-4 Cathode Current vs Cathode Voltage
GUID-CD9E394B-B56F-49C6-B8CC-C3B893E119FB-low.pngFigure 5-6 Cathode Current vs Cathode Voltage
GUID-5E4DD13E-260D-4015-91CB-26C0E2447EB9-low.pngFigure 5-8 Off-State Cathode Current vs Junction Temperature (for TLV431B)
GUID-FB2AB701-3C23-450D-B26D-05D0FA1894CD-low.pngFigure 5-10 Ratio of Delta Reference Voltage to Delta Cathode Voltage vs Junction Temperature (for TLV431B)
GUID-3DE7FD6B-6D95-4ADE-BDFC-87D7C0A76DBE-low.pngFigure 5-12 Equivalent Input Noise Voltage
GUID-75BE4EBC-7AB3-4F47-9DE8-C37C7ACB5E3F-low.pngFigure 5-13 Equivalent Noise Voltage over a 10S Period
GUID-C9E245BC-51F7-4BA2-94B5-70951CB3F6FA-low.pngFigure 5-14 Voltage Gain and Phase Margin
GUID-981BDF87-8796-4FDB-9D52-214292FC31D7-low.pngFigure 5-15 Reference Impedance vs Frequency
GUID-7F1188CD-9ADD-4BE4-ADF9-560DFB7EBACC-low.pngFigure 5-16 Pulse Response 1
GUID-EF7AA72A-D15A-4D92-89F0-5C8F84C9EEBD-low.pngFigure 5-17 Pulse Response 2
GUID-DF3328E7-9A61-4A60-A05F-3BB61744E073-low.png
The areas under the curves represent conditions that can cause the device to oscillate. For VKA = 2V and 3V curves, R2 and Vbat were adjusted to establish the initial VKA and IK conditions with CL = 0. Vbat and CL then were adjusted to determine the ranges of stability.
Figure 5-18 Stability Boundary Conditions
GUID-245D0411-D9CF-480C-8301-3E945403AA1F-low.pngFigure 5-19 Phase Margin vs Capacitive Load vKA = VREF (1.25V), TA= 25°C
GUID-4E38C448-17EC-45E8-BF82-E69441C8BBAC-low.pngFigure 5-20 Phase Margin vs Capacitive Load vKA = 2.50V, TA= 25°C
GUID-47CB97E3-E6A2-47CF-A10F-A155712D2280-low.pngFigure 5-21 Phase Margin vs Capacitive Load vKA = 5.00V, TA= 25°C