SW |
1, 2 |
I/O |
Switch pin of the power stage. |
DEF |
3 |
I |
This pin is used for internal logic and needs to be pulled high. This pin should not be left floating. |
PG |
4 |
O |
Power good open drain output. This pin is high impedance if the output voltage is within regulation. This pin is pulled low if the output is below its nominal value. The pull up resistor can not be connected to any voltage higher than the input voltage of the device. |
FB |
5 |
I |
Feedback pin of the device. Connect a resistor divider to set the output voltage. |
AGND |
6 |
|
Analog ground. |
CP |
7 |
I/O |
Internal charge pump flying capacitor. Connect a 10 nF capacitor between CP and CN. |
CN |
8 |
I/O |
Internal charge pump flying capacitor. Connect a 10 nF capacitor between CP and CN. |
SS |
9 |
I |
Softstart control pin. A capacitor is connected to this pin and sets the softstart time. Leaving this pin floating sets the minimum start-up time. |
AVIN |
10 |
I |
Bias supply input voltage pin. |
PVIN |
11,12 |
I |
Power supply input voltage pin. |
EN |
13 |
I |
Device enable. To enable the device this pin needs to be pulled high. Pulling this pin low disables the device. This pin has a pull down resistor of typically 400 kΩ, which is active when EN is low. |
PGND |
14,15 |
|
Power ground connection. |
VOS |
16 |
I |
Output voltage sense pin. This pin needs to be connected to the output voltage. |
Exposed Thermal Pad |
|
The exposed thermal pad is connected to AGND. It must be soldered for mechanical reliability. |