SLOS524E June 2008 – May 2016 TPA2016D2
PRODUCTION DATA.
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | DSBGA | QFN | ||
INR+ | A2 | 15 | I | Right channel positive audio input |
INR– | A1 | 14 | I | Right channel negative audio input |
INL+ | A3 | 1 | I | Left channel positive audio input |
INL– | A4 | 2 | I | Left channel negative audio input |
SDZ | C2 | 18 | I | Shutdown terminal (active low) |
SDA | B3 | 19 | I/O | I2C data interface |
SCL | B2 | 17 | I | I2C clock interface |
OUTR+ | D1 | 10 | O | Right channel positive differential output |
OUTR– | D2 | 9 | O | Right channel negative differential output |
OUTL+ | D4 | 6 | O | Left channel positive differential output |
OUTL– | D3 | 7 | O | Left channel negative differential output |
AVDD | B1 | 13 | P | Analog supply (must be the same as PVDDR and PVDDL) |
AGND | B4 | 3 | P | Analog ground (all GND pins need to be connected) |
PVDDR | C1 | 11, 12 | P | Right channel power supply (must be the same as AVDD and PVDDL) |
PGND | C3 | 8 | P | Power ground (all GND pins need to be connected) |
PVDDL | C4 | 4, 5 | P | Left channel power supply (must be the same as AVDD and PVDDR) |