JAJSHI6G June   2018  – July 2021 TPS25830-Q1 , TPS25831-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics
    8. 8.8 Typical Characteristics
  9. Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1  Buck Regulator
      2. 10.3.2  Enable/UVLO and Start-up
      3. 10.3.3  Switching Frequency and Synchronization (RT/SYNC)
      4. 10.3.4  Spread-Spectrum Operation
      5. 10.3.5  VCC, VCC_UVLO
      6. 10.3.6  Minimum ON-time, Minimum OFF-time
      7. 10.3.7  Internal Compensation
      8. 10.3.8  Bootstrap Voltage (BOOT)
      9. 10.3.9  RSNS, RSET, RILIMIT and RIMON
      10. 10.3.10 Overcurrent and Short Circuit Protection
        1. 10.3.10.1 Current Limit Setting using RILIMIT
        2. 10.3.10.2 Buck Average Current Limit Design Example
        3. 10.3.10.3 External MOSFET Gate Drivers
        4. 10.3.10.4 Cycle-by-Cycle Buck Current Limit
      11. 10.3.11 Overvoltage, IEC and Short to Battery Protection
        1. 10.3.11.1 VBUS and VCSN/OUT Overvoltage Protection
        2. 10.3.11.2 DP_IN and DM_IN Protection
        3. 10.3.11.3 CC IEC and OVP Protection
      12. 10.3.12 Cable Compensation
        1. 10.3.12.1 Cable Compensation Design Example
      13. 10.3.13 USB Port Control
      14. 10.3.14 FAULT Response
      15. 10.3.15 USB Specification Overview
      16. 10.3.16 USB Type-C® Basics
        1. 10.3.16.1 Configuration Channel
        2. 10.3.16.2 Detecting a Connection
        3. 10.3.16.3 Configuration Channel Pins CC1 and CC2
        4. 10.3.16.4 Current Capability Advertisement and VCONN Overload Protection
        5. 10.3.16.5 Plug Polarity Detection
      17. 10.3.17 Device Power Pins (IN, CSN/OUT, and PGND)
      18. 10.3.18 Thermal Shutdown
      19. 10.3.19 Power Wake
      20. 10.3.20 Thermal Sensing with NTC (TPS25831-Q1)
    4. 10.4 Device Functional Modes
      1. 10.4.1 Shutdown Mode
      2. 10.4.2 Standby Mode
      3. 10.4.3 Active Mode
      4. 10.4.4 Device Truth Table (TT)
      5. 10.4.5 USB Port Operating Modes
        1. 10.4.5.1 USB Type-C Mode
        2. 10.4.5.2 Standard Downstream Port (SDP) Mode — USB 2.0, USB 3.0, and USB 3.1
        3. 10.4.5.3 Charging Downstream Port (CDP) Mode
        4. 10.4.5.4 Dedicated Charging Port (DCP) Mode (TPS25831-Q1 Only)
          1. 10.4.5.4.1 DCP BC1.2 and YD/T 1591-2009
          2. 10.4.5.4.2 DCP Divider-Charging Scheme
          3. 10.4.5.4.3 DCP 1.2-V Charging Scheme
        5. 10.4.5.5 DCP Auto Mode (TPS25831-Q1 Only)
      6. 10.4.6 High-Bandwidth Data-Line Switches (TPS25830-Q1 only)
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1  Output Voltage
        2. 11.2.2.2  Switching Frequency
        3. 11.2.2.3  Inductor Selection
        4. 11.2.2.4  Output Capacitor Selection
        5. 11.2.2.5  Input Capacitor Selection
        6. 11.2.2.6  Bootstrap Capacitor Selection
        7. 11.2.2.7  VCC Capacitor Selection
        8. 11.2.2.8  Enable and Undervoltage Lockout Set-Point
        9. 11.2.2.9  Current Limit Set-Point
        10. 11.2.2.10 Cable Compensation Set-Point
        11. 11.2.2.11 LD_DET, POL, and FAULT Resistor Selection
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Ground Plane and Thermal Considerations
    3. 13.3 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Related Links
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 サポート・リソース
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Current Limit Setting using RILIMIT

Refer to Figure 10-15. The TPS2583x-Q1 can establish current limit by two methods.

  • Using external a single or back-to-back N-Channel MOFETs between CSN/OUT and BUS: A voltage of 0.49 V on the ILIMIT pin initiates current limiting using the external MOSFET by decreasing the LS_GD voltage causing the FET to operate in the saturation region. To protect the MOSFETs from damage a hiccup timer limits the duty cycle to prevent thermal runaway. Refer to the Switching Characteristics for MOSFET hiccup timing.
  • Buck average current limit: No MOSFET, CSN/OUT connected to BUS. For TPS25831-Q1, the LS_GD pin can be left floating. For TPS25830-Q1, the LS_GD pin must be pulled up through a 2.2-kΩ resistor. In this configuration, a voltage of 1 V across RILIMIT on the ILIMIT pin initiates average current limiting of the buck regulator.

The two level current limit is described below:

  • With external MOSFET Figure 10-16, Figure 10-17:
    • Isolating a fault on the USB port from other loads connected to the CSP output of the TPS2583x-Q1. In some applications, it may be useful to power additional circuitry (example USB HUB) from the output of the TPS2583x-Q1 and maintain operation of these circuits in the event of a short circuit downstream of the BUS pin. To prevent triggering the MOSFET current limit below the programmed ILIMIT threshold, external circuits must be supplied after the inductor and before the current sense resistor, RSNS.

    • After RSNS and RSET are determined and the full load ISET current is known, the resistor value RILIMIT can be determined by:

      Equation 6. GUID-B28A90BE-A333-47EB-B42D-E729EFBA1F88-low.gif

    • In most case, the recommended voltage across RSNS under current limit should be approximately 50 mV as a compromise between accuracy and power dissipation. While in some application, RILIMIT is the only resistor that can be changed to achieve different current limit. Typical RILIMIT resistors value are listed in Table 10-2 given the condition RSNS= 15 mΩ and RSET= 300 Ω

      Table 10-2 Setting the Current Limit with RILIMIT
      Current-Limit Threshold (mA) RILIMIT (kΩ)
      With External MOSFET Buck Average
      700 26.1 53.6
      1500 12.7 26.1
      1700 11.3 22.6
      2700 7.15 14.7
      3000 6.49 13
      3400 5.62 11.5
      3800 5.11 10.5

  • Buck Average Current Limit, Figure 10-18, Figure 10-19:
    1. CSN/OUT connected directly to BUS. For TPS25831-Q1, LS_GD pin can be floating. For TPS25830-Q1, LS_GD pin must be pulled up through a 2.2-kΩ resistor. The TPS2583x-Q1 can operate as a stand-alone USB charging port. In this configuration, the internal buck regulator operates with average current limiting as programmed by the ILIMIT pin, potentially producing less heat compared to N-channel MOSFET current limiting

    2. After RSNS and RSET are determined and the full load ISET current is known, the resistor value RILIMIT can be determined by:

      Equation 7. GUID-3A309388-3B9A-49D5-A55B-DFFADDA77BA5-low.gif

    3. Typical RILIMIT resistors value are listed in Table 10-2 given the condition RSNS= 15 mΩ and RSET= 300 Ω

GUID-8B685401-0C2A-44CC-837A-86504B04F6AA-low.gifFigure 10-16 TPS25830-Q1 Current Limit with External MOSFET
GUID-F0954842-BAEC-41A8-860C-2F469099B75D-low.gifFigure 10-18 TPS25830-Q1 Buck Average Current Limit
GUID-6ADF5A83-5B9A-4DB0-B46A-FC37EAD2D9BE-low.gifFigure 10-17 TPS25831-Q1 Current Limit with External MOSFET
GUID-0AF9ADF6-F6D9-42E2-B786-5D7C336B75CF-low.gifFigure 10-19 TPS25831-Q1 Buck Average Current Limit