JAJSGM3 December 2018 DAC8742H
PRODUCTION DATA.
Table 2 lists the memory-mapped registers for the DAC8742H. All register offset addresses not listed in Table 2 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
2h | CONTROL | CONTROL Register | Go |
7h | RESET | RESET Register | Go |
20h | MODEM_STATUS | MODEM STATUS Register | Go |
21h | MODEM_IRQ_MASK | MODEM IRQ MASK Register | Go |
22h | MODEM_CONTROL | MODEM CONTROL Register | Go |
23h | FIFO_D2M | FIFO D2M Register | Go |
24h | FIFO_M2D | FIFO M2D Register | Go |
25h | FIFO_LEVEL_SET | FIFO LEVEL SET Register | Go |
27h | PAFF_JABBER | PAFF JABBER Register | Go |
Complex bit access types are encoded to fit into small table cells. Table 3 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |