JAJSQ80C
september 2013 – october 2020
SN65DSI86
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
MIPI Dual DSI Interface
8.3.2
Embedded DisplayPort Interface
8.3.3
General-Purpose Input and Outputs
8.3.3.1
GPIO REFCLK and DSIA Clock Selection
8.3.3.2
Suspend Mode
8.3.3.3
Pulse Width Modulation (PWM)
8.4
Device Functional Modes
8.4.1
Reset Implementation
8.4.2
Power-Up Sequence
8.4.3
Power Down Sequence
8.4.4
Display Serial Interface (DSI)
8.4.4.1
DSI Lane Merging
8.4.4.2
DSI Supported Data Types
8.4.4.3
Generic Request Datatypes
8.4.4.3.1
Generic Read Request 2-Parameters Request
8.4.4.3.2
Generic Short Write 2-Parameters Request
8.4.4.3.3
Generic Long Write Packet Request
8.4.4.4
DSI Pixel Stream Packets
8.4.4.5
DSI Video Transmission Specifications
8.4.4.6
Video Format Parameters
8.4.4.7
GPU LP-TX Clock Requirements
8.4.5
DisplayPort
8.4.5.1
HPD (Hot Plug/Unplug Detection)
8.4.5.2
AUX_CH
8.4.5.2.1
Native Aux Transactions
8.4.5.3
I2C-Over-AUX
8.4.5.3.1
Direct Method (Clock Stretching)
8.4.5.3.2
Indirect Method (CFR Read/Write)
8.4.5.4
DisplayPort PLL
8.4.5.5
DP Output VOD and Pre-emphasis Settings
8.4.5.6
DP Main Link Configurability
8.4.5.7
DP Main Link Training
8.4.5.7.1
Manual Link Training
8.4.5.7.2
Fast Link Training
8.4.5.7.3
54
8.4.5.7.4
Semi-Auto Link Training
8.4.5.7.5
Redriver Semi-Auto Link Training
8.4.5.8
Panel Size vs DP Configuration
8.4.5.9
Panel Self Refresh (PSR)
8.4.5.10
Secondary Data Packet (SDP)
8.4.5.11
Color Bar Generator
8.4.5.12
DP Pattern
8.4.5.12.1
HBR2 Compliance Eye
8.4.5.12.2
80-Bit Custom Pattern
8.4.5.13
BPP Conversion
8.5
Programming
8.5.1
Local I2C Interface Overview
8.6
Register Map
8.6.1
Standard CFR Registers (PAGE 0)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
1080p (1920x1080 60 Hz) Panel
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
eDP Design Procedure
9.2.1.2.2
76
9.2.1.2.3
DSI Design Procedure
9.2.1.2.4
78
9.2.1.2.5
Example Script
9.2.1.3
Application Curve
10
Power Supply Recommendations
10.1
VCC Power Supply
10.2
VCCA Power supply
10.3
VPLL and VCCIO Power Supplies
11
Layout
11.1
Layout Guidelines
11.1.1
DSI Guidelines
11.1.2
eDP Guidelines
11.1.3
Ground
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Community Resources
12.4
Trademarks
13
Mechanical, Packaging, and Orderable Information
8.4
Device Functional Modes