JAJU785A January   2017  – March 2020

 

  1.   改訂履歴

Fault Protection

At this stage, it is appropriate to introduce the shutdown mechanism used with this project. Here overcurrent protection is implemented for the transformer high voltage winding current for each phase using on-chip analog comparator subsystems CMPSS1 and CMPSS4. Output overcurrent protection is implemented using on-chip analog comparator sub-system CMPSS2. Output overvoltage protection is implemented using on-chip analog comparator 3. The reference trip levels are set using the corresponding internal 12-bit DACs, which are fed to the inverting terminals of these comparators. The comparator outputs are configured to generate a one-shot trip action on ePWM1, ePWM2, ePWM4, and ePWM5 whenever the sensed current or voltage is greater than the set limit.

The flexibility of the trip mechanism on C2000 devices provides the possibilities for taking different actions on different trip events. In this project ePWM1A, ePWM1B, ePWM2A, ePWM2B, ePWM4A, ePWM4B, ePWM5A, and ePWM5B outputs are driven low immediately to protect the power stage. These outputs are held in this state until a device reset is executed.