SNAU268 June   2021 LMK1C1104

 

  1.   Trademarks
  2. 1Features
  3. 2Signal Path and Control Circuitry
  4. 3Getting Started
  5. 4Power-Supply Connections
  6. 5Enabling/Disabling the Outputs
  7. 6Output Clock
  8. 7Bill of Materials
    1. 7.1 REACH Compliance
  9. 8Schematic

LMK1C1104DQF Abstract

The LMK1C1104DQF is a high-performance, low additive jitter LVCMOS clock buffer with one LVCMOS input, four LVCMOS outputs, and a global output enable pin.

This evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1C1104DQF. Throughout this document, the acronym EVM and the phrases evaluation module and evaluation board are synonymous with the LMK1C1104DFNEVM.

The EVM is equipped with 50-Ω SMA connectors and impedance-controlled 50-Ω microstrip transmission lines for best performance.

GUID-20210615-CA0I-LF4J-FCX1-CKCVRQGFBJV2-low.png Figure 1-1 LMK1C1104DFNEVM