SPRACU8B August   2021  – January 2023 AM68 , AM68 , AM68A , AM68A , AM69 , AM69 , AM69A , AM69A , DRA821U , DRA821U , DRA829V , DRA829V , TDA4VM , TDA4VM

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Features
      1. 1.1.1 Supported Features (version 0.10.0)
      2. 1.1.2 Unsupported Features (version 0.10.0)
    2. 1.2 Spreadsheet Overview
      1. 1.2.1 Input Worksheets
      2. 1.2.2 Output Worksheets
      3. 1.2.3 Other Worksheets
    3. 1.3 Default SDK Configurations
  4. 2Customizing DDR Configuration
    1. 2.1 Config Worksheet
      1. 2.1.1 System Configuration
      2. 2.1.2 Memory Burst Configuration
    2. 2.2 DRAMTiming Worksheet
      1. 2.2.1 Latency Parameters
      2. 2.2.2 Non-Latency Parameters
    3. 2.3 IO Control Worksheet
      1. 2.3.1 Determining IO Settings
      2. 2.3.2 Processor/DDR Controller IO
      3. 2.3.3 DRAM I/O
  5. 3Software Considerations
    1. 3.1 Updating U-Boot
      1. 3.1.1 Updating DDR Register Settings
      2. 3.1.2 Updating Source to Set Available Memory Size
    2. 3.2 Updating RTOS PDK
      1. 3.2.1 Updating DDR Register Settings
  6. 4Troubleshoot Guide
    1. 4.1 Topics/Issues
      1. 4.1.1 Topic 1
      2. 4.1.2 Topic 2
      3. 4.1.3 Topic 3
  7. 5References
  8.   Revision History

1.3 Default SDK Configurations

The DDR configurations for the TI EVMs included in the software development kits are generated by the Jacinto 7 DDRSS Register Configuration Tool. As the SDK only includes the output register values, the Jacinto 7 DDRSS Register Configuration Tool includes macros to populate the user inputs to match the corresponding SDK configuration.

To use the macros and populate the tool to match the user inputs used to generate the TI EVM configuration, follow the steps listed below:

  1. Navigate to the "Title-README" worksheet of the tool.
  2. Select the appropriate TI processor part number from the drop down menu as shown in Figure 1-3.
  3. Left click the "Load User Config" push button.

Note: Macros of the Excel workbook must be enabled for this feature to work. For more information, see Section 4.1.3 of Section 4.
GUID-1A11B567-033B-45D6-B51B-D392284A7C11-low.png Figure 1-3 Steps to Load Default SDK DDR Configurations