SNVAA67 March 2023 LM5012 , LM5012-Q1 , LM5013 , LM5013-Q1
This application note concludes with a typical design for LM5013-Q1, a 48 V to 12 V design. The LM5013-Q1 supports a load current up to 3 A. This design often requires the input to tolerate a VIN range of 36 V to 60 V. The following calculations are presented for the ramp injection circuit selection to minimize VOUT variation. Additionally, line and load regulation data is included, along with VOUT transient waveform in the case VIN falls below the designed minimum VIN of 36 V, resulting in the injected ripple falling out of device specification.
The load and line regulation data above was taken at VIN = 36 V, 42 V, 48 V, 54 V, and 60 V. The load current was varied from 0 A to 3 A.
Figure 5-3 Line Transient (48 V to 15 V),
Outside of Design SpecificationA line transient below the design's VIN range was applied and recorded was the VOUT transient. The converter matained regulation after the transient, with the net effect being reduced, peak-to-peak ripple and the DC output voltage falling. The ripple and DC output voltage fell as a result of the decreased inductor current ripple and average feedback voltage reducing, respectfully.
Figure 5-4 Line Transient (48 V to 15 V),
Zoom-in of Double Pulsing on VSW as a Result of Insufficient Ramp
InjectionA zoom-in of the VSW and VOUT was taken to highlight the effect of insufficient ramp injection. The injected ramp voltage falling much below 12 mV caused false triggering of PWM comparator used in the COT architecture. It can be seen that the switching behavior becomes less periodic as a result of the double pulses on VSW (small, then large).