With the complexities of digital signal processor (DSP) applications and the system memory they utilize, it is often very difficult for the developer to understand where and when processormemory accesses are occurring. This is further complicated by the fact that many processors have incorporated cache into the on-chip memory. While there are many issues with system memory optimization, the first of those issues needing to be addressed are cache analysis, visualization, and optimization.
Maximizing cache effectiveness becomes a key to boosting the overall system performance. Cache efficiency improves processor throughput by reducing central processing unit (CPU) stall cycles due to memory activities. Cache analysis is a new tool that helps the developer achieve high levels of cache efficiency by graphically visualizing the memory reference
patterns of a program over time.
This application report covers cache fundamentals, an overview of instruction cache
(I-Cache) on existing TI TMS320VC55xtrade; DSPs, and how to make use of the cache analysis tool to achieve high levels of cache efficiency.