Digital Signal Processors

Digital Signal Processors

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The SDRC subsystem module provides connectivity between the AM37x and SDRAM memory components. The module includes support for low-power double-data-rate SDRAM (LPDDR1). The SDRC subsystem provides a high-performance interface to a variety of fast memory devices. It is comprised of two submodules:

  • SDRAM Memory Scheduler (SMS) consisting of scheduler and virtual rotated frame-buffer (VRFB)modules
  • SDRC

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