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This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:

http://processors.wiki.ti.com/index.php/AM3715/03_SDRC_Subsystem

The SDRC subsystem module provides connectivity between the AM37x and SDRAM memory components. The module includes support for low-power double-data-rate SDRAM (LPDDR1). The SDRC subsystem provides a high-performance interface to a variety of fast memory devices. It is comprised of two submodules:

SDRAM Memory Scheduler (SMS) consisting of scheduler and virtual rotated frame-buffer (VRFB)modules
SDRC

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AM3715/03 SDRC Subsystem (PDF 19 KB)
03 Jun 2010

Digital Signal Processors

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