Design Support

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This document defines data signaling rate and data transfer rate, and it demonstrates the differences between them. Taking the SN65LVDS386 and SN65LVDS387 16-channel low-voltage differential (LVDS) line drivers and receivers with random parallel data of various bandwidths as an example, this document discusses the components that make up the system timing budget and presents empirical data on crosstalk-induced jitter. It provides criteria for measurements and demonstrates the differences between signaling and transfer rates for a variety of bus widths.