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The OMAP™ 4 platform includes applications processors, a comprehensive software suite and power management technology to bring next-generation Smartphones and Mobile Internet Devices (MIDs) quickly to market.
OMAP44x Processors | Software for OMAP™ 4 |
Power Management for OMAP™ 4 | Symmetric Multiprocessing (SMP)
In addition to the OMAP 4 platform hardware, TI also provides a comprehensive software suite that supports leading mobile OSes. It is integrated and tested up to the application level, enabling faster and easier development for end equipment manufacturers and application developers and is highly customizable to give developers the flexibility needed to differentiate their product. The industry-leading OMAP 4 applications processors combined with this comprehensive software suite deliver breakthrough multimedia improvements versus today’s most popular smart phones, including full 1080p30 multi-standard HD record and playback, up to 20-megapixel imaging, PC-like Internet browsing, 3D graphics enabled user interfaces and best-in-class power management technology with SmartReflex 2 technologies.
The OMAP 4 software suite from TI will allow customers to quickly and easily develop new handsets and applications that deliver the performance customers demand. With a flexible and open platform, designers will stay ahead of the rapid rate of innovation in the market plus deliver stunning user experiences.
The OMAP 4 platform integrates TI’s industry-leading SmartReflex™ 2 technologies to enable high performance at low power. SmartReflex 2 technologies combine intelligent and adaptive silicon, circuit design and software to solve power and performance management challenges at smaller process nodes, enabling OEMs to offer sleeker, multimedia-enabled mobile devices with long battery life and less heat dissipation. The OMAP 4 platform also includes support for the TWL6030 power management companion device to help maximize battery life.
TI’s OMAP 4 platform is one of the first dual-core, ARM® Cortex™-A9 MPCore SMP based architectures and employs parallel processing for higher performance and better power efficiency. SMP’s scalable performance activates only the cores that are needed for that particular process to reduce power consumption or substantially increase performance.
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