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Functions
[vims] Versatile Instruction Memory System

## Functions
void | VIMSConfigure (uint32_t ui32Base, bool bRoundRobin, bool bPrefetch)
| Configures the VIMS. More...
void | VIMSModeSet (uint32_t ui32Base, uint32_t ui32Mode)
| Set the operational mode of the VIMS. More...
uint32_t | VIMSModeGet (uint32_t ui32Base)
| Get the current operational mode of the VIMS. More...
void | VIMSModeSetBlocking (uint32_t ui32Mode)
| Set the operational mode of the VIMS in a safe sequence (blocking). More...
__STATIC_INLINE void | VIMSLineBufDisable (uint32_t ui32Base)
| Disable VIMS linebuffers. More...
__STATIC_INLINE void | VIMSLineBufEnable (uint32_t ui32Base)
| Enable VIMS linebuffers. More...

## Detailed Description

## Function Documentation

void VIMSConfigure | ( | uint32_t | ui32Base,
|  | bool | bRoundRobin,
|  | bool | bPrefetch
| ) |  |

Configures the VIMS.

This function sets general control settings of the VIMS system.

Note
  The VIMS mode must be set using the VIMSModeSet() call.

Parameters

  ui32Base | is the base address of the VIMS.
  bRoundRobin | specifies the arbitration method. `true` : Round Robin arbitration between the two available read/write interfaces (i.e. Icode/Dcode and Sysbus) is to be used. `false` : Strict arbitration will be used, where Icode/Dcode is preferred over the Sysbus.
  bPrefetch | specifies if prefetching is to be used. `true` : Cache is to prefetch tag data for the following address. `false` : No prefetch.

Returns
  None

See also
  VIMSModeSet()

Definition at line 64 of file vims.c.

__STATIC_INLINE void VIMSLineBufDisable | ( | uint32_t | ui32Base | ) |

Disable VIMS linebuffers.

Linebuffers should only be disabled when attempting to update the flash, to ensure that the content of the buffers is not stale. As soon as flash is updated the linebuffers should be reenabled. Failing to enable will have a performance impact.

Returns
  None.

Definition at line 312 of file vims.h.

__STATIC_INLINE void VIMSLineBufEnable | ( | uint32_t | ui32Base | ) |

Enable VIMS linebuffers.

Linebuffers should only be disabled when attempting to update the flash, to ensure that the content of the buffers is not stale. As soon as flash is updated the linebuffers should be reenabled. Failing to enable will have a performance impact.

Returns
  None.

Definition at line 334 of file vims.h.

uint32_t VIMSModeGet | ( | uint32_t | ui32Base | ) |

Get the current operational mode of the VIMS.

This function returns the operational mode of the VIMS.

Parameters

  ui32Base | is the base address of the VIMS.

Returns
  Returns one of:
  - VIMS_MODE_INVALIDATE
  - VIMS_MODE_DISABLED
  - VIMS_MODE_ENABLED
  - VIMS_MODE_SPLIT
  - VIMS_MODE_OFF

See also
  VIMSModeSet()

Definition at line 127 of file vims.c.

void VIMSModeSet | ( | uint32_t | ui32Base,
|  | uint32_t | ui32Mode
| ) |  |

Set the operational mode of the VIMS.

This function sets the operational mode of the VIMS.

Upon reset the VIMS will be in VIMS_MODE_INVALIDATE mode. In this mode the VIMS will initialize the cache (GP) RAM (to all zeros). The GP RAM will not be operational (read/write will result in bus fault). The Cache will not be operational. Reads and writes to flash will be uncached. After a short delay (approx. 1029 clock cycles) the VIMS will automatically switch mode to VIMS_MODE_DISABLED.

In VIMS_MODE_DISABLED mode, the cache is disabled but the GP RAM is accessible: The GP RAM will be accessible. The Cache will not be operational. Reads from flash will be uncached. From this mode, the VIMS may be put in VIMS_MODE_ENABLED or VIMS_MODE_SPLIT.

In VIMS_MODE_ENABLED mode, the cache is enabled for USERCODE space. The GP RAM will not be operational (read/write will result in bus fault). The Cache will be operational for SYSCODE space. Reads from flash in USERCODE space will be uncached.

In VIMS_MODE_SPLIT mode, the cache is enabled for both USERCODE and SYSCODE space. The GP RAM will not be operational (read/write will result in bus fault). The Cache will be operational for USERCODE and SYSCODE space.

In VIMS_MODE_OFF the cache RAM is off to conserve power.

Note
  Access from System Bus is never cached. Only access through ICODE DCODE bus from the Cortex-M is cached.
  The VIMS must be invalidated before switching from VIMS_MODE_ENABLED to VIMS_MODE_SPLIT mode and vice versa. Is is also highly recommended that the VIMS is put in disabled mode before writing to flash, since the cache will not be updated nor invalidated by flash writes. The linebuffers should also be disabled when updating the flash. Once VIMSModeSet() is used to set the VIMS in VIMS_MODE_INVALIDATE mode, the user should check using VIMSModeGet() when the mode switches to VIMS_MODE_DISABLED. Only when the mode has changed the cache has been completely invalidated.

Parameters

  ui32Base | is the base address of the VIMS.
  ui32Mode | is the operational mode. VIMS_MODE_INVALIDATE VIMS_MODE_DISABLED VIMS_MODE_ENABLED VIMS_MODE_SPLIT VIMS_MODE_OFF

Returns
  None

See also
  VIMSModeGet()

Definition at line 96 of file vims.c.

void VIMSModeSetBlocking | ( | uint32_t | ui32Mode | ) |

Set the operational mode of the VIMS in a safe sequence (blocking).

This function sets the operational mode of the VIMS in a safe sequence

Upon reset the VIMS will be in VIMS_MODE_INVALIDATE mode. In this mode the VIMS will initialize the cache (GP) RAM (to all zeros). The GP RAM will not be operational (read/write will result in bus fault). The Cache will not be operational. Reads and writes to flash will be uncached. After a short delay (approx. 1029 clock cycles) the VIMS will automatically switch mode to VIMS_MODE_DISABLED.

In VIMS_MODE_DISABLED mode, the cache is disabled but the GP RAM is accessible: The GP RAM will be accessible. The Cache will not be operational. Reads from flash will be uncached. From this mode, the VIMS may be put in VIMS_MODE_ENABLED or VIMS_MODE_SPLIT.

In VIMS_MODE_ENABLED mode, the cache is enabled for USERCODE space. The GP RAM will not be operational (read/write will result in bus fault). The Cache will be operational for SYSCODE space. Reads from flash in USERCODE space will be uncached.

In VIMS_MODE_SPLIT mode, the cache is enabled for both USERCODE and SYSCODE space. The GP RAM will not be operational (read/write will result in bus fault). The Cache will be operational for USERCODE and SYSCODE space.

In VIMS_MODE_OFF the cache RAM is off to conserve power.

Note
  Access from System Bus is never cached. Only access through ICODE DCODE bus from the Cortex-M is cached.
  The VIMS must be invalidated before switching from VIMS_MODE_ENABLED to VIMS_MODE_SPLIT mode and vice versa. Is is also highly recommended that the VIMS is put in disabled mode before writing to flash, since the cache will not be updated nor invalidated by flash writes. The linebuffers should also be disabled when updating the flash. Once VIMSModeSet() is used to set the VIMS in VIMS_MODE_INVALIDATE mode, the user should check using VIMSModeGet() when the mode switches to VIMS_MODE_DISABLED. Only when the mode has changed the cache has been completely invalidated.

Parameters

  ui32Mode | is the operational mode. VIMS_MODE_INVALIDATE VIMS_MODE_DISABLED VIMS_MODE_ENABLED VIMS_MODE_SPLIT VIMS_MODE_OFF

Returns
  None

See also
  VIMSModeGet()

Definition at line 157 of file vims.c.

## Macro Definition Documentation

#define VIMS_MODE_DISABLED 0x0

Definition at line 98 of file vims.h.

Referenced by VIMSModeSet().

#define VIMS_MODE_ENABLED 0x1

Definition at line 99 of file vims.h.

Referenced by VIMSModeSet().

#define VIMS_MODE_INVALIDATE 0x4

Definition at line 95 of file vims.h.

Referenced by VIMSModeGet(), and VIMSModeSet().

#define VIMS_MODE_OFF 0x3

Definition at line 102 of file vims.h.

Referenced by VIMSModeSet().

#define VIMS_MODE_SPLIT 0x2

Definition at line 100 of file vims.h.

Referenced by VIMSModeSet().