CPU_MMAP;FLASHMEM
CPU_MMAP;BROM
CPU_MMAP;BROM;BOOT_INTVECTTABLE
CPU_MMAP;BROM;BOOT_INTVECTTABLE;WORD32
CPU_MMAP;BROM;BOOT_FWREV
CPU_MMAP;BROM;BOOT_FWREV;WORD32
CPU_MMAP;BROM;BOOT_HAPIPNTRS
CPU_MMAP;BROM;BOOT_HAPIPNTRS;WORD32
CPU_MMAP;BROM;BOOT_NOFLASHVECTTABLE
CPU_MMAP;BROM;BOOT_NOFLASHVECTTABLE;WORD32
CPU_MMAP;BROM;BOOT_API_TABLE
CPU_MMAP;BROM;BOOT_API_TABLE;WORD32
CPU_MMAP;BROM;BOOT_CODEANDCONST
CPU_MMAP;BROM;BOOT_CODEANDCONST;WORD32
CPU_MMAP;BROM;BOOT_ROMCRC32
CPU_MMAP;BROM;BOOT_ROMCRC32;WORD32
CPU_MMAP;BROM;BLE_CONTROLLER
CPU_MMAP;BROM;BLE_CONTROLLER;WORD32
CPU_MMAP;BROM;BLE_VER
CPU_MMAP;BROM;BLE_VER;CRC_32
CPU_MMAP;BROM;BLE_VER;SVN
CPU_MMAP;BROM;TIMAC
CPU_MMAP;BROM;TIMAC;WORD32
CPU_MMAP;BROM;TIMAC_VER
CPU_MMAP;BROM;TIMAC_VER;CRC_32
CPU_MMAP;BROM;TIMAC_VER;SVN
CPU_MMAP;BROM;COMMON_DOORBELL_RFHAL_ECC_AES128
CPU_MMAP;BROM;COMMON_DOORBELL_RFHAL_ECC_AES128;WORD32
CPU_MMAP;BROM;COMMON_VER
CPU_MMAP;BROM;COMMON_VER;CRC_32
CPU_MMAP;BROM;COMMON_VER;SVN
CPU_MMAP;BROM;TIRTOS
CPU_MMAP;BROM;TIRTOS;WORD32
CPU_MMAP;BROM;TIRTOS_RESERVED
CPU_MMAP;BROM;TIRTOS_RESERVED;WORD32
CPU_MMAP;GPRAM
CPU_MMAP;GPRAM;BANK0
CPU_MMAP;GPRAM;BANK0;DATA
CPU_MMAP;SRAM
CPU_MMAP;SRAM;BANK0
CPU_MMAP;SRAM;BANK0;DATA
CPU_MMAP;SRAM;BANK1
CPU_MMAP;SRAM;BANK1;DATA
CPU_MMAP;SRAM;BANK2
CPU_MMAP;SRAM;BANK2;DATA
CPU_MMAP;SRAM;BANK3
CPU_MMAP;SRAM;BANK3;DATA
CPU_MMAP;RFC_RAM
CPU_MMAP;RFC_RAM;BANK0
CPU_MMAP;RFC_RAM;BANK0;DATA
CPU_MMAP;SSI0
CPU_MMAP;SSI0;CR0
CPU_MMAP;SSI0;CR0;RESERVED
CPU_MMAP;SSI0;CR0;SCR
CPU_MMAP;SSI0;CR0;SPH
CPU_MMAP;SSI0;CR0;SPH;1ST_CLK_EDGE
CPU_MMAP;SSI0;CR0;SPH;2ND_CLK_EDGE
CPU_MMAP;SSI0;CR0;SPO
CPU_MMAP;SSI0;CR0;SPO;LOW
CPU_MMAP;SSI0;CR0;SPO;HIGH
CPU_MMAP;SSI0;CR0;FRF
CPU_MMAP;SSI0;CR0;FRF;MOTOROLA_SPI
CPU_MMAP;SSI0;CR0;FRF;TI_SYNC_SERIAL
CPU_MMAP;SSI0;CR0;FRF;NATIONAL_MICROWIRE
CPU_MMAP;SSI0;CR0;DSS
CPU_MMAP;SSI0;CR0;DSS;4_BIT
CPU_MMAP;SSI0;CR0;DSS;5_BIT
CPU_MMAP;SSI0;CR0;DSS;6_BIT
CPU_MMAP;SSI0;CR0;DSS;7_BIT
CPU_MMAP;SSI0;CR0;DSS;8_BIT
CPU_MMAP;SSI0;CR0;DSS;9_BIT
CPU_MMAP;SSI0;CR0;DSS;10_BIT
CPU_MMAP;SSI0;CR0;DSS;11_BIT
CPU_MMAP;SSI0;CR0;DSS;12_BIT
CPU_MMAP;SSI0;CR0;DSS;13_BIT
CPU_MMAP;SSI0;CR0;DSS;14_BIT
CPU_MMAP;SSI0;CR0;DSS;15_BIT
CPU_MMAP;SSI0;CR0;DSS;16_BIT
CPU_MMAP;SSI0;CR1
CPU_MMAP;SSI0;CR1;RESERVED
CPU_MMAP;SSI0;CR1;SOD
CPU_MMAP;SSI0;CR1;MS
CPU_MMAP;SSI0;CR1;MS;MASTER
CPU_MMAP;SSI0;CR1;MS;SLAVE
CPU_MMAP;SSI0;CR1;SSE
CPU_MMAP;SSI0;CR1;SSE;SSI_DISABLED
CPU_MMAP;SSI0;CR1;SSE;SSI_ENABLED
CPU_MMAP;SSI0;CR1;LBM
CPU_MMAP;SSI0;DR
CPU_MMAP;SSI0;DR;RESERVED
CPU_MMAP;SSI0;DR;DATA
CPU_MMAP;SSI0;SR
CPU_MMAP;SSI0;SR;RESERVED
CPU_MMAP;SSI0;SR;BSY
CPU_MMAP;SSI0;SR;RFF
CPU_MMAP;SSI0;SR;RNE
CPU_MMAP;SSI0;SR;TNF
CPU_MMAP;SSI0;SR;TFE
CPU_MMAP;SSI0;CPSR
CPU_MMAP;SSI0;CPSR;RESERVED
CPU_MMAP;SSI0;CPSR;CPSDVSR
CPU_MMAP;SSI0;IMSC
CPU_MMAP;SSI0;IMSC;RESERVED
CPU_MMAP;SSI0;IMSC;TXIM
CPU_MMAP;SSI0;IMSC;RXIM
CPU_MMAP;SSI0;IMSC;RTIM
CPU_MMAP;SSI0;IMSC;RORIM
CPU_MMAP;SSI0;RIS
CPU_MMAP;SSI0;RIS;RESERVED
CPU_MMAP;SSI0;RIS;TXRIS
CPU_MMAP;SSI0;RIS;RXRIS
CPU_MMAP;SSI0;RIS;RTRIS
CPU_MMAP;SSI0;RIS;RORRIS
CPU_MMAP;SSI0;MIS
CPU_MMAP;SSI0;MIS;RESERVED
CPU_MMAP;SSI0;MIS;TXMIS
CPU_MMAP;SSI0;MIS;RXMIS
CPU_MMAP;SSI0;MIS;RTMIS
CPU_MMAP;SSI0;MIS;RORMIS
CPU_MMAP;SSI0;ICR
CPU_MMAP;SSI0;ICR;RESERVED
CPU_MMAP;SSI0;ICR;RTIC
CPU_MMAP;SSI0;ICR;RORIC
CPU_MMAP;SSI0;DMACR
CPU_MMAP;SSI0;DMACR;RESERVED
CPU_MMAP;SSI0;DMACR;TXDMAE
CPU_MMAP;SSI0;DMACR;RXDMAE
CPU_MMAP;UART0
CPU_MMAP;UART0;DR
CPU_MMAP;UART0;DR;RESERVED
CPU_MMAP;UART0;DR;OE
CPU_MMAP;UART0;DR;BE
CPU_MMAP;UART0;DR;PE
CPU_MMAP;UART0;DR;FE
CPU_MMAP;UART0;DR;DATA
CPU_MMAP;UART0;ECR
CPU_MMAP;UART0;ECR;RESERVED
CPU_MMAP;UART0;ECR;OE
CPU_MMAP;UART0;ECR;BE
CPU_MMAP;UART0;ECR;PE
CPU_MMAP;UART0;ECR;FE
CPU_MMAP;UART0;RSR
CPU_MMAP;UART0;RSR;RESERVED
CPU_MMAP;UART0;RSR;OE
CPU_MMAP;UART0;RSR;BE
CPU_MMAP;UART0;RSR;PE
CPU_MMAP;UART0;RSR;FE
CPU_MMAP;UART0;FR
CPU_MMAP;UART0;FR;RESERVED1
CPU_MMAP;UART0;FR;TXFE
CPU_MMAP;UART0;FR;RXFF
CPU_MMAP;UART0;FR;TXFF
CPU_MMAP;UART0;FR;RXFE
CPU_MMAP;UART0;FR;BUSY
CPU_MMAP;UART0;FR;RESERVED0
CPU_MMAP;UART0;FR;CTS
CPU_MMAP;UART0;IBRD
CPU_MMAP;UART0;IBRD;RESERVED
CPU_MMAP;UART0;IBRD;DIVINT
CPU_MMAP;UART0;FBRD
CPU_MMAP;UART0;FBRD;RESERVED
CPU_MMAP;UART0;FBRD;DIVFRAC
CPU_MMAP;UART0;LCRH
CPU_MMAP;UART0;LCRH;RESERVED
CPU_MMAP;UART0;LCRH;SPS
CPU_MMAP;UART0;LCRH;WLEN
CPU_MMAP;UART0;LCRH;WLEN;5
CPU_MMAP;UART0;LCRH;WLEN;6
CPU_MMAP;UART0;LCRH;WLEN;7
CPU_MMAP;UART0;LCRH;WLEN;8
CPU_MMAP;UART0;LCRH;FEN
CPU_MMAP;UART0;LCRH;FEN;DIS
CPU_MMAP;UART0;LCRH;FEN;EN
CPU_MMAP;UART0;LCRH;STP2
CPU_MMAP;UART0;LCRH;EPS
CPU_MMAP;UART0;LCRH;EPS;ODD
CPU_MMAP;UART0;LCRH;EPS;EVEN
CPU_MMAP;UART0;LCRH;PEN
CPU_MMAP;UART0;LCRH;PEN;DIS
CPU_MMAP;UART0;LCRH;PEN;EN
CPU_MMAP;UART0;LCRH;BRK
CPU_MMAP;UART0;CTL
CPU_MMAP;UART0;CTL;RESERVED16
CPU_MMAP;UART0;CTL;CTSEN
CPU_MMAP;UART0;CTL;CTSEN;DIS
CPU_MMAP;UART0;CTL;CTSEN;EN
CPU_MMAP;UART0;CTL;RTSEN
CPU_MMAP;UART0;CTL;RTSEN;DIS
CPU_MMAP;UART0;CTL;RTSEN;EN
CPU_MMAP;UART0;CTL;RESERVED12
CPU_MMAP;UART0;CTL;RTS
CPU_MMAP;UART0;CTL;RESERVED10
CPU_MMAP;UART0;CTL;RXE
CPU_MMAP;UART0;CTL;RXE;DIS
CPU_MMAP;UART0;CTL;RXE;EN
CPU_MMAP;UART0;CTL;TXE
CPU_MMAP;UART0;CTL;TXE;DIS
CPU_MMAP;UART0;CTL;TXE;EN
CPU_MMAP;UART0;CTL;LBE
CPU_MMAP;UART0;CTL;LBE;DIS
CPU_MMAP;UART0;CTL;LBE;EN
CPU_MMAP;UART0;CTL;RESERVED1
CPU_MMAP;UART0;CTL;UARTEN
CPU_MMAP;UART0;CTL;UARTEN;DIS
CPU_MMAP;UART0;CTL;UARTEN;EN
CPU_MMAP;UART0;IFLS
CPU_MMAP;UART0;IFLS;RESERVED
CPU_MMAP;UART0;IFLS;RXSEL
CPU_MMAP;UART0;IFLS;RXSEL;1_8
CPU_MMAP;UART0;IFLS;RXSEL;2_8
CPU_MMAP;UART0;IFLS;RXSEL;4_8
CPU_MMAP;UART0;IFLS;RXSEL;6_8
CPU_MMAP;UART0;IFLS;RXSEL;7_8
CPU_MMAP;UART0;IFLS;TXSEL
CPU_MMAP;UART0;IFLS;TXSEL;1_8
CPU_MMAP;UART0;IFLS;TXSEL;2_8
CPU_MMAP;UART0;IFLS;TXSEL;4_8
CPU_MMAP;UART0;IFLS;TXSEL;6_8
CPU_MMAP;UART0;IFLS;TXSEL;7_8
CPU_MMAP;UART0;IMSC
CPU_MMAP;UART0;IMSC;RESERVED11
CPU_MMAP;UART0;IMSC;OEIM
CPU_MMAP;UART0;IMSC;BEIM
CPU_MMAP;UART0;IMSC;PEIM
CPU_MMAP;UART0;IMSC;FEIM
CPU_MMAP;UART0;IMSC;RTIM
CPU_MMAP;UART0;IMSC;TXIM
CPU_MMAP;UART0;IMSC;RXIM
CPU_MMAP;UART0;IMSC;RESERVED2
CPU_MMAP;UART0;IMSC;CTSMIM
CPU_MMAP;UART0;IMSC;RESERVED0
CPU_MMAP;UART0;RIS
CPU_MMAP;UART0;RIS;RESERVED11
CPU_MMAP;UART0;RIS;OERIS
CPU_MMAP;UART0;RIS;BERIS
CPU_MMAP;UART0;RIS;PERIS
CPU_MMAP;UART0;RIS;FERIS
CPU_MMAP;UART0;RIS;RTRIS
CPU_MMAP;UART0;RIS;TXRIS
CPU_MMAP;UART0;RIS;RXRIS
CPU_MMAP;UART0;RIS;RESERVED2
CPU_MMAP;UART0;RIS;CTSRMIS
CPU_MMAP;UART0;RIS;RESERVED0
CPU_MMAP;UART0;MIS
CPU_MMAP;UART0;MIS;RESERVED11
CPU_MMAP;UART0;MIS;OEMIS
CPU_MMAP;UART0;MIS;BEMIS
CPU_MMAP;UART0;MIS;PEMIS
CPU_MMAP;UART0;MIS;FEMIS
CPU_MMAP;UART0;MIS;RTMIS
CPU_MMAP;UART0;MIS;TXMIS
CPU_MMAP;UART0;MIS;RXMIS
CPU_MMAP;UART0;MIS;RESERVED2
CPU_MMAP;UART0;MIS;CTSMMIS
CPU_MMAP;UART0;MIS;RESERVED0
CPU_MMAP;UART0;ICR
CPU_MMAP;UART0;ICR;RESERVED16
CPU_MMAP;UART0;ICR;RESERVED11
CPU_MMAP;UART0;ICR;OEIC
CPU_MMAP;UART0;ICR;BEIC
CPU_MMAP;UART0;ICR;PEIC
CPU_MMAP;UART0;ICR;FEIC
CPU_MMAP;UART0;ICR;RTIC
CPU_MMAP;UART0;ICR;TXIC
CPU_MMAP;UART0;ICR;RXIC
CPU_MMAP;UART0;ICR;RESERVED2
CPU_MMAP;UART0;ICR;CTSMIC
CPU_MMAP;UART0;ICR;RESERVED0
CPU_MMAP;UART0;DMACTL
CPU_MMAP;UART0;DMACTL;RESERVED
CPU_MMAP;UART0;DMACTL;DMAONERR
CPU_MMAP;UART0;DMACTL;TXDMAE
CPU_MMAP;UART0;DMACTL;RXDMAE
CPU_MMAP;I2C0
CPU_MMAP;I2C0;SOAR
CPU_MMAP;I2C0;SOAR;RESERVED7
CPU_MMAP;I2C0;SOAR;OAR
CPU_MMAP;I2C0;SSTAT
CPU_MMAP;I2C0;SSTAT;RESERVED3
CPU_MMAP;I2C0;SSTAT;FBR
CPU_MMAP;I2C0;SSTAT;TREQ
CPU_MMAP;I2C0;SSTAT;RREQ
CPU_MMAP;I2C0;SCTL
CPU_MMAP;I2C0;SCTL;RESERVED1
CPU_MMAP;I2C0;SCTL;DA
CPU_MMAP;I2C0;SDR
CPU_MMAP;I2C0;SDR;RESERVED8
CPU_MMAP;I2C0;SDR;DATA
CPU_MMAP;I2C0;SIMR
CPU_MMAP;I2C0;SIMR;RESERVED3
CPU_MMAP;I2C0;SIMR;STOPIM
CPU_MMAP;I2C0;SIMR;STOPIM;DIS
CPU_MMAP;I2C0;SIMR;STOPIM;EN
CPU_MMAP;I2C0;SIMR;STARTIM
CPU_MMAP;I2C0;SIMR;STARTIM;DIS
CPU_MMAP;I2C0;SIMR;STARTIM;EN
CPU_MMAP;I2C0;SIMR;DATAIM
CPU_MMAP;I2C0;SRIS
CPU_MMAP;I2C0;SRIS;RESERVED3
CPU_MMAP;I2C0;SRIS;STOPRIS
CPU_MMAP;I2C0;SRIS;STARTRIS
CPU_MMAP;I2C0;SRIS;DATARIS
CPU_MMAP;I2C0;SMIS
CPU_MMAP;I2C0;SMIS;RESERVED3
CPU_MMAP;I2C0;SMIS;STOPMIS
CPU_MMAP;I2C0;SMIS;STARTMIS
CPU_MMAP;I2C0;SMIS;DATAMIS
CPU_MMAP;I2C0;SICR
CPU_MMAP;I2C0;SICR;RESERVED3
CPU_MMAP;I2C0;SICR;STOPIC
CPU_MMAP;I2C0;SICR;STARTIC
CPU_MMAP;I2C0;SICR;DATAIC
CPU_MMAP;I2C0;MSA
CPU_MMAP;I2C0;MSA;RESERVED8
CPU_MMAP;I2C0;MSA;SA
CPU_MMAP;I2C0;MSA;RS
CPU_MMAP;I2C0;MSA;RS;TX
CPU_MMAP;I2C0;MSA;RS;RX
CPU_MMAP;I2C0;MSTAT
CPU_MMAP;I2C0;MSTAT;RESERVED7
CPU_MMAP;I2C0;MSTAT;BUSBSY
CPU_MMAP;I2C0;MSTAT;IDLE
CPU_MMAP;I2C0;MSTAT;ARBLST
CPU_MMAP;I2C0;MSTAT;DATACK_N
CPU_MMAP;I2C0;MSTAT;ADRACK_N
CPU_MMAP;I2C0;MSTAT;ERR
CPU_MMAP;I2C0;MSTAT;BUSY
CPU_MMAP;I2C0;MCTRL
CPU_MMAP;I2C0;MCTRL;RESERVED4
CPU_MMAP;I2C0;MCTRL;ACK
CPU_MMAP;I2C0;MCTRL;ACK;DIS
CPU_MMAP;I2C0;MCTRL;ACK;EN
CPU_MMAP;I2C0;MCTRL;STOP
CPU_MMAP;I2C0;MCTRL;STOP;DIS
CPU_MMAP;I2C0;MCTRL;STOP;EN
CPU_MMAP;I2C0;MCTRL;START
CPU_MMAP;I2C0;MCTRL;START;DIS
CPU_MMAP;I2C0;MCTRL;START;EN
CPU_MMAP;I2C0;MCTRL;RUN
CPU_MMAP;I2C0;MCTRL;RUN;DIS
CPU_MMAP;I2C0;MCTRL;RUN;EN
CPU_MMAP;I2C0;MDR
CPU_MMAP;I2C0;MDR;RESERVED8
CPU_MMAP;I2C0;MDR;DATA
CPU_MMAP;I2C0;MTPR
CPU_MMAP;I2C0;MTPR;RESERVED8
CPU_MMAP;I2C0;MTPR;TPR_7
CPU_MMAP;I2C0;MTPR;TPR
CPU_MMAP;I2C0;MIMR
CPU_MMAP;I2C0;MIMR;RESERVED1
CPU_MMAP;I2C0;MIMR;IM
CPU_MMAP;I2C0;MIMR;IM;DIS
CPU_MMAP;I2C0;MIMR;IM;EN
CPU_MMAP;I2C0;MRIS
CPU_MMAP;I2C0;MRIS;RESERVED1
CPU_MMAP;I2C0;MRIS;RIS
CPU_MMAP;I2C0;MMIS
CPU_MMAP;I2C0;MMIS;RESERVED1
CPU_MMAP;I2C0;MMIS;MIS
CPU_MMAP;I2C0;MICR
CPU_MMAP;I2C0;MICR;RESERVED1
CPU_MMAP;I2C0;MICR;IC
CPU_MMAP;I2C0;MCR
CPU_MMAP;I2C0;MCR;RESERVED8
CPU_MMAP;I2C0;MCR;RESERVED6
CPU_MMAP;I2C0;MCR;SFE
CPU_MMAP;I2C0;MCR;SFE;DIS
CPU_MMAP;I2C0;MCR;SFE;EN
CPU_MMAP;I2C0;MCR;MFE
CPU_MMAP;I2C0;MCR;MFE;DIS
CPU_MMAP;I2C0;MCR;MFE;EN
CPU_MMAP;I2C0;MCR;RESERVED1
CPU_MMAP;I2C0;MCR;LPBK
CPU_MMAP;I2C0;MCR;LPBK;DIS
CPU_MMAP;I2C0;MCR;LPBK;EN
CPU_MMAP;SSI1
CPU_MMAP;SSI1;CR0
CPU_MMAP;SSI1;CR0;RESERVED
CPU_MMAP;SSI1;CR0;SCR
CPU_MMAP;SSI1;CR0;SPH
CPU_MMAP;SSI1;CR0;SPH;1ST_CLK_EDGE
CPU_MMAP;SSI1;CR0;SPH;2ND_CLK_EDGE
CPU_MMAP;SSI1;CR0;SPO
CPU_MMAP;SSI1;CR0;SPO;LOW
CPU_MMAP;SSI1;CR0;SPO;HIGH
CPU_MMAP;SSI1;CR0;FRF
CPU_MMAP;SSI1;CR0;FRF;MOTOROLA_SPI
CPU_MMAP;SSI1;CR0;FRF;TI_SYNC_SERIAL
CPU_MMAP;SSI1;CR0;FRF;NATIONAL_MICROWIRE
CPU_MMAP;SSI1;CR0;DSS
CPU_MMAP;SSI1;CR0;DSS;4_BIT
CPU_MMAP;SSI1;CR0;DSS;5_BIT
CPU_MMAP;SSI1;CR0;DSS;6_BIT
CPU_MMAP;SSI1;CR0;DSS;7_BIT
CPU_MMAP;SSI1;CR0;DSS;8_BIT
CPU_MMAP;SSI1;CR0;DSS;9_BIT
CPU_MMAP;SSI1;CR0;DSS;10_BIT
CPU_MMAP;SSI1;CR0;DSS;11_BIT
CPU_MMAP;SSI1;CR0;DSS;12_BIT
CPU_MMAP;SSI1;CR0;DSS;13_BIT
CPU_MMAP;SSI1;CR0;DSS;14_BIT
CPU_MMAP;SSI1;CR0;DSS;15_BIT
CPU_MMAP;SSI1;CR0;DSS;16_BIT
CPU_MMAP;SSI1;CR1
CPU_MMAP;SSI1;CR1;RESERVED
CPU_MMAP;SSI1;CR1;SOD
CPU_MMAP;SSI1;CR1;MS
CPU_MMAP;SSI1;CR1;MS;MASTER
CPU_MMAP;SSI1;CR1;MS;SLAVE
CPU_MMAP;SSI1;CR1;SSE
CPU_MMAP;SSI1;CR1;SSE;SSI_DISABLED
CPU_MMAP;SSI1;CR1;SSE;SSI_ENABLED
CPU_MMAP;SSI1;CR1;LBM
CPU_MMAP;SSI1;DR
CPU_MMAP;SSI1;DR;RESERVED
CPU_MMAP;SSI1;DR;DATA
CPU_MMAP;SSI1;SR
CPU_MMAP;SSI1;SR;RESERVED
CPU_MMAP;SSI1;SR;BSY
CPU_MMAP;SSI1;SR;RFF
CPU_MMAP;SSI1;SR;RNE
CPU_MMAP;SSI1;SR;TNF
CPU_MMAP;SSI1;SR;TFE
CPU_MMAP;SSI1;CPSR
CPU_MMAP;SSI1;CPSR;RESERVED
CPU_MMAP;SSI1;CPSR;CPSDVSR
CPU_MMAP;SSI1;IMSC
CPU_MMAP;SSI1;IMSC;RESERVED
CPU_MMAP;SSI1;IMSC;TXIM
CPU_MMAP;SSI1;IMSC;RXIM
CPU_MMAP;SSI1;IMSC;RTIM
CPU_MMAP;SSI1;IMSC;RORIM
CPU_MMAP;SSI1;RIS
CPU_MMAP;SSI1;RIS;RESERVED
CPU_MMAP;SSI1;RIS;TXRIS
CPU_MMAP;SSI1;RIS;RXRIS
CPU_MMAP;SSI1;RIS;RTRIS
CPU_MMAP;SSI1;RIS;RORRIS
CPU_MMAP;SSI1;MIS
CPU_MMAP;SSI1;MIS;RESERVED
CPU_MMAP;SSI1;MIS;TXMIS
CPU_MMAP;SSI1;MIS;RXMIS
CPU_MMAP;SSI1;MIS;RTMIS
CPU_MMAP;SSI1;MIS;RORMIS
CPU_MMAP;SSI1;ICR
CPU_MMAP;SSI1;ICR;RESERVED
CPU_MMAP;SSI1;ICR;RTIC
CPU_MMAP;SSI1;ICR;RORIC
CPU_MMAP;SSI1;DMACR
CPU_MMAP;SSI1;DMACR;RESERVED
CPU_MMAP;SSI1;DMACR;TXDMAE
CPU_MMAP;SSI1;DMACR;RXDMAE
CPU_MMAP;GPT0
CPU_MMAP;GPT0;CFG
CPU_MMAP;GPT0;CFG;RESERVED3
CPU_MMAP;GPT0;CFG;CFG
CPU_MMAP;GPT0;CFG;CFG;32BIT_TIMER
CPU_MMAP;GPT0;CFG;CFG;REALTIME_CLOCK
CPU_MMAP;GPT0;CFG;CFG;16BIT_TIMER
CPU_MMAP;GPT0;TAMR
CPU_MMAP;GPT0;TAMR;RESERVED16
CPU_MMAP;GPT0;TAMR;TCACT
CPU_MMAP;GPT0;TAMR;TCACT;DIS_CMP
CPU_MMAP;GPT0;TAMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT0;TAMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT0;TAMR;TCACT;SET_ON_TO
CPU_MMAP;GPT0;TAMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT0;TAMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT0;TAMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT0;TAMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT0;TAMR;TACINTD
CPU_MMAP;GPT0;TAMR;TACINTD;EN_TO_INTR
CPU_MMAP;GPT0;TAMR;TACINTD;DIS_TO_INTR
CPU_MMAP;GPT0;TAMR;TAPLO
CPU_MMAP;GPT0;TAMR;TAPLO;LEGACY
CPU_MMAP;GPT0;TAMR;TAPLO;CCP_ON_TO
CPU_MMAP;GPT0;TAMR;TAMRSU
CPU_MMAP;GPT0;TAMR;TAMRSU;CYCLEUPDATE
CPU_MMAP;GPT0;TAMR;TAMRSU;TOUPDATE
CPU_MMAP;GPT0;TAMR;TAPWMIE
CPU_MMAP;GPT0;TAMR;TAPWMIE;DIS
CPU_MMAP;GPT0;TAMR;TAPWMIE;EN
CPU_MMAP;GPT0;TAMR;TAILD
CPU_MMAP;GPT0;TAMR;TAILD;CYCLEUPDATE
CPU_MMAP;GPT0;TAMR;TAILD;TOUPDATE
CPU_MMAP;GPT0;TAMR;TASNAPS
CPU_MMAP;GPT0;TAMR;TASNAPS;DIS
CPU_MMAP;GPT0;TAMR;TASNAPS;EN
CPU_MMAP;GPT0;TAMR;TAWOT
CPU_MMAP;GPT0;TAMR;TAWOT;NOWAIT
CPU_MMAP;GPT0;TAMR;TAWOT;WAIT
CPU_MMAP;GPT0;TAMR;TAMIE
CPU_MMAP;GPT0;TAMR;TAMIE;DIS
CPU_MMAP;GPT0;TAMR;TAMIE;EN
CPU_MMAP;GPT0;TAMR;TACDIR
CPU_MMAP;GPT0;TAMR;TACDIR;DOWN
CPU_MMAP;GPT0;TAMR;TACDIR;UP
CPU_MMAP;GPT0;TAMR;TAAMS
CPU_MMAP;GPT0;TAMR;TAAMS;CAP_COMP
CPU_MMAP;GPT0;TAMR;TAAMS;PWM
CPU_MMAP;GPT0;TAMR;TACM
CPU_MMAP;GPT0;TAMR;TACM;EDGCNT
CPU_MMAP;GPT0;TAMR;TACM;EDGTIME
CPU_MMAP;GPT0;TAMR;TAMR
CPU_MMAP;GPT0;TAMR;TAMR;ONE_SHOT
CPU_MMAP;GPT0;TAMR;TAMR;PERIODIC
CPU_MMAP;GPT0;TAMR;TAMR;CAPTURE
CPU_MMAP;GPT0;TBMR
CPU_MMAP;GPT0;TBMR;RESERVED16
CPU_MMAP;GPT0;TBMR;TCACT
CPU_MMAP;GPT0;TBMR;TCACT;DIS_CMP
CPU_MMAP;GPT0;TBMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT0;TBMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT0;TBMR;TCACT;SET_ON_TO
CPU_MMAP;GPT0;TBMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT0;TBMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT0;TBMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT0;TBMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT0;TBMR;TBCINTD
CPU_MMAP;GPT0;TBMR;TBCINTD;EN_TO_INTR
CPU_MMAP;GPT0;TBMR;TBCINTD;DIS_TO_INTR
CPU_MMAP;GPT0;TBMR;TBPLO
CPU_MMAP;GPT0;TBMR;TBPLO;LEGACY
CPU_MMAP;GPT0;TBMR;TBPLO;CCP_ON_TO
CPU_MMAP;GPT0;TBMR;TBMRSU
CPU_MMAP;GPT0;TBMR;TBMRSU;CYCLEUPDATE
CPU_MMAP;GPT0;TBMR;TBMRSU;TOUPDATE
CPU_MMAP;GPT0;TBMR;TBPWMIE
CPU_MMAP;GPT0;TBMR;TBPWMIE;DIS
CPU_MMAP;GPT0;TBMR;TBPWMIE;EN
CPU_MMAP;GPT0;TBMR;TBILD
CPU_MMAP;GPT0;TBMR;TBILD;CYCLEUPDATE
CPU_MMAP;GPT0;TBMR;TBILD;TOUPDATE
CPU_MMAP;GPT0;TBMR;TBSNAPS
CPU_MMAP;GPT0;TBMR;TBSNAPS;DIS
CPU_MMAP;GPT0;TBMR;TBSNAPS;EN
CPU_MMAP;GPT0;TBMR;TBWOT
CPU_MMAP;GPT0;TBMR;TBWOT;NOWAIT
CPU_MMAP;GPT0;TBMR;TBWOT;WAIT
CPU_MMAP;GPT0;TBMR;TBMIE
CPU_MMAP;GPT0;TBMR;TBMIE;DIS
CPU_MMAP;GPT0;TBMR;TBMIE;EN
CPU_MMAP;GPT0;TBMR;TBCDIR
CPU_MMAP;GPT0;TBMR;TBCDIR;DOWN
CPU_MMAP;GPT0;TBMR;TBCDIR;UP
CPU_MMAP;GPT0;TBMR;TBAMS
CPU_MMAP;GPT0;TBMR;TBAMS;CAP_COMP
CPU_MMAP;GPT0;TBMR;TBAMS;PWM
CPU_MMAP;GPT0;TBMR;TBCM
CPU_MMAP;GPT0;TBMR;TBCM;EDGCNT
CPU_MMAP;GPT0;TBMR;TBCM;EDGTIME
CPU_MMAP;GPT0;TBMR;TBMR
CPU_MMAP;GPT0;TBMR;TBMR;ONE_SHOT
CPU_MMAP;GPT0;TBMR;TBMR;PERIODIC
CPU_MMAP;GPT0;TBMR;TBMR;CAPTURE
CPU_MMAP;GPT0;CTL
CPU_MMAP;GPT0;CTL;RESERVED15
CPU_MMAP;GPT0;CTL;TBPWML
CPU_MMAP;GPT0;CTL;TBPWML;NORMAL
CPU_MMAP;GPT0;CTL;TBPWML;INVERTED
CPU_MMAP;GPT0;CTL;TBOTE
CPU_MMAP;GPT0;CTL;TBOTE;DIS
CPU_MMAP;GPT0;CTL;TBOTE;EN
CPU_MMAP;GPT0;CTL;RESERVED12
CPU_MMAP;GPT0;CTL;TBEVENT
CPU_MMAP;GPT0;CTL;TBEVENT;POS
CPU_MMAP;GPT0;CTL;TBEVENT;NEG
CPU_MMAP;GPT0;CTL;TBEVENT;BOTH
CPU_MMAP;GPT0;CTL;TBSTALL
CPU_MMAP;GPT0;CTL;TBSTALL;DIS
CPU_MMAP;GPT0;CTL;TBSTALL;EN
CPU_MMAP;GPT0;CTL;TBEN
CPU_MMAP;GPT0;CTL;TBEN;DIS
CPU_MMAP;GPT0;CTL;TBEN;EN
CPU_MMAP;GPT0;CTL;RESERVED7
CPU_MMAP;GPT0;CTL;TAPWML
CPU_MMAP;GPT0;CTL;TAPWML;NORMAL
CPU_MMAP;GPT0;CTL;TAPWML;INVERTED
CPU_MMAP;GPT0;CTL;TAOTE
CPU_MMAP;GPT0;CTL;TAOTE;DIS
CPU_MMAP;GPT0;CTL;TAOTE;EN
CPU_MMAP;GPT0;CTL;RTCEN
CPU_MMAP;GPT0;CTL;RTCEN;DIS
CPU_MMAP;GPT0;CTL;RTCEN;EN
CPU_MMAP;GPT0;CTL;TAEVENT
CPU_MMAP;GPT0;CTL;TAEVENT;POS
CPU_MMAP;GPT0;CTL;TAEVENT;NEG
CPU_MMAP;GPT0;CTL;TAEVENT;BOTH
CPU_MMAP;GPT0;CTL;TASTALL
CPU_MMAP;GPT0;CTL;TASTALL;DIS
CPU_MMAP;GPT0;CTL;TASTALL;EN
CPU_MMAP;GPT0;CTL;TAEN
CPU_MMAP;GPT0;CTL;TAEN;DIS
CPU_MMAP;GPT0;CTL;TAEN;EN
CPU_MMAP;GPT0;SYNC
CPU_MMAP;GPT0;SYNC;RESERVED8
CPU_MMAP;GPT0;SYNC;SYNC3
CPU_MMAP;GPT0;SYNC;SYNC3;NOSYNC
CPU_MMAP;GPT0;SYNC;SYNC3;TIMERA
CPU_MMAP;GPT0;SYNC;SYNC3;TIMERB
CPU_MMAP;GPT0;SYNC;SYNC3;BOTH
CPU_MMAP;GPT0;SYNC;SYNC2
CPU_MMAP;GPT0;SYNC;SYNC2;NOSYNC
CPU_MMAP;GPT0;SYNC;SYNC2;TIMERA
CPU_MMAP;GPT0;SYNC;SYNC2;TIMERB
CPU_MMAP;GPT0;SYNC;SYNC2;BOTH
CPU_MMAP;GPT0;SYNC;SYNC1
CPU_MMAP;GPT0;SYNC;SYNC1;NOSYNC
CPU_MMAP;GPT0;SYNC;SYNC1;TIMERA
CPU_MMAP;GPT0;SYNC;SYNC1;TIMERB
CPU_MMAP;GPT0;SYNC;SYNC1;BOTH
CPU_MMAP;GPT0;SYNC;SYNC0
CPU_MMAP;GPT0;SYNC;SYNC0;NOSYNC
CPU_MMAP;GPT0;SYNC;SYNC0;TIMERA
CPU_MMAP;GPT0;SYNC;SYNC0;TIMERB
CPU_MMAP;GPT0;SYNC;SYNC0;BOTH
CPU_MMAP;GPT0;IMR
CPU_MMAP;GPT0;IMR;RESERVED17
CPU_MMAP;GPT0;IMR;WUMIS
CPU_MMAP;GPT0;IMR;WUMIS;DIS
CPU_MMAP;GPT0;IMR;WUMIS;EN
CPU_MMAP;GPT0;IMR;RESERVED14
CPU_MMAP;GPT0;IMR;DMABIM
CPU_MMAP;GPT0;IMR;DMABIM;DIS
CPU_MMAP;GPT0;IMR;DMABIM;EN
CPU_MMAP;GPT0;IMR;RESERVED12
CPU_MMAP;GPT0;IMR;TBMIM
CPU_MMAP;GPT0;IMR;TBMIM;DIS
CPU_MMAP;GPT0;IMR;TBMIM;EN
CPU_MMAP;GPT0;IMR;CBEIM
CPU_MMAP;GPT0;IMR;CBEIM;DIS
CPU_MMAP;GPT0;IMR;CBEIM;EN
CPU_MMAP;GPT0;IMR;CBMIM
CPU_MMAP;GPT0;IMR;CBMIM;DIS
CPU_MMAP;GPT0;IMR;CBMIM;EN
CPU_MMAP;GPT0;IMR;TBTOIM
CPU_MMAP;GPT0;IMR;TBTOIM;DIS
CPU_MMAP;GPT0;IMR;TBTOIM;EN
CPU_MMAP;GPT0;IMR;RESERVED6
CPU_MMAP;GPT0;IMR;DMAAIM
CPU_MMAP;GPT0;IMR;DMAAIM;DIS
CPU_MMAP;GPT0;IMR;DMAAIM;EN
CPU_MMAP;GPT0;IMR;TAMIM
CPU_MMAP;GPT0;IMR;TAMIM;DIS
CPU_MMAP;GPT0;IMR;TAMIM;EN
CPU_MMAP;GPT0;IMR;RTCIM
CPU_MMAP;GPT0;IMR;RTCIM;DIS
CPU_MMAP;GPT0;IMR;RTCIM;EN
CPU_MMAP;GPT0;IMR;CAEIM
CPU_MMAP;GPT0;IMR;CAEIM;DIS
CPU_MMAP;GPT0;IMR;CAEIM;EN
CPU_MMAP;GPT0;IMR;CAMIM
CPU_MMAP;GPT0;IMR;CAMIM;DIS
CPU_MMAP;GPT0;IMR;CAMIM;EN
CPU_MMAP;GPT0;IMR;TATOIM
CPU_MMAP;GPT0;IMR;TATOIM;DIS
CPU_MMAP;GPT0;IMR;TATOIM;EN
CPU_MMAP;GPT0;RIS
CPU_MMAP;GPT0;RIS;RESERVED17
CPU_MMAP;GPT0;RIS;WURIS
CPU_MMAP;GPT0;RIS;RESERVED14
CPU_MMAP;GPT0;RIS;DMABRIS
CPU_MMAP;GPT0;RIS;RESERVED12
CPU_MMAP;GPT0;RIS;TBMRIS
CPU_MMAP;GPT0;RIS;CBERIS
CPU_MMAP;GPT0;RIS;CBMRIS
CPU_MMAP;GPT0;RIS;TBTORIS
CPU_MMAP;GPT0;RIS;RESERVED6
CPU_MMAP;GPT0;RIS;DMAARIS
CPU_MMAP;GPT0;RIS;TAMRIS
CPU_MMAP;GPT0;RIS;RTCRIS
CPU_MMAP;GPT0;RIS;CAERIS
CPU_MMAP;GPT0;RIS;CAMRIS
CPU_MMAP;GPT0;RIS;TATORIS
CPU_MMAP;GPT0;MIS
CPU_MMAP;GPT0;MIS;RESERVED17
CPU_MMAP;GPT0;MIS;WUMIS
CPU_MMAP;GPT0;MIS;RESERVED14
CPU_MMAP;GPT0;MIS;DMABMIS
CPU_MMAP;GPT0;MIS;RESERVED12
CPU_MMAP;GPT0;MIS;TBMMIS
CPU_MMAP;GPT0;MIS;CBEMIS
CPU_MMAP;GPT0;MIS;CBMMIS
CPU_MMAP;GPT0;MIS;TBTOMIS
CPU_MMAP;GPT0;MIS;RESERVED6
CPU_MMAP;GPT0;MIS;DMAAMIS
CPU_MMAP;GPT0;MIS;TAMMIS
CPU_MMAP;GPT0;MIS;RTCMIS
CPU_MMAP;GPT0;MIS;CAEMIS
CPU_MMAP;GPT0;MIS;CAMMIS
CPU_MMAP;GPT0;MIS;TATOMIS
CPU_MMAP;GPT0;ICLR
CPU_MMAP;GPT0;ICLR;RESERVED17
CPU_MMAP;GPT0;ICLR;WUECINT
CPU_MMAP;GPT0;ICLR;RESERVED14
CPU_MMAP;GPT0;ICLR;DMABINT
CPU_MMAP;GPT0;ICLR;RESERVED12
CPU_MMAP;GPT0;ICLR;TBMCINT
CPU_MMAP;GPT0;ICLR;CBECINT
CPU_MMAP;GPT0;ICLR;CBMCINT
CPU_MMAP;GPT0;ICLR;TBTOCINT
CPU_MMAP;GPT0;ICLR;RESERVED6
CPU_MMAP;GPT0;ICLR;DMAAINT
CPU_MMAP;GPT0;ICLR;TAMCINT
CPU_MMAP;GPT0;ICLR;RTCCINT
CPU_MMAP;GPT0;ICLR;CAECINT
CPU_MMAP;GPT0;ICLR;CAMCINT
CPU_MMAP;GPT0;ICLR;TATOCINT
CPU_MMAP;GPT0;TAILR
CPU_MMAP;GPT0;TAILR;TAILR
CPU_MMAP;GPT0;TBILR
CPU_MMAP;GPT0;TBILR;TBILR
CPU_MMAP;GPT0;TAMATCHR
CPU_MMAP;GPT0;TAMATCHR;TAMATCHR
CPU_MMAP;GPT0;TBMATCHR
CPU_MMAP;GPT0;TBMATCHR;TBMATCHR
CPU_MMAP;GPT0;TAPR
CPU_MMAP;GPT0;TAPR;RESERVED8
CPU_MMAP;GPT0;TAPR;TAPSR
CPU_MMAP;GPT0;TBPR
CPU_MMAP;GPT0;TBPR;RESERVED8
CPU_MMAP;GPT0;TBPR;TBPSR
CPU_MMAP;GPT0;TAPMR
CPU_MMAP;GPT0;TAPMR;RESERVED8
CPU_MMAP;GPT0;TAPMR;TAPSMR
CPU_MMAP;GPT0;TBPMR
CPU_MMAP;GPT0;TBPMR;RESERVED8
CPU_MMAP;GPT0;TBPMR;TBPSMR
CPU_MMAP;GPT0;TAR
CPU_MMAP;GPT0;TAR;TAR
CPU_MMAP;GPT0;TBR
CPU_MMAP;GPT0;TBR;TBR
CPU_MMAP;GPT0;TAV
CPU_MMAP;GPT0;TAV;TAV
CPU_MMAP;GPT0;TBV
CPU_MMAP;GPT0;TBV;TBV
CPU_MMAP;GPT0;RTCPD
CPU_MMAP;GPT0;RTCPD;RESERVED16
CPU_MMAP;GPT0;RTCPD;RTCPD
CPU_MMAP;GPT0;TAPS
CPU_MMAP;GPT0;TAPS;RESERVED16
CPU_MMAP;GPT0;TAPS;PSS
CPU_MMAP;GPT0;TBPS
CPU_MMAP;GPT0;TBPS;RESERVED16
CPU_MMAP;GPT0;TBPS;PSS
CPU_MMAP;GPT0;TAPV
CPU_MMAP;GPT0;TAPV;RESERVED16
CPU_MMAP;GPT0;TAPV;PSV
CPU_MMAP;GPT0;TBPV
CPU_MMAP;GPT0;TBPV;RESERVED16
CPU_MMAP;GPT0;TBPV;PSV
CPU_MMAP;GPT0;DMAEV
CPU_MMAP;GPT0;DMAEV;RESERVED12
CPU_MMAP;GPT0;DMAEV;TBMDMAEN
CPU_MMAP;GPT0;DMAEV;CBEDMAEN
CPU_MMAP;GPT0;DMAEV;CBMDMAEN
CPU_MMAP;GPT0;DMAEV;TBTODMAEN
CPU_MMAP;GPT0;DMAEV;RESERVED5
CPU_MMAP;GPT0;DMAEV;TAMDMAEN
CPU_MMAP;GPT0;DMAEV;RTCDMAEN
CPU_MMAP;GPT0;DMAEV;CAEDMAEN
CPU_MMAP;GPT0;DMAEV;CAMDMAEN
CPU_MMAP;GPT0;DMAEV;TATODMAEN
CPU_MMAP;GPT0;ADCEV
CPU_MMAP;GPT0;ADCEV;RESERVED12
CPU_MMAP;GPT0;ADCEV;TBMADCEN
CPU_MMAP;GPT0;ADCEV;CBEADCEN
CPU_MMAP;GPT0;ADCEV;CBMADCEN
CPU_MMAP;GPT0;ADCEV;TBTOADCEN
CPU_MMAP;GPT0;ADCEV;RESERVED5
CPU_MMAP;GPT0;ADCEV;TAMADCEN
CPU_MMAP;GPT0;ADCEV;RTCADCEN
CPU_MMAP;GPT0;ADCEV;CAEADCEN
CPU_MMAP;GPT0;ADCEV;CAMADCEN
CPU_MMAP;GPT0;ADCEV;TATOADCEN
CPU_MMAP;GPT0;VERSION
CPU_MMAP;GPT0;VERSION;VERSION
CPU_MMAP;GPT0;ANDCCP
CPU_MMAP;GPT0;ANDCCP;RESERVED1
CPU_MMAP;GPT0;ANDCCP;CCP_AND_EN
CPU_MMAP;GPT1
CPU_MMAP;GPT1;CFG
CPU_MMAP;GPT1;CFG;RESERVED3
CPU_MMAP;GPT1;CFG;CFG
CPU_MMAP;GPT1;CFG;CFG;32BIT_TIMER
CPU_MMAP;GPT1;CFG;CFG;REALTIME_CLOCK
CPU_MMAP;GPT1;CFG;CFG;16BIT_TIMER
CPU_MMAP;GPT1;TAMR
CPU_MMAP;GPT1;TAMR;RESERVED16
CPU_MMAP;GPT1;TAMR;TCACT
CPU_MMAP;GPT1;TAMR;TCACT;DIS_CMP
CPU_MMAP;GPT1;TAMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT1;TAMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT1;TAMR;TCACT;SET_ON_TO
CPU_MMAP;GPT1;TAMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT1;TAMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT1;TAMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT1;TAMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT1;TAMR;TACINTD
CPU_MMAP;GPT1;TAMR;TACINTD;EN_TO_INTR
CPU_MMAP;GPT1;TAMR;TACINTD;DIS_TO_INTR
CPU_MMAP;GPT1;TAMR;TAPLO
CPU_MMAP;GPT1;TAMR;TAPLO;LEGACY
CPU_MMAP;GPT1;TAMR;TAPLO;CCP_ON_TO
CPU_MMAP;GPT1;TAMR;TAMRSU
CPU_MMAP;GPT1;TAMR;TAMRSU;CYCLEUPDATE
CPU_MMAP;GPT1;TAMR;TAMRSU;TOUPDATE
CPU_MMAP;GPT1;TAMR;TAPWMIE
CPU_MMAP;GPT1;TAMR;TAPWMIE;DIS
CPU_MMAP;GPT1;TAMR;TAPWMIE;EN
CPU_MMAP;GPT1;TAMR;TAILD
CPU_MMAP;GPT1;TAMR;TAILD;CYCLEUPDATE
CPU_MMAP;GPT1;TAMR;TAILD;TOUPDATE
CPU_MMAP;GPT1;TAMR;TASNAPS
CPU_MMAP;GPT1;TAMR;TASNAPS;DIS
CPU_MMAP;GPT1;TAMR;TASNAPS;EN
CPU_MMAP;GPT1;TAMR;TAWOT
CPU_MMAP;GPT1;TAMR;TAWOT;NOWAIT
CPU_MMAP;GPT1;TAMR;TAWOT;WAIT
CPU_MMAP;GPT1;TAMR;TAMIE
CPU_MMAP;GPT1;TAMR;TAMIE;DIS
CPU_MMAP;GPT1;TAMR;TAMIE;EN
CPU_MMAP;GPT1;TAMR;TACDIR
CPU_MMAP;GPT1;TAMR;TACDIR;DOWN
CPU_MMAP;GPT1;TAMR;TACDIR;UP
CPU_MMAP;GPT1;TAMR;TAAMS
CPU_MMAP;GPT1;TAMR;TAAMS;CAP_COMP
CPU_MMAP;GPT1;TAMR;TAAMS;PWM
CPU_MMAP;GPT1;TAMR;TACM
CPU_MMAP;GPT1;TAMR;TACM;EDGCNT
CPU_MMAP;GPT1;TAMR;TACM;EDGTIME
CPU_MMAP;GPT1;TAMR;TAMR
CPU_MMAP;GPT1;TAMR;TAMR;ONE_SHOT
CPU_MMAP;GPT1;TAMR;TAMR;PERIODIC
CPU_MMAP;GPT1;TAMR;TAMR;CAPTURE
CPU_MMAP;GPT1;TBMR
CPU_MMAP;GPT1;TBMR;RESERVED16
CPU_MMAP;GPT1;TBMR;TCACT
CPU_MMAP;GPT1;TBMR;TCACT;DIS_CMP
CPU_MMAP;GPT1;TBMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT1;TBMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT1;TBMR;TCACT;SET_ON_TO
CPU_MMAP;GPT1;TBMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT1;TBMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT1;TBMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT1;TBMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT1;TBMR;TBCINTD
CPU_MMAP;GPT1;TBMR;TBCINTD;EN_TO_INTR
CPU_MMAP;GPT1;TBMR;TBCINTD;DIS_TO_INTR
CPU_MMAP;GPT1;TBMR;TBPLO
CPU_MMAP;GPT1;TBMR;TBPLO;LEGACY
CPU_MMAP;GPT1;TBMR;TBPLO;CCP_ON_TO
CPU_MMAP;GPT1;TBMR;TBMRSU
CPU_MMAP;GPT1;TBMR;TBMRSU;CYCLEUPDATE
CPU_MMAP;GPT1;TBMR;TBMRSU;TOUPDATE
CPU_MMAP;GPT1;TBMR;TBPWMIE
CPU_MMAP;GPT1;TBMR;TBPWMIE;DIS
CPU_MMAP;GPT1;TBMR;TBPWMIE;EN
CPU_MMAP;GPT1;TBMR;TBILD
CPU_MMAP;GPT1;TBMR;TBILD;CYCLEUPDATE
CPU_MMAP;GPT1;TBMR;TBILD;TOUPDATE
CPU_MMAP;GPT1;TBMR;TBSNAPS
CPU_MMAP;GPT1;TBMR;TBSNAPS;DIS
CPU_MMAP;GPT1;TBMR;TBSNAPS;EN
CPU_MMAP;GPT1;TBMR;TBWOT
CPU_MMAP;GPT1;TBMR;TBWOT;NOWAIT
CPU_MMAP;GPT1;TBMR;TBWOT;WAIT
CPU_MMAP;GPT1;TBMR;TBMIE
CPU_MMAP;GPT1;TBMR;TBMIE;DIS
CPU_MMAP;GPT1;TBMR;TBMIE;EN
CPU_MMAP;GPT1;TBMR;TBCDIR
CPU_MMAP;GPT1;TBMR;TBCDIR;DOWN
CPU_MMAP;GPT1;TBMR;TBCDIR;UP
CPU_MMAP;GPT1;TBMR;TBAMS
CPU_MMAP;GPT1;TBMR;TBAMS;CAP_COMP
CPU_MMAP;GPT1;TBMR;TBAMS;PWM
CPU_MMAP;GPT1;TBMR;TBCM
CPU_MMAP;GPT1;TBMR;TBCM;EDGCNT
CPU_MMAP;GPT1;TBMR;TBCM;EDGTIME
CPU_MMAP;GPT1;TBMR;TBMR
CPU_MMAP;GPT1;TBMR;TBMR;ONE_SHOT
CPU_MMAP;GPT1;TBMR;TBMR;PERIODIC
CPU_MMAP;GPT1;TBMR;TBMR;CAPTURE
CPU_MMAP;GPT1;CTL
CPU_MMAP;GPT1;CTL;RESERVED15
CPU_MMAP;GPT1;CTL;TBPWML
CPU_MMAP;GPT1;CTL;TBPWML;NORMAL
CPU_MMAP;GPT1;CTL;TBPWML;INVERTED
CPU_MMAP;GPT1;CTL;TBOTE
CPU_MMAP;GPT1;CTL;TBOTE;DIS
CPU_MMAP;GPT1;CTL;TBOTE;EN
CPU_MMAP;GPT1;CTL;RESERVED12
CPU_MMAP;GPT1;CTL;TBEVENT
CPU_MMAP;GPT1;CTL;TBEVENT;POS
CPU_MMAP;GPT1;CTL;TBEVENT;NEG
CPU_MMAP;GPT1;CTL;TBEVENT;BOTH
CPU_MMAP;GPT1;CTL;TBSTALL
CPU_MMAP;GPT1;CTL;TBSTALL;DIS
CPU_MMAP;GPT1;CTL;TBSTALL;EN
CPU_MMAP;GPT1;CTL;TBEN
CPU_MMAP;GPT1;CTL;TBEN;DIS
CPU_MMAP;GPT1;CTL;TBEN;EN
CPU_MMAP;GPT1;CTL;RESERVED7
CPU_MMAP;GPT1;CTL;TAPWML
CPU_MMAP;GPT1;CTL;TAPWML;NORMAL
CPU_MMAP;GPT1;CTL;TAPWML;INVERTED
CPU_MMAP;GPT1;CTL;TAOTE
CPU_MMAP;GPT1;CTL;TAOTE;DIS
CPU_MMAP;GPT1;CTL;TAOTE;EN
CPU_MMAP;GPT1;CTL;RTCEN
CPU_MMAP;GPT1;CTL;RTCEN;DIS
CPU_MMAP;GPT1;CTL;RTCEN;EN
CPU_MMAP;GPT1;CTL;TAEVENT
CPU_MMAP;GPT1;CTL;TAEVENT;POS
CPU_MMAP;GPT1;CTL;TAEVENT;NEG
CPU_MMAP;GPT1;CTL;TAEVENT;BOTH
CPU_MMAP;GPT1;CTL;TASTALL
CPU_MMAP;GPT1;CTL;TASTALL;DIS
CPU_MMAP;GPT1;CTL;TASTALL;EN
CPU_MMAP;GPT1;CTL;TAEN
CPU_MMAP;GPT1;CTL;TAEN;DIS
CPU_MMAP;GPT1;CTL;TAEN;EN
CPU_MMAP;GPT1;SYNC
CPU_MMAP;GPT1;SYNC;RESERVED8
CPU_MMAP;GPT1;SYNC;SYNC3
CPU_MMAP;GPT1;SYNC;SYNC3;NOSYNC
CPU_MMAP;GPT1;SYNC;SYNC3;TIMERA
CPU_MMAP;GPT1;SYNC;SYNC3;TIMERB
CPU_MMAP;GPT1;SYNC;SYNC3;BOTH
CPU_MMAP;GPT1;SYNC;SYNC2
CPU_MMAP;GPT1;SYNC;SYNC2;NOSYNC
CPU_MMAP;GPT1;SYNC;SYNC2;TIMERA
CPU_MMAP;GPT1;SYNC;SYNC2;TIMERB
CPU_MMAP;GPT1;SYNC;SYNC2;BOTH
CPU_MMAP;GPT1;SYNC;SYNC1
CPU_MMAP;GPT1;SYNC;SYNC1;NOSYNC
CPU_MMAP;GPT1;SYNC;SYNC1;TIMERA
CPU_MMAP;GPT1;SYNC;SYNC1;TIMERB
CPU_MMAP;GPT1;SYNC;SYNC1;BOTH
CPU_MMAP;GPT1;SYNC;SYNC0
CPU_MMAP;GPT1;SYNC;SYNC0;NOSYNC
CPU_MMAP;GPT1;SYNC;SYNC0;TIMERA
CPU_MMAP;GPT1;SYNC;SYNC0;TIMERB
CPU_MMAP;GPT1;SYNC;SYNC0;BOTH
CPU_MMAP;GPT1;IMR
CPU_MMAP;GPT1;IMR;RESERVED17
CPU_MMAP;GPT1;IMR;WUMIS
CPU_MMAP;GPT1;IMR;WUMIS;DIS
CPU_MMAP;GPT1;IMR;WUMIS;EN
CPU_MMAP;GPT1;IMR;RESERVED14
CPU_MMAP;GPT1;IMR;DMABIM
CPU_MMAP;GPT1;IMR;DMABIM;DIS
CPU_MMAP;GPT1;IMR;DMABIM;EN
CPU_MMAP;GPT1;IMR;RESERVED12
CPU_MMAP;GPT1;IMR;TBMIM
CPU_MMAP;GPT1;IMR;TBMIM;DIS
CPU_MMAP;GPT1;IMR;TBMIM;EN
CPU_MMAP;GPT1;IMR;CBEIM
CPU_MMAP;GPT1;IMR;CBEIM;DIS
CPU_MMAP;GPT1;IMR;CBEIM;EN
CPU_MMAP;GPT1;IMR;CBMIM
CPU_MMAP;GPT1;IMR;CBMIM;DIS
CPU_MMAP;GPT1;IMR;CBMIM;EN
CPU_MMAP;GPT1;IMR;TBTOIM
CPU_MMAP;GPT1;IMR;TBTOIM;DIS
CPU_MMAP;GPT1;IMR;TBTOIM;EN
CPU_MMAP;GPT1;IMR;RESERVED6
CPU_MMAP;GPT1;IMR;DMAAIM
CPU_MMAP;GPT1;IMR;DMAAIM;DIS
CPU_MMAP;GPT1;IMR;DMAAIM;EN
CPU_MMAP;GPT1;IMR;TAMIM
CPU_MMAP;GPT1;IMR;TAMIM;DIS
CPU_MMAP;GPT1;IMR;TAMIM;EN
CPU_MMAP;GPT1;IMR;RTCIM
CPU_MMAP;GPT1;IMR;RTCIM;DIS
CPU_MMAP;GPT1;IMR;RTCIM;EN
CPU_MMAP;GPT1;IMR;CAEIM
CPU_MMAP;GPT1;IMR;CAEIM;DIS
CPU_MMAP;GPT1;IMR;CAEIM;EN
CPU_MMAP;GPT1;IMR;CAMIM
CPU_MMAP;GPT1;IMR;CAMIM;DIS
CPU_MMAP;GPT1;IMR;CAMIM;EN
CPU_MMAP;GPT1;IMR;TATOIM
CPU_MMAP;GPT1;IMR;TATOIM;DIS
CPU_MMAP;GPT1;IMR;TATOIM;EN
CPU_MMAP;GPT1;RIS
CPU_MMAP;GPT1;RIS;RESERVED17
CPU_MMAP;GPT1;RIS;WURIS
CPU_MMAP;GPT1;RIS;RESERVED14
CPU_MMAP;GPT1;RIS;DMABRIS
CPU_MMAP;GPT1;RIS;RESERVED12
CPU_MMAP;GPT1;RIS;TBMRIS
CPU_MMAP;GPT1;RIS;CBERIS
CPU_MMAP;GPT1;RIS;CBMRIS
CPU_MMAP;GPT1;RIS;TBTORIS
CPU_MMAP;GPT1;RIS;RESERVED6
CPU_MMAP;GPT1;RIS;DMAARIS
CPU_MMAP;GPT1;RIS;TAMRIS
CPU_MMAP;GPT1;RIS;RTCRIS
CPU_MMAP;GPT1;RIS;CAERIS
CPU_MMAP;GPT1;RIS;CAMRIS
CPU_MMAP;GPT1;RIS;TATORIS
CPU_MMAP;GPT1;MIS
CPU_MMAP;GPT1;MIS;RESERVED17
CPU_MMAP;GPT1;MIS;WUMIS
CPU_MMAP;GPT1;MIS;RESERVED14
CPU_MMAP;GPT1;MIS;DMABMIS
CPU_MMAP;GPT1;MIS;RESERVED12
CPU_MMAP;GPT1;MIS;TBMMIS
CPU_MMAP;GPT1;MIS;CBEMIS
CPU_MMAP;GPT1;MIS;CBMMIS
CPU_MMAP;GPT1;MIS;TBTOMIS
CPU_MMAP;GPT1;MIS;RESERVED6
CPU_MMAP;GPT1;MIS;DMAAMIS
CPU_MMAP;GPT1;MIS;TAMMIS
CPU_MMAP;GPT1;MIS;RTCMIS
CPU_MMAP;GPT1;MIS;CAEMIS
CPU_MMAP;GPT1;MIS;CAMMIS
CPU_MMAP;GPT1;MIS;TATOMIS
CPU_MMAP;GPT1;ICLR
CPU_MMAP;GPT1;ICLR;RESERVED17
CPU_MMAP;GPT1;ICLR;WUECINT
CPU_MMAP;GPT1;ICLR;RESERVED14
CPU_MMAP;GPT1;ICLR;DMABINT
CPU_MMAP;GPT1;ICLR;RESERVED12
CPU_MMAP;GPT1;ICLR;TBMCINT
CPU_MMAP;GPT1;ICLR;CBECINT
CPU_MMAP;GPT1;ICLR;CBMCINT
CPU_MMAP;GPT1;ICLR;TBTOCINT
CPU_MMAP;GPT1;ICLR;RESERVED6
CPU_MMAP;GPT1;ICLR;DMAAINT
CPU_MMAP;GPT1;ICLR;TAMCINT
CPU_MMAP;GPT1;ICLR;RTCCINT
CPU_MMAP;GPT1;ICLR;CAECINT
CPU_MMAP;GPT1;ICLR;CAMCINT
CPU_MMAP;GPT1;ICLR;TATOCINT
CPU_MMAP;GPT1;TAILR
CPU_MMAP;GPT1;TAILR;TAILR
CPU_MMAP;GPT1;TBILR
CPU_MMAP;GPT1;TBILR;TBILR
CPU_MMAP;GPT1;TAMATCHR
CPU_MMAP;GPT1;TAMATCHR;TAMATCHR
CPU_MMAP;GPT1;TBMATCHR
CPU_MMAP;GPT1;TBMATCHR;TBMATCHR
CPU_MMAP;GPT1;TAPR
CPU_MMAP;GPT1;TAPR;RESERVED8
CPU_MMAP;GPT1;TAPR;TAPSR
CPU_MMAP;GPT1;TBPR
CPU_MMAP;GPT1;TBPR;RESERVED8
CPU_MMAP;GPT1;TBPR;TBPSR
CPU_MMAP;GPT1;TAPMR
CPU_MMAP;GPT1;TAPMR;RESERVED8
CPU_MMAP;GPT1;TAPMR;TAPSMR
CPU_MMAP;GPT1;TBPMR
CPU_MMAP;GPT1;TBPMR;RESERVED8
CPU_MMAP;GPT1;TBPMR;TBPSMR
CPU_MMAP;GPT1;TAR
CPU_MMAP;GPT1;TAR;TAR
CPU_MMAP;GPT1;TBR
CPU_MMAP;GPT1;TBR;TBR
CPU_MMAP;GPT1;TAV
CPU_MMAP;GPT1;TAV;TAV
CPU_MMAP;GPT1;TBV
CPU_MMAP;GPT1;TBV;TBV
CPU_MMAP;GPT1;RTCPD
CPU_MMAP;GPT1;RTCPD;RESERVED16
CPU_MMAP;GPT1;RTCPD;RTCPD
CPU_MMAP;GPT1;TAPS
CPU_MMAP;GPT1;TAPS;RESERVED16
CPU_MMAP;GPT1;TAPS;PSS
CPU_MMAP;GPT1;TBPS
CPU_MMAP;GPT1;TBPS;RESERVED16
CPU_MMAP;GPT1;TBPS;PSS
CPU_MMAP;GPT1;TAPV
CPU_MMAP;GPT1;TAPV;RESERVED16
CPU_MMAP;GPT1;TAPV;PSV
CPU_MMAP;GPT1;TBPV
CPU_MMAP;GPT1;TBPV;RESERVED16
CPU_MMAP;GPT1;TBPV;PSV
CPU_MMAP;GPT1;DMAEV
CPU_MMAP;GPT1;DMAEV;RESERVED12
CPU_MMAP;GPT1;DMAEV;TBMDMAEN
CPU_MMAP;GPT1;DMAEV;CBEDMAEN
CPU_MMAP;GPT1;DMAEV;CBMDMAEN
CPU_MMAP;GPT1;DMAEV;TBTODMAEN
CPU_MMAP;GPT1;DMAEV;RESERVED5
CPU_MMAP;GPT1;DMAEV;TAMDMAEN
CPU_MMAP;GPT1;DMAEV;RTCDMAEN
CPU_MMAP;GPT1;DMAEV;CAEDMAEN
CPU_MMAP;GPT1;DMAEV;CAMDMAEN
CPU_MMAP;GPT1;DMAEV;TATODMAEN
CPU_MMAP;GPT1;ADCEV
CPU_MMAP;GPT1;ADCEV;RESERVED12
CPU_MMAP;GPT1;ADCEV;TBMADCEN
CPU_MMAP;GPT1;ADCEV;CBEADCEN
CPU_MMAP;GPT1;ADCEV;CBMADCEN
CPU_MMAP;GPT1;ADCEV;TBTOADCEN
CPU_MMAP;GPT1;ADCEV;RESERVED5
CPU_MMAP;GPT1;ADCEV;TAMADCEN
CPU_MMAP;GPT1;ADCEV;RTCADCEN
CPU_MMAP;GPT1;ADCEV;CAEADCEN
CPU_MMAP;GPT1;ADCEV;CAMADCEN
CPU_MMAP;GPT1;ADCEV;TATOADCEN
CPU_MMAP;GPT1;VERSION
CPU_MMAP;GPT1;VERSION;VERSION
CPU_MMAP;GPT1;ANDCCP
CPU_MMAP;GPT1;ANDCCP;RESERVED1
CPU_MMAP;GPT1;ANDCCP;CCP_AND_EN
CPU_MMAP;GPT2
CPU_MMAP;GPT2;CFG
CPU_MMAP;GPT2;CFG;RESERVED3
CPU_MMAP;GPT2;CFG;CFG
CPU_MMAP;GPT2;CFG;CFG;32BIT_TIMER
CPU_MMAP;GPT2;CFG;CFG;REALTIME_CLOCK
CPU_MMAP;GPT2;CFG;CFG;16BIT_TIMER
CPU_MMAP;GPT2;TAMR
CPU_MMAP;GPT2;TAMR;RESERVED16
CPU_MMAP;GPT2;TAMR;TCACT
CPU_MMAP;GPT2;TAMR;TCACT;DIS_CMP
CPU_MMAP;GPT2;TAMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT2;TAMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT2;TAMR;TCACT;SET_ON_TO
CPU_MMAP;GPT2;TAMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT2;TAMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT2;TAMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT2;TAMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT2;TAMR;TACINTD
CPU_MMAP;GPT2;TAMR;TACINTD;EN_TO_INTR
CPU_MMAP;GPT2;TAMR;TACINTD;DIS_TO_INTR
CPU_MMAP;GPT2;TAMR;TAPLO
CPU_MMAP;GPT2;TAMR;TAPLO;LEGACY
CPU_MMAP;GPT2;TAMR;TAPLO;CCP_ON_TO
CPU_MMAP;GPT2;TAMR;TAMRSU
CPU_MMAP;GPT2;TAMR;TAMRSU;CYCLEUPDATE
CPU_MMAP;GPT2;TAMR;TAMRSU;TOUPDATE
CPU_MMAP;GPT2;TAMR;TAPWMIE
CPU_MMAP;GPT2;TAMR;TAPWMIE;DIS
CPU_MMAP;GPT2;TAMR;TAPWMIE;EN
CPU_MMAP;GPT2;TAMR;TAILD
CPU_MMAP;GPT2;TAMR;TAILD;CYCLEUPDATE
CPU_MMAP;GPT2;TAMR;TAILD;TOUPDATE
CPU_MMAP;GPT2;TAMR;TASNAPS
CPU_MMAP;GPT2;TAMR;TASNAPS;DIS
CPU_MMAP;GPT2;TAMR;TASNAPS;EN
CPU_MMAP;GPT2;TAMR;TAWOT
CPU_MMAP;GPT2;TAMR;TAWOT;NOWAIT
CPU_MMAP;GPT2;TAMR;TAWOT;WAIT
CPU_MMAP;GPT2;TAMR;TAMIE
CPU_MMAP;GPT2;TAMR;TAMIE;DIS
CPU_MMAP;GPT2;TAMR;TAMIE;EN
CPU_MMAP;GPT2;TAMR;TACDIR
CPU_MMAP;GPT2;TAMR;TACDIR;DOWN
CPU_MMAP;GPT2;TAMR;TACDIR;UP
CPU_MMAP;GPT2;TAMR;TAAMS
CPU_MMAP;GPT2;TAMR;TAAMS;CAP_COMP
CPU_MMAP;GPT2;TAMR;TAAMS;PWM
CPU_MMAP;GPT2;TAMR;TACM
CPU_MMAP;GPT2;TAMR;TACM;EDGCNT
CPU_MMAP;GPT2;TAMR;TACM;EDGTIME
CPU_MMAP;GPT2;TAMR;TAMR
CPU_MMAP;GPT2;TAMR;TAMR;ONE_SHOT
CPU_MMAP;GPT2;TAMR;TAMR;PERIODIC
CPU_MMAP;GPT2;TAMR;TAMR;CAPTURE
CPU_MMAP;GPT2;TBMR
CPU_MMAP;GPT2;TBMR;RESERVED16
CPU_MMAP;GPT2;TBMR;TCACT
CPU_MMAP;GPT2;TBMR;TCACT;DIS_CMP
CPU_MMAP;GPT2;TBMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT2;TBMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT2;TBMR;TCACT;SET_ON_TO
CPU_MMAP;GPT2;TBMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT2;TBMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT2;TBMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT2;TBMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT2;TBMR;TBCINTD
CPU_MMAP;GPT2;TBMR;TBCINTD;EN_TO_INTR
CPU_MMAP;GPT2;TBMR;TBCINTD;DIS_TO_INTR
CPU_MMAP;GPT2;TBMR;TBPLO
CPU_MMAP;GPT2;TBMR;TBPLO;LEGACY
CPU_MMAP;GPT2;TBMR;TBPLO;CCP_ON_TO
CPU_MMAP;GPT2;TBMR;TBMRSU
CPU_MMAP;GPT2;TBMR;TBMRSU;CYCLEUPDATE
CPU_MMAP;GPT2;TBMR;TBMRSU;TOUPDATE
CPU_MMAP;GPT2;TBMR;TBPWMIE
CPU_MMAP;GPT2;TBMR;TBPWMIE;DIS
CPU_MMAP;GPT2;TBMR;TBPWMIE;EN
CPU_MMAP;GPT2;TBMR;TBILD
CPU_MMAP;GPT2;TBMR;TBILD;CYCLEUPDATE
CPU_MMAP;GPT2;TBMR;TBILD;TOUPDATE
CPU_MMAP;GPT2;TBMR;TBSNAPS
CPU_MMAP;GPT2;TBMR;TBSNAPS;DIS
CPU_MMAP;GPT2;TBMR;TBSNAPS;EN
CPU_MMAP;GPT2;TBMR;TBWOT
CPU_MMAP;GPT2;TBMR;TBWOT;NOWAIT
CPU_MMAP;GPT2;TBMR;TBWOT;WAIT
CPU_MMAP;GPT2;TBMR;TBMIE
CPU_MMAP;GPT2;TBMR;TBMIE;DIS
CPU_MMAP;GPT2;TBMR;TBMIE;EN
CPU_MMAP;GPT2;TBMR;TBCDIR
CPU_MMAP;GPT2;TBMR;TBCDIR;DOWN
CPU_MMAP;GPT2;TBMR;TBCDIR;UP
CPU_MMAP;GPT2;TBMR;TBAMS
CPU_MMAP;GPT2;TBMR;TBAMS;CAP_COMP
CPU_MMAP;GPT2;TBMR;TBAMS;PWM
CPU_MMAP;GPT2;TBMR;TBCM
CPU_MMAP;GPT2;TBMR;TBCM;EDGCNT
CPU_MMAP;GPT2;TBMR;TBCM;EDGTIME
CPU_MMAP;GPT2;TBMR;TBMR
CPU_MMAP;GPT2;TBMR;TBMR;ONE_SHOT
CPU_MMAP;GPT2;TBMR;TBMR;PERIODIC
CPU_MMAP;GPT2;TBMR;TBMR;CAPTURE
CPU_MMAP;GPT2;CTL
CPU_MMAP;GPT2;CTL;RESERVED15
CPU_MMAP;GPT2;CTL;TBPWML
CPU_MMAP;GPT2;CTL;TBPWML;NORMAL
CPU_MMAP;GPT2;CTL;TBPWML;INVERTED
CPU_MMAP;GPT2;CTL;TBOTE
CPU_MMAP;GPT2;CTL;TBOTE;DIS
CPU_MMAP;GPT2;CTL;TBOTE;EN
CPU_MMAP;GPT2;CTL;RESERVED12
CPU_MMAP;GPT2;CTL;TBEVENT
CPU_MMAP;GPT2;CTL;TBEVENT;POS
CPU_MMAP;GPT2;CTL;TBEVENT;NEG
CPU_MMAP;GPT2;CTL;TBEVENT;BOTH
CPU_MMAP;GPT2;CTL;TBSTALL
CPU_MMAP;GPT2;CTL;TBSTALL;DIS
CPU_MMAP;GPT2;CTL;TBSTALL;EN
CPU_MMAP;GPT2;CTL;TBEN
CPU_MMAP;GPT2;CTL;TBEN;DIS
CPU_MMAP;GPT2;CTL;TBEN;EN
CPU_MMAP;GPT2;CTL;RESERVED7
CPU_MMAP;GPT2;CTL;TAPWML
CPU_MMAP;GPT2;CTL;TAPWML;NORMAL
CPU_MMAP;GPT2;CTL;TAPWML;INVERTED
CPU_MMAP;GPT2;CTL;TAOTE
CPU_MMAP;GPT2;CTL;TAOTE;DIS
CPU_MMAP;GPT2;CTL;TAOTE;EN
CPU_MMAP;GPT2;CTL;RTCEN
CPU_MMAP;GPT2;CTL;RTCEN;DIS
CPU_MMAP;GPT2;CTL;RTCEN;EN
CPU_MMAP;GPT2;CTL;TAEVENT
CPU_MMAP;GPT2;CTL;TAEVENT;POS
CPU_MMAP;GPT2;CTL;TAEVENT;NEG
CPU_MMAP;GPT2;CTL;TAEVENT;BOTH
CPU_MMAP;GPT2;CTL;TASTALL
CPU_MMAP;GPT2;CTL;TASTALL;DIS
CPU_MMAP;GPT2;CTL;TASTALL;EN
CPU_MMAP;GPT2;CTL;TAEN
CPU_MMAP;GPT2;CTL;TAEN;DIS
CPU_MMAP;GPT2;CTL;TAEN;EN
CPU_MMAP;GPT2;SYNC
CPU_MMAP;GPT2;SYNC;RESERVED8
CPU_MMAP;GPT2;SYNC;SYNC3
CPU_MMAP;GPT2;SYNC;SYNC3;NOSYNC
CPU_MMAP;GPT2;SYNC;SYNC3;TIMERA
CPU_MMAP;GPT2;SYNC;SYNC3;TIMERB
CPU_MMAP;GPT2;SYNC;SYNC3;BOTH
CPU_MMAP;GPT2;SYNC;SYNC2
CPU_MMAP;GPT2;SYNC;SYNC2;NOSYNC
CPU_MMAP;GPT2;SYNC;SYNC2;TIMERA
CPU_MMAP;GPT2;SYNC;SYNC2;TIMERB
CPU_MMAP;GPT2;SYNC;SYNC2;BOTH
CPU_MMAP;GPT2;SYNC;SYNC1
CPU_MMAP;GPT2;SYNC;SYNC1;NOSYNC
CPU_MMAP;GPT2;SYNC;SYNC1;TIMERA
CPU_MMAP;GPT2;SYNC;SYNC1;TIMERB
CPU_MMAP;GPT2;SYNC;SYNC1;BOTH
CPU_MMAP;GPT2;SYNC;SYNC0
CPU_MMAP;GPT2;SYNC;SYNC0;NOSYNC
CPU_MMAP;GPT2;SYNC;SYNC0;TIMERA
CPU_MMAP;GPT2;SYNC;SYNC0;TIMERB
CPU_MMAP;GPT2;SYNC;SYNC0;BOTH
CPU_MMAP;GPT2;IMR
CPU_MMAP;GPT2;IMR;RESERVED17
CPU_MMAP;GPT2;IMR;WUMIS
CPU_MMAP;GPT2;IMR;WUMIS;DIS
CPU_MMAP;GPT2;IMR;WUMIS;EN
CPU_MMAP;GPT2;IMR;RESERVED14
CPU_MMAP;GPT2;IMR;DMABIM
CPU_MMAP;GPT2;IMR;DMABIM;DIS
CPU_MMAP;GPT2;IMR;DMABIM;EN
CPU_MMAP;GPT2;IMR;RESERVED12
CPU_MMAP;GPT2;IMR;TBMIM
CPU_MMAP;GPT2;IMR;TBMIM;DIS
CPU_MMAP;GPT2;IMR;TBMIM;EN
CPU_MMAP;GPT2;IMR;CBEIM
CPU_MMAP;GPT2;IMR;CBEIM;DIS
CPU_MMAP;GPT2;IMR;CBEIM;EN
CPU_MMAP;GPT2;IMR;CBMIM
CPU_MMAP;GPT2;IMR;CBMIM;DIS
CPU_MMAP;GPT2;IMR;CBMIM;EN
CPU_MMAP;GPT2;IMR;TBTOIM
CPU_MMAP;GPT2;IMR;TBTOIM;DIS
CPU_MMAP;GPT2;IMR;TBTOIM;EN
CPU_MMAP;GPT2;IMR;RESERVED6
CPU_MMAP;GPT2;IMR;DMAAIM
CPU_MMAP;GPT2;IMR;DMAAIM;DIS
CPU_MMAP;GPT2;IMR;DMAAIM;EN
CPU_MMAP;GPT2;IMR;TAMIM
CPU_MMAP;GPT2;IMR;TAMIM;DIS
CPU_MMAP;GPT2;IMR;TAMIM;EN
CPU_MMAP;GPT2;IMR;RTCIM
CPU_MMAP;GPT2;IMR;RTCIM;DIS
CPU_MMAP;GPT2;IMR;RTCIM;EN
CPU_MMAP;GPT2;IMR;CAEIM
CPU_MMAP;GPT2;IMR;CAEIM;DIS
CPU_MMAP;GPT2;IMR;CAEIM;EN
CPU_MMAP;GPT2;IMR;CAMIM
CPU_MMAP;GPT2;IMR;CAMIM;DIS
CPU_MMAP;GPT2;IMR;CAMIM;EN
CPU_MMAP;GPT2;IMR;TATOIM
CPU_MMAP;GPT2;IMR;TATOIM;DIS
CPU_MMAP;GPT2;IMR;TATOIM;EN
CPU_MMAP;GPT2;RIS
CPU_MMAP;GPT2;RIS;RESERVED17
CPU_MMAP;GPT2;RIS;WURIS
CPU_MMAP;GPT2;RIS;RESERVED14
CPU_MMAP;GPT2;RIS;DMABRIS
CPU_MMAP;GPT2;RIS;RESERVED12
CPU_MMAP;GPT2;RIS;TBMRIS
CPU_MMAP;GPT2;RIS;CBERIS
CPU_MMAP;GPT2;RIS;CBMRIS
CPU_MMAP;GPT2;RIS;TBTORIS
CPU_MMAP;GPT2;RIS;RESERVED6
CPU_MMAP;GPT2;RIS;DMAARIS
CPU_MMAP;GPT2;RIS;TAMRIS
CPU_MMAP;GPT2;RIS;RTCRIS
CPU_MMAP;GPT2;RIS;CAERIS
CPU_MMAP;GPT2;RIS;CAMRIS
CPU_MMAP;GPT2;RIS;TATORIS
CPU_MMAP;GPT2;MIS
CPU_MMAP;GPT2;MIS;RESERVED17
CPU_MMAP;GPT2;MIS;WUMIS
CPU_MMAP;GPT2;MIS;RESERVED14
CPU_MMAP;GPT2;MIS;DMABMIS
CPU_MMAP;GPT2;MIS;RESERVED12
CPU_MMAP;GPT2;MIS;TBMMIS
CPU_MMAP;GPT2;MIS;CBEMIS
CPU_MMAP;GPT2;MIS;CBMMIS
CPU_MMAP;GPT2;MIS;TBTOMIS
CPU_MMAP;GPT2;MIS;RESERVED6
CPU_MMAP;GPT2;MIS;DMAAMIS
CPU_MMAP;GPT2;MIS;TAMMIS
CPU_MMAP;GPT2;MIS;RTCMIS
CPU_MMAP;GPT2;MIS;CAEMIS
CPU_MMAP;GPT2;MIS;CAMMIS
CPU_MMAP;GPT2;MIS;TATOMIS
CPU_MMAP;GPT2;ICLR
CPU_MMAP;GPT2;ICLR;RESERVED17
CPU_MMAP;GPT2;ICLR;WUECINT
CPU_MMAP;GPT2;ICLR;RESERVED14
CPU_MMAP;GPT2;ICLR;DMABINT
CPU_MMAP;GPT2;ICLR;RESERVED12
CPU_MMAP;GPT2;ICLR;TBMCINT
CPU_MMAP;GPT2;ICLR;CBECINT
CPU_MMAP;GPT2;ICLR;CBMCINT
CPU_MMAP;GPT2;ICLR;TBTOCINT
CPU_MMAP;GPT2;ICLR;RESERVED6
CPU_MMAP;GPT2;ICLR;DMAAINT
CPU_MMAP;GPT2;ICLR;TAMCINT
CPU_MMAP;GPT2;ICLR;RTCCINT
CPU_MMAP;GPT2;ICLR;CAECINT
CPU_MMAP;GPT2;ICLR;CAMCINT
CPU_MMAP;GPT2;ICLR;TATOCINT
CPU_MMAP;GPT2;TAILR
CPU_MMAP;GPT2;TAILR;TAILR
CPU_MMAP;GPT2;TBILR
CPU_MMAP;GPT2;TBILR;TBILR
CPU_MMAP;GPT2;TAMATCHR
CPU_MMAP;GPT2;TAMATCHR;TAMATCHR
CPU_MMAP;GPT2;TBMATCHR
CPU_MMAP;GPT2;TBMATCHR;TBMATCHR
CPU_MMAP;GPT2;TAPR
CPU_MMAP;GPT2;TAPR;RESERVED8
CPU_MMAP;GPT2;TAPR;TAPSR
CPU_MMAP;GPT2;TBPR
CPU_MMAP;GPT2;TBPR;RESERVED8
CPU_MMAP;GPT2;TBPR;TBPSR
CPU_MMAP;GPT2;TAPMR
CPU_MMAP;GPT2;TAPMR;RESERVED8
CPU_MMAP;GPT2;TAPMR;TAPSMR
CPU_MMAP;GPT2;TBPMR
CPU_MMAP;GPT2;TBPMR;RESERVED8
CPU_MMAP;GPT2;TBPMR;TBPSMR
CPU_MMAP;GPT2;TAR
CPU_MMAP;GPT2;TAR;TAR
CPU_MMAP;GPT2;TBR
CPU_MMAP;GPT2;TBR;TBR
CPU_MMAP;GPT2;TAV
CPU_MMAP;GPT2;TAV;TAV
CPU_MMAP;GPT2;TBV
CPU_MMAP;GPT2;TBV;TBV
CPU_MMAP;GPT2;RTCPD
CPU_MMAP;GPT2;RTCPD;RESERVED16
CPU_MMAP;GPT2;RTCPD;RTCPD
CPU_MMAP;GPT2;TAPS
CPU_MMAP;GPT2;TAPS;RESERVED16
CPU_MMAP;GPT2;TAPS;PSS
CPU_MMAP;GPT2;TBPS
CPU_MMAP;GPT2;TBPS;RESERVED16
CPU_MMAP;GPT2;TBPS;PSS
CPU_MMAP;GPT2;TAPV
CPU_MMAP;GPT2;TAPV;RESERVED16
CPU_MMAP;GPT2;TAPV;PSV
CPU_MMAP;GPT2;TBPV
CPU_MMAP;GPT2;TBPV;RESERVED16
CPU_MMAP;GPT2;TBPV;PSV
CPU_MMAP;GPT2;DMAEV
CPU_MMAP;GPT2;DMAEV;RESERVED12
CPU_MMAP;GPT2;DMAEV;TBMDMAEN
CPU_MMAP;GPT2;DMAEV;CBEDMAEN
CPU_MMAP;GPT2;DMAEV;CBMDMAEN
CPU_MMAP;GPT2;DMAEV;TBTODMAEN
CPU_MMAP;GPT2;DMAEV;RESERVED5
CPU_MMAP;GPT2;DMAEV;TAMDMAEN
CPU_MMAP;GPT2;DMAEV;RTCDMAEN
CPU_MMAP;GPT2;DMAEV;CAEDMAEN
CPU_MMAP;GPT2;DMAEV;CAMDMAEN
CPU_MMAP;GPT2;DMAEV;TATODMAEN
CPU_MMAP;GPT2;ADCEV
CPU_MMAP;GPT2;ADCEV;RESERVED12
CPU_MMAP;GPT2;ADCEV;TBMADCEN
CPU_MMAP;GPT2;ADCEV;CBEADCEN
CPU_MMAP;GPT2;ADCEV;CBMADCEN
CPU_MMAP;GPT2;ADCEV;TBTOADCEN
CPU_MMAP;GPT2;ADCEV;RESERVED5
CPU_MMAP;GPT2;ADCEV;TAMADCEN
CPU_MMAP;GPT2;ADCEV;RTCADCEN
CPU_MMAP;GPT2;ADCEV;CAEADCEN
CPU_MMAP;GPT2;ADCEV;CAMADCEN
CPU_MMAP;GPT2;ADCEV;TATOADCEN
CPU_MMAP;GPT2;VERSION
CPU_MMAP;GPT2;VERSION;VERSION
CPU_MMAP;GPT2;ANDCCP
CPU_MMAP;GPT2;ANDCCP;RESERVED1
CPU_MMAP;GPT2;ANDCCP;CCP_AND_EN
CPU_MMAP;GPT3
CPU_MMAP;GPT3;CFG
CPU_MMAP;GPT3;CFG;RESERVED3
CPU_MMAP;GPT3;CFG;CFG
CPU_MMAP;GPT3;CFG;CFG;32BIT_TIMER
CPU_MMAP;GPT3;CFG;CFG;REALTIME_CLOCK
CPU_MMAP;GPT3;CFG;CFG;16BIT_TIMER
CPU_MMAP;GPT3;TAMR
CPU_MMAP;GPT3;TAMR;RESERVED16
CPU_MMAP;GPT3;TAMR;TCACT
CPU_MMAP;GPT3;TAMR;TCACT;DIS_CMP
CPU_MMAP;GPT3;TAMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT3;TAMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT3;TAMR;TCACT;SET_ON_TO
CPU_MMAP;GPT3;TAMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT3;TAMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT3;TAMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT3;TAMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT3;TAMR;TACINTD
CPU_MMAP;GPT3;TAMR;TACINTD;EN_TO_INTR
CPU_MMAP;GPT3;TAMR;TACINTD;DIS_TO_INTR
CPU_MMAP;GPT3;TAMR;TAPLO
CPU_MMAP;GPT3;TAMR;TAPLO;LEGACY
CPU_MMAP;GPT3;TAMR;TAPLO;CCP_ON_TO
CPU_MMAP;GPT3;TAMR;TAMRSU
CPU_MMAP;GPT3;TAMR;TAMRSU;CYCLEUPDATE
CPU_MMAP;GPT3;TAMR;TAMRSU;TOUPDATE
CPU_MMAP;GPT3;TAMR;TAPWMIE
CPU_MMAP;GPT3;TAMR;TAPWMIE;DIS
CPU_MMAP;GPT3;TAMR;TAPWMIE;EN
CPU_MMAP;GPT3;TAMR;TAILD
CPU_MMAP;GPT3;TAMR;TAILD;CYCLEUPDATE
CPU_MMAP;GPT3;TAMR;TAILD;TOUPDATE
CPU_MMAP;GPT3;TAMR;TASNAPS
CPU_MMAP;GPT3;TAMR;TASNAPS;DIS
CPU_MMAP;GPT3;TAMR;TASNAPS;EN
CPU_MMAP;GPT3;TAMR;TAWOT
CPU_MMAP;GPT3;TAMR;TAWOT;NOWAIT
CPU_MMAP;GPT3;TAMR;TAWOT;WAIT
CPU_MMAP;GPT3;TAMR;TAMIE
CPU_MMAP;GPT3;TAMR;TAMIE;DIS
CPU_MMAP;GPT3;TAMR;TAMIE;EN
CPU_MMAP;GPT3;TAMR;TACDIR
CPU_MMAP;GPT3;TAMR;TACDIR;DOWN
CPU_MMAP;GPT3;TAMR;TACDIR;UP
CPU_MMAP;GPT3;TAMR;TAAMS
CPU_MMAP;GPT3;TAMR;TAAMS;CAP_COMP
CPU_MMAP;GPT3;TAMR;TAAMS;PWM
CPU_MMAP;GPT3;TAMR;TACM
CPU_MMAP;GPT3;TAMR;TACM;EDGCNT
CPU_MMAP;GPT3;TAMR;TACM;EDGTIME
CPU_MMAP;GPT3;TAMR;TAMR
CPU_MMAP;GPT3;TAMR;TAMR;ONE_SHOT
CPU_MMAP;GPT3;TAMR;TAMR;PERIODIC
CPU_MMAP;GPT3;TAMR;TAMR;CAPTURE
CPU_MMAP;GPT3;TBMR
CPU_MMAP;GPT3;TBMR;RESERVED16
CPU_MMAP;GPT3;TBMR;TCACT
CPU_MMAP;GPT3;TBMR;TCACT;DIS_CMP
CPU_MMAP;GPT3;TBMR;TCACT;TOG_ON_TO
CPU_MMAP;GPT3;TBMR;TCACT;CLR_ON_TO
CPU_MMAP;GPT3;TBMR;TCACT;SET_ON_TO
CPU_MMAP;GPT3;TBMR;TCACT;SETTOG_ON_TO
CPU_MMAP;GPT3;TBMR;TCACT;CLRTOG_ON_TO
CPU_MMAP;GPT3;TBMR;TCACT;SETCLR_ON_TO
CPU_MMAP;GPT3;TBMR;TCACT;CLRSET_ON_TO
CPU_MMAP;GPT3;TBMR;TBCINTD
CPU_MMAP;GPT3;TBMR;TBCINTD;EN_TO_INTR
CPU_MMAP;GPT3;TBMR;TBCINTD;DIS_TO_INTR
CPU_MMAP;GPT3;TBMR;TBPLO
CPU_MMAP;GPT3;TBMR;TBPLO;LEGACY
CPU_MMAP;GPT3;TBMR;TBPLO;CCP_ON_TO
CPU_MMAP;GPT3;TBMR;TBMRSU
CPU_MMAP;GPT3;TBMR;TBMRSU;CYCLEUPDATE
CPU_MMAP;GPT3;TBMR;TBMRSU;TOUPDATE
CPU_MMAP;GPT3;TBMR;TBPWMIE
CPU_MMAP;GPT3;TBMR;TBPWMIE;DIS
CPU_MMAP;GPT3;TBMR;TBPWMIE;EN
CPU_MMAP;GPT3;TBMR;TBILD
CPU_MMAP;GPT3;TBMR;TBILD;CYCLEUPDATE
CPU_MMAP;GPT3;TBMR;TBILD;TOUPDATE
CPU_MMAP;GPT3;TBMR;TBSNAPS
CPU_MMAP;GPT3;TBMR;TBSNAPS;DIS
CPU_MMAP;GPT3;TBMR;TBSNAPS;EN
CPU_MMAP;GPT3;TBMR;TBWOT
CPU_MMAP;GPT3;TBMR;TBWOT;NOWAIT
CPU_MMAP;GPT3;TBMR;TBWOT;WAIT
CPU_MMAP;GPT3;TBMR;TBMIE
CPU_MMAP;GPT3;TBMR;TBMIE;DIS
CPU_MMAP;GPT3;TBMR;TBMIE;EN
CPU_MMAP;GPT3;TBMR;TBCDIR
CPU_MMAP;GPT3;TBMR;TBCDIR;DOWN
CPU_MMAP;GPT3;TBMR;TBCDIR;UP
CPU_MMAP;GPT3;TBMR;TBAMS
CPU_MMAP;GPT3;TBMR;TBAMS;CAP_COMP
CPU_MMAP;GPT3;TBMR;TBAMS;PWM
CPU_MMAP;GPT3;TBMR;TBCM
CPU_MMAP;GPT3;TBMR;TBCM;EDGCNT
CPU_MMAP;GPT3;TBMR;TBCM;EDGTIME
CPU_MMAP;GPT3;TBMR;TBMR
CPU_MMAP;GPT3;TBMR;TBMR;ONE_SHOT
CPU_MMAP;GPT3;TBMR;TBMR;PERIODIC
CPU_MMAP;GPT3;TBMR;TBMR;CAPTURE
CPU_MMAP;GPT3;CTL
CPU_MMAP;GPT3;CTL;RESERVED15
CPU_MMAP;GPT3;CTL;TBPWML
CPU_MMAP;GPT3;CTL;TBPWML;NORMAL
CPU_MMAP;GPT3;CTL;TBPWML;INVERTED
CPU_MMAP;GPT3;CTL;TBOTE
CPU_MMAP;GPT3;CTL;TBOTE;DIS
CPU_MMAP;GPT3;CTL;TBOTE;EN
CPU_MMAP;GPT3;CTL;RESERVED12
CPU_MMAP;GPT3;CTL;TBEVENT
CPU_MMAP;GPT3;CTL;TBEVENT;POS
CPU_MMAP;GPT3;CTL;TBEVENT;NEG
CPU_MMAP;GPT3;CTL;TBEVENT;BOTH
CPU_MMAP;GPT3;CTL;TBSTALL
CPU_MMAP;GPT3;CTL;TBSTALL;DIS
CPU_MMAP;GPT3;CTL;TBSTALL;EN
CPU_MMAP;GPT3;CTL;TBEN
CPU_MMAP;GPT3;CTL;TBEN;DIS
CPU_MMAP;GPT3;CTL;TBEN;EN
CPU_MMAP;GPT3;CTL;RESERVED7
CPU_MMAP;GPT3;CTL;TAPWML
CPU_MMAP;GPT3;CTL;TAPWML;NORMAL
CPU_MMAP;GPT3;CTL;TAPWML;INVERTED
CPU_MMAP;GPT3;CTL;TAOTE
CPU_MMAP;GPT3;CTL;TAOTE;DIS
CPU_MMAP;GPT3;CTL;TAOTE;EN
CPU_MMAP;GPT3;CTL;RTCEN
CPU_MMAP;GPT3;CTL;RTCEN;DIS
CPU_MMAP;GPT3;CTL;RTCEN;EN
CPU_MMAP;GPT3;CTL;TAEVENT
CPU_MMAP;GPT3;CTL;TAEVENT;POS
CPU_MMAP;GPT3;CTL;TAEVENT;NEG
CPU_MMAP;GPT3;CTL;TAEVENT;BOTH
CPU_MMAP;GPT3;CTL;TASTALL
CPU_MMAP;GPT3;CTL;TASTALL;DIS
CPU_MMAP;GPT3;CTL;TASTALL;EN
CPU_MMAP;GPT3;CTL;TAEN
CPU_MMAP;GPT3;CTL;TAEN;DIS
CPU_MMAP;GPT3;CTL;TAEN;EN
CPU_MMAP;GPT3;SYNC
CPU_MMAP;GPT3;SYNC;RESERVED8
CPU_MMAP;GPT3;SYNC;SYNC3
CPU_MMAP;GPT3;SYNC;SYNC3;NOSYNC
CPU_MMAP;GPT3;SYNC;SYNC3;TIMERA
CPU_MMAP;GPT3;SYNC;SYNC3;TIMERB
CPU_MMAP;GPT3;SYNC;SYNC3;BOTH
CPU_MMAP;GPT3;SYNC;SYNC2
CPU_MMAP;GPT3;SYNC;SYNC2;NOSYNC
CPU_MMAP;GPT3;SYNC;SYNC2;TIMERA
CPU_MMAP;GPT3;SYNC;SYNC2;TIMERB
CPU_MMAP;GPT3;SYNC;SYNC2;BOTH
CPU_MMAP;GPT3;SYNC;SYNC1
CPU_MMAP;GPT3;SYNC;SYNC1;NOSYNC
CPU_MMAP;GPT3;SYNC;SYNC1;TIMERA
CPU_MMAP;GPT3;SYNC;SYNC1;TIMERB
CPU_MMAP;GPT3;SYNC;SYNC1;BOTH
CPU_MMAP;GPT3;SYNC;SYNC0
CPU_MMAP;GPT3;SYNC;SYNC0;NOSYNC
CPU_MMAP;GPT3;SYNC;SYNC0;TIMERA
CPU_MMAP;GPT3;SYNC;SYNC0;TIMERB
CPU_MMAP;GPT3;SYNC;SYNC0;BOTH
CPU_MMAP;GPT3;IMR
CPU_MMAP;GPT3;IMR;RESERVED17
CPU_MMAP;GPT3;IMR;WUMIS
CPU_MMAP;GPT3;IMR;WUMIS;DIS
CPU_MMAP;GPT3;IMR;WUMIS;EN
CPU_MMAP;GPT3;IMR;RESERVED14
CPU_MMAP;GPT3;IMR;DMABIM
CPU_MMAP;GPT3;IMR;DMABIM;DIS
CPU_MMAP;GPT3;IMR;DMABIM;EN
CPU_MMAP;GPT3;IMR;RESERVED12
CPU_MMAP;GPT3;IMR;TBMIM
CPU_MMAP;GPT3;IMR;TBMIM;DIS
CPU_MMAP;GPT3;IMR;TBMIM;EN
CPU_MMAP;GPT3;IMR;CBEIM
CPU_MMAP;GPT3;IMR;CBEIM;DIS
CPU_MMAP;GPT3;IMR;CBEIM;EN
CPU_MMAP;GPT3;IMR;CBMIM
CPU_MMAP;GPT3;IMR;CBMIM;DIS
CPU_MMAP;GPT3;IMR;CBMIM;EN
CPU_MMAP;GPT3;IMR;TBTOIM
CPU_MMAP;GPT3;IMR;TBTOIM;DIS
CPU_MMAP;GPT3;IMR;TBTOIM;EN
CPU_MMAP;GPT3;IMR;RESERVED6
CPU_MMAP;GPT3;IMR;DMAAIM
CPU_MMAP;GPT3;IMR;DMAAIM;DIS
CPU_MMAP;GPT3;IMR;DMAAIM;EN
CPU_MMAP;GPT3;IMR;TAMIM
CPU_MMAP;GPT3;IMR;TAMIM;DIS
CPU_MMAP;GPT3;IMR;TAMIM;EN
CPU_MMAP;GPT3;IMR;RTCIM
CPU_MMAP;GPT3;IMR;RTCIM;DIS
CPU_MMAP;GPT3;IMR;RTCIM;EN
CPU_MMAP;GPT3;IMR;CAEIM
CPU_MMAP;GPT3;IMR;CAEIM;DIS
CPU_MMAP;GPT3;IMR;CAEIM;EN
CPU_MMAP;GPT3;IMR;CAMIM
CPU_MMAP;GPT3;IMR;CAMIM;DIS
CPU_MMAP;GPT3;IMR;CAMIM;EN
CPU_MMAP;GPT3;IMR;TATOIM
CPU_MMAP;GPT3;IMR;TATOIM;DIS
CPU_MMAP;GPT3;IMR;TATOIM;EN
CPU_MMAP;GPT3;RIS
CPU_MMAP;GPT3;RIS;RESERVED17
CPU_MMAP;GPT3;RIS;WURIS
CPU_MMAP;GPT3;RIS;RESERVED14
CPU_MMAP;GPT3;RIS;DMABRIS
CPU_MMAP;GPT3;RIS;RESERVED12
CPU_MMAP;GPT3;RIS;TBMRIS
CPU_MMAP;GPT3;RIS;CBERIS
CPU_MMAP;GPT3;RIS;CBMRIS
CPU_MMAP;GPT3;RIS;TBTORIS
CPU_MMAP;GPT3;RIS;RESERVED6
CPU_MMAP;GPT3;RIS;DMAARIS
CPU_MMAP;GPT3;RIS;TAMRIS
CPU_MMAP;GPT3;RIS;RTCRIS
CPU_MMAP;GPT3;RIS;CAERIS
CPU_MMAP;GPT3;RIS;CAMRIS
CPU_MMAP;GPT3;RIS;TATORIS
CPU_MMAP;GPT3;MIS
CPU_MMAP;GPT3;MIS;RESERVED17
CPU_MMAP;GPT3;MIS;WUMIS
CPU_MMAP;GPT3;MIS;RESERVED14
CPU_MMAP;GPT3;MIS;DMABMIS
CPU_MMAP;GPT3;MIS;RESERVED12
CPU_MMAP;GPT3;MIS;TBMMIS
CPU_MMAP;GPT3;MIS;CBEMIS
CPU_MMAP;GPT3;MIS;CBMMIS
CPU_MMAP;GPT3;MIS;TBTOMIS
CPU_MMAP;GPT3;MIS;RESERVED6
CPU_MMAP;GPT3;MIS;DMAAMIS
CPU_MMAP;GPT3;MIS;TAMMIS
CPU_MMAP;GPT3;MIS;RTCMIS
CPU_MMAP;GPT3;MIS;CAEMIS
CPU_MMAP;GPT3;MIS;CAMMIS
CPU_MMAP;GPT3;MIS;TATOMIS
CPU_MMAP;GPT3;ICLR
CPU_MMAP;GPT3;ICLR;RESERVED17
CPU_MMAP;GPT3;ICLR;WUECINT
CPU_MMAP;GPT3;ICLR;RESERVED14
CPU_MMAP;GPT3;ICLR;DMABINT
CPU_MMAP;GPT3;ICLR;RESERVED12
CPU_MMAP;GPT3;ICLR;TBMCINT
CPU_MMAP;GPT3;ICLR;CBECINT
CPU_MMAP;GPT3;ICLR;CBMCINT
CPU_MMAP;GPT3;ICLR;TBTOCINT
CPU_MMAP;GPT3;ICLR;RESERVED6
CPU_MMAP;GPT3;ICLR;DMAAINT
CPU_MMAP;GPT3;ICLR;TAMCINT
CPU_MMAP;GPT3;ICLR;RTCCINT
CPU_MMAP;GPT3;ICLR;CAECINT
CPU_MMAP;GPT3;ICLR;CAMCINT
CPU_MMAP;GPT3;ICLR;TATOCINT
CPU_MMAP;GPT3;TAILR
CPU_MMAP;GPT3;TAILR;TAILR
CPU_MMAP;GPT3;TBILR
CPU_MMAP;GPT3;TBILR;TBILR
CPU_MMAP;GPT3;TAMATCHR
CPU_MMAP;GPT3;TAMATCHR;TAMATCHR
CPU_MMAP;GPT3;TBMATCHR
CPU_MMAP;GPT3;TBMATCHR;TBMATCHR
CPU_MMAP;GPT3;TAPR
CPU_MMAP;GPT3;TAPR;RESERVED8
CPU_MMAP;GPT3;TAPR;TAPSR
CPU_MMAP;GPT3;TBPR
CPU_MMAP;GPT3;TBPR;RESERVED8
CPU_MMAP;GPT3;TBPR;TBPSR
CPU_MMAP;GPT3;TAPMR
CPU_MMAP;GPT3;TAPMR;RESERVED8
CPU_MMAP;GPT3;TAPMR;TAPSMR
CPU_MMAP;GPT3;TBPMR
CPU_MMAP;GPT3;TBPMR;RESERVED8
CPU_MMAP;GPT3;TBPMR;TBPSMR
CPU_MMAP;GPT3;TAR
CPU_MMAP;GPT3;TAR;TAR
CPU_MMAP;GPT3;TBR
CPU_MMAP;GPT3;TBR;TBR
CPU_MMAP;GPT3;TAV
CPU_MMAP;GPT3;TAV;TAV
CPU_MMAP;GPT3;TBV
CPU_MMAP;GPT3;TBV;TBV
CPU_MMAP;GPT3;RTCPD
CPU_MMAP;GPT3;RTCPD;RESERVED16
CPU_MMAP;GPT3;RTCPD;RTCPD
CPU_MMAP;GPT3;TAPS
CPU_MMAP;GPT3;TAPS;RESERVED16
CPU_MMAP;GPT3;TAPS;PSS
CPU_MMAP;GPT3;TBPS
CPU_MMAP;GPT3;TBPS;RESERVED16
CPU_MMAP;GPT3;TBPS;PSS
CPU_MMAP;GPT3;TAPV
CPU_MMAP;GPT3;TAPV;RESERVED16
CPU_MMAP;GPT3;TAPV;PSV
CPU_MMAP;GPT3;TBPV
CPU_MMAP;GPT3;TBPV;RESERVED16
CPU_MMAP;GPT3;TBPV;PSV
CPU_MMAP;GPT3;DMAEV
CPU_MMAP;GPT3;DMAEV;RESERVED12
CPU_MMAP;GPT3;DMAEV;TBMDMAEN
CPU_MMAP;GPT3;DMAEV;CBEDMAEN
CPU_MMAP;GPT3;DMAEV;CBMDMAEN
CPU_MMAP;GPT3;DMAEV;TBTODMAEN
CPU_MMAP;GPT3;DMAEV;RESERVED5
CPU_MMAP;GPT3;DMAEV;TAMDMAEN
CPU_MMAP;GPT3;DMAEV;RTCDMAEN
CPU_MMAP;GPT3;DMAEV;CAEDMAEN
CPU_MMAP;GPT3;DMAEV;CAMDMAEN
CPU_MMAP;GPT3;DMAEV;TATODMAEN
CPU_MMAP;GPT3;ADCEV
CPU_MMAP;GPT3;ADCEV;RESERVED12
CPU_MMAP;GPT3;ADCEV;TBMADCEN
CPU_MMAP;GPT3;ADCEV;CBEADCEN
CPU_MMAP;GPT3;ADCEV;CBMADCEN
CPU_MMAP;GPT3;ADCEV;TBTOADCEN
CPU_MMAP;GPT3;ADCEV;RESERVED5
CPU_MMAP;GPT3;ADCEV;TAMADCEN
CPU_MMAP;GPT3;ADCEV;RTCADCEN
CPU_MMAP;GPT3;ADCEV;CAEADCEN
CPU_MMAP;GPT3;ADCEV;CAMADCEN
CPU_MMAP;GPT3;ADCEV;TATOADCEN
CPU_MMAP;GPT3;VERSION
CPU_MMAP;GPT3;VERSION;VERSION
CPU_MMAP;GPT3;ANDCCP
CPU_MMAP;GPT3;ANDCCP;RESERVED1
CPU_MMAP;GPT3;ANDCCP;CCP_AND_EN
CPU_MMAP;UDMA0
CPU_MMAP;UDMA0;STATUS
CPU_MMAP;UDMA0;STATUS;TEST
CPU_MMAP;UDMA0;STATUS;RESERVED21
CPU_MMAP;UDMA0;STATUS;TOTALCHANNELS
CPU_MMAP;UDMA0;STATUS;RESERVED8
CPU_MMAP;UDMA0;STATUS;STATE
CPU_MMAP;UDMA0;STATUS;RESERVED1
CPU_MMAP;UDMA0;STATUS;MASTERENABLE
CPU_MMAP;UDMA0;CFG
CPU_MMAP;UDMA0;CFG;RESERVED8
CPU_MMAP;UDMA0;CFG;PRTOCTRL
CPU_MMAP;UDMA0;CFG;RESERVED1
CPU_MMAP;UDMA0;CFG;MASTERENABLE
CPU_MMAP;UDMA0;CTRL
CPU_MMAP;UDMA0;CTRL;BASEPTR
CPU_MMAP;UDMA0;CTRL;RESERVED0
CPU_MMAP;UDMA0;ALTCTRL
CPU_MMAP;UDMA0;ALTCTRL;BASEPTR
CPU_MMAP;UDMA0;WAITONREQ
CPU_MMAP;UDMA0;WAITONREQ;CHNLSTATUS
CPU_MMAP;UDMA0;SOFTREQ
CPU_MMAP;UDMA0;SOFTREQ;CHNLS
CPU_MMAP;UDMA0;SETBURST
CPU_MMAP;UDMA0;SETBURST;CHNLS
CPU_MMAP;UDMA0;CLEARBURST
CPU_MMAP;UDMA0;CLEARBURST;CHNLS
CPU_MMAP;UDMA0;SETREQMASK
CPU_MMAP;UDMA0;SETREQMASK;CHNLS
CPU_MMAP;UDMA0;CLEARREQMASK
CPU_MMAP;UDMA0;CLEARREQMASK;CHNLS
CPU_MMAP;UDMA0;SETCHANNELEN
CPU_MMAP;UDMA0;SETCHANNELEN;CHNLS
CPU_MMAP;UDMA0;CLEARCHANNELEN
CPU_MMAP;UDMA0;CLEARCHANNELEN;CHNLS
CPU_MMAP;UDMA0;SETCHNLPRIALT
CPU_MMAP;UDMA0;SETCHNLPRIALT;CHNLS
CPU_MMAP;UDMA0;CLEARCHNLPRIALT
CPU_MMAP;UDMA0;CLEARCHNLPRIALT;CHNLS
CPU_MMAP;UDMA0;SETCHNLPRIORITY
CPU_MMAP;UDMA0;SETCHNLPRIORITY;CHNLS
CPU_MMAP;UDMA0;CLEARCHNLPRIORITY
CPU_MMAP;UDMA0;CLEARCHNLPRIORITY;CHNLS
CPU_MMAP;UDMA0;ERROR
CPU_MMAP;UDMA0;ERROR;RESERVED
CPU_MMAP;UDMA0;ERROR;STATUS
CPU_MMAP;UDMA0;REQDONE
CPU_MMAP;UDMA0;REQDONE;CHNLS
CPU_MMAP;UDMA0;DONEMASK
CPU_MMAP;UDMA0;DONEMASK;CHNLS
CPU_MMAP;UDMA0;PID4
CPU_MMAP;UDMA0;PID4;RESERVED8
CPU_MMAP;UDMA0;PID4;BLOCKCOUNT
CPU_MMAP;UDMA0;PID4;JEP106C
CPU_MMAP;I2S0
CPU_MMAP;I2S0;AIFWCLKSRC
CPU_MMAP;I2S0;AIFWCLKSRC;RESERVED3
CPU_MMAP;I2S0;AIFWCLKSRC;WCLK_INV
CPU_MMAP;I2S0;AIFWCLKSRC;WCLK_SRC
CPU_MMAP;I2S0;AIFWCLKSRC;WCLK_SRC;NONE
CPU_MMAP;I2S0;AIFWCLKSRC;WCLK_SRC;EXT
CPU_MMAP;I2S0;AIFWCLKSRC;WCLK_SRC;INT
CPU_MMAP;I2S0;AIFWCLKSRC;WCLK_SRC;RESERVED
CPU_MMAP;I2S0;AIFDMACFG
CPU_MMAP;I2S0;AIFDMACFG;RESERVED8
CPU_MMAP;I2S0;AIFDMACFG;END_FRAME_IDX
CPU_MMAP;I2S0;AIFDIRCFG
CPU_MMAP;I2S0;AIFDIRCFG;RESERVED10
CPU_MMAP;I2S0;AIFDIRCFG;AD2
CPU_MMAP;I2S0;AIFDIRCFG;AD2;DIS
CPU_MMAP;I2S0;AIFDIRCFG;AD2;IN
CPU_MMAP;I2S0;AIFDIRCFG;AD2;OUT
CPU_MMAP;I2S0;AIFDIRCFG;RESERVED6
CPU_MMAP;I2S0;AIFDIRCFG;AD1
CPU_MMAP;I2S0;AIFDIRCFG;AD1;DIS
CPU_MMAP;I2S0;AIFDIRCFG;AD1;IN
CPU_MMAP;I2S0;AIFDIRCFG;AD1;OUT
CPU_MMAP;I2S0;AIFDIRCFG;RESERVED2
CPU_MMAP;I2S0;AIFDIRCFG;AD0
CPU_MMAP;I2S0;AIFDIRCFG;AD0;DIS
CPU_MMAP;I2S0;AIFDIRCFG;AD0;IN
CPU_MMAP;I2S0;AIFDIRCFG;AD0;OUT
CPU_MMAP;I2S0;AIFFMTCFG
CPU_MMAP;I2S0;AIFFMTCFG;RESERVED16
CPU_MMAP;I2S0;AIFFMTCFG;DATA_DELAY
CPU_MMAP;I2S0;AIFFMTCFG;MEM_LEN_24
CPU_MMAP;I2S0;AIFFMTCFG;MEM_LEN_24;16BIT
CPU_MMAP;I2S0;AIFFMTCFG;MEM_LEN_24;24BIT
CPU_MMAP;I2S0;AIFFMTCFG;SMPL_EDGE
CPU_MMAP;I2S0;AIFFMTCFG;SMPL_EDGE;NEG
CPU_MMAP;I2S0;AIFFMTCFG;SMPL_EDGE;POS
CPU_MMAP;I2S0;AIFFMTCFG;DUAL_PHASE
CPU_MMAP;I2S0;AIFFMTCFG;WORD_LEN
CPU_MMAP;I2S0;AIFWMASK0
CPU_MMAP;I2S0;AIFWMASK0;RESERVED8
CPU_MMAP;I2S0;AIFWMASK0;MASK
CPU_MMAP;I2S0;AIFWMASK1
CPU_MMAP;I2S0;AIFWMASK1;RESERVED8
CPU_MMAP;I2S0;AIFWMASK1;MASK
CPU_MMAP;I2S0;AIFWMASK2
CPU_MMAP;I2S0;AIFWMASK2;RESERVED8
CPU_MMAP;I2S0;AIFWMASK2;MASK
CPU_MMAP;I2S0;AIFPWMVALUE
CPU_MMAP;I2S0;AIFPWMVALUE;RESERVED16
CPU_MMAP;I2S0;AIFPWMVALUE;PULSE_WIDTH
CPU_MMAP;I2S0;AIFINPTRNEXT
CPU_MMAP;I2S0;AIFINPTRNEXT;PTR
CPU_MMAP;I2S0;AIFINPTR
CPU_MMAP;I2S0;AIFINPTR;PTR
CPU_MMAP;I2S0;AIFOUTPTRNEXT
CPU_MMAP;I2S0;AIFOUTPTRNEXT;PTR
CPU_MMAP;I2S0;AIFOUTPTR
CPU_MMAP;I2S0;AIFOUTPTR;PTR
CPU_MMAP;I2S0;STMPCTL
CPU_MMAP;I2S0;STMPCTL;RESERVED3
CPU_MMAP;I2S0;STMPCTL;OUT_RDY
CPU_MMAP;I2S0;STMPCTL;IN_RDY
CPU_MMAP;I2S0;STMPCTL;STMP_EN
CPU_MMAP;I2S0;STMPXCNTCAPT0
CPU_MMAP;I2S0;STMPXCNTCAPT0;RESERVED
CPU_MMAP;I2S0;STMPXCNTCAPT0;CAPT_VALUE
CPU_MMAP;I2S0;STMPXPER
CPU_MMAP;I2S0;STMPXPER;RESERVED16
CPU_MMAP;I2S0;STMPXPER;VALUE
CPU_MMAP;I2S0;STMPWCNTCAPT0
CPU_MMAP;I2S0;STMPWCNTCAPT0;RESERVED16
CPU_MMAP;I2S0;STMPWCNTCAPT0;CAPT_VALUE
CPU_MMAP;I2S0;STMPWPER
CPU_MMAP;I2S0;STMPWPER;RESERVED16
CPU_MMAP;I2S0;STMPWPER;VALUE
CPU_MMAP;I2S0;STMPINTRIG
CPU_MMAP;I2S0;STMPINTRIG;RESERVED16
CPU_MMAP;I2S0;STMPINTRIG;IN_START_WCNT
CPU_MMAP;I2S0;STMPOUTTRIG
CPU_MMAP;I2S0;STMPOUTTRIG;RESERVED16
CPU_MMAP;I2S0;STMPOUTTRIG;OUT_START_WCNT
CPU_MMAP;I2S0;STMPWSET
CPU_MMAP;I2S0;STMPWSET;RESERVED16
CPU_MMAP;I2S0;STMPWSET;VALUE
CPU_MMAP;I2S0;STMPWADD
CPU_MMAP;I2S0;STMPWADD;RESERVED16
CPU_MMAP;I2S0;STMPWADD;VALUE_INC
CPU_MMAP;I2S0;STMPXPERMIN
CPU_MMAP;I2S0;STMPXPERMIN;RESERVED16
CPU_MMAP;I2S0;STMPXPERMIN;VALUE
CPU_MMAP;I2S0;STMPWCNT
CPU_MMAP;I2S0;STMPWCNT;RESERVED16
CPU_MMAP;I2S0;STMPWCNT;CURR_VALUE
CPU_MMAP;I2S0;STMPXCNT
CPU_MMAP;I2S0;STMPXCNT;RESERVED16
CPU_MMAP;I2S0;STMPXCNT;CURR_VALUE
CPU_MMAP;I2S0;STMPXCNTCAPT1
CPU_MMAP;I2S0;STMPXCNTCAPT1;RESERVED16
CPU_MMAP;I2S0;STMPXCNTCAPT1;CAPT_VALUE
CPU_MMAP;I2S0;STMPWCNTCAPT1
CPU_MMAP;I2S0;STMPWCNTCAPT1;RESERVED16
CPU_MMAP;I2S0;STMPWCNTCAPT1;CAPT_VALUE
CPU_MMAP;I2S0;IRQMASK
CPU_MMAP;I2S0;IRQMASK;RESERVED6
CPU_MMAP;I2S0;IRQMASK;AIF_DMA_IN
CPU_MMAP;I2S0;IRQMASK;AIF_DMA_OUT
CPU_MMAP;I2S0;IRQMASK;WCLK_TIMEOUT
CPU_MMAP;I2S0;IRQMASK;BUS_ERR
CPU_MMAP;I2S0;IRQMASK;WCLK_ERR
CPU_MMAP;I2S0;IRQMASK;PTR_ERR
CPU_MMAP;I2S0;IRQFLAGS
CPU_MMAP;I2S0;IRQFLAGS;RESERVED6
CPU_MMAP;I2S0;IRQFLAGS;AIF_DMA_IN
CPU_MMAP;I2S0;IRQFLAGS;AIF_DMA_OUT
CPU_MMAP;I2S0;IRQFLAGS;WCLK_TIMEOUT
CPU_MMAP;I2S0;IRQFLAGS;BUS_ERR
CPU_MMAP;I2S0;IRQFLAGS;WCLK_ERR
CPU_MMAP;I2S0;IRQFLAGS;PTR_ERR
CPU_MMAP;I2S0;IRQSET
CPU_MMAP;I2S0;IRQSET;RESERVED6
CPU_MMAP;I2S0;IRQSET;AIF_DMA_IN
CPU_MMAP;I2S0;IRQSET;AIF_DMA_OUT
CPU_MMAP;I2S0;IRQSET;WCLK_TIMEOUT
CPU_MMAP;I2S0;IRQSET;BUS_ERR
CPU_MMAP;I2S0;IRQSET;WCLK_ERR
CPU_MMAP;I2S0;IRQSET;PTR_ERR
CPU_MMAP;I2S0;IRQCLR
CPU_MMAP;I2S0;IRQCLR;RESERVED6
CPU_MMAP;I2S0;IRQCLR;AIF_DMA_IN
CPU_MMAP;I2S0;IRQCLR;AIF_DMA_OUT
CPU_MMAP;I2S0;IRQCLR;WCLK_TIMEOUT
CPU_MMAP;I2S0;IRQCLR;BUS_ERR
CPU_MMAP;I2S0;IRQCLR;WCLK_ERR
CPU_MMAP;I2S0;IRQCLR;PTR_ERR
CPU_MMAP;GPIO
CPU_MMAP;GPIO;DOUT3_0
CPU_MMAP;GPIO;DOUT3_0;RESERVED25
CPU_MMAP;GPIO;DOUT3_0;DIO3
CPU_MMAP;GPIO;DOUT3_0;RESERVED17
CPU_MMAP;GPIO;DOUT3_0;DIO2
CPU_MMAP;GPIO;DOUT3_0;RESERVED9
CPU_MMAP;GPIO;DOUT3_0;DIO1
CPU_MMAP;GPIO;DOUT3_0;RESERVED1
CPU_MMAP;GPIO;DOUT3_0;DIO0
CPU_MMAP;GPIO;DOUT7_4
CPU_MMAP;GPIO;DOUT7_4;RESERVED25
CPU_MMAP;GPIO;DOUT7_4;DIO7
CPU_MMAP;GPIO;DOUT7_4;RESERVED17
CPU_MMAP;GPIO;DOUT7_4;DIO6
CPU_MMAP;GPIO;DOUT7_4;RESERVED9
CPU_MMAP;GPIO;DOUT7_4;DIO5
CPU_MMAP;GPIO;DOUT7_4;RESERVED1
CPU_MMAP;GPIO;DOUT7_4;DIO4
CPU_MMAP;GPIO;DOUT11_8
CPU_MMAP;GPIO;DOUT11_8;RESERVED25
CPU_MMAP;GPIO;DOUT11_8;DIO11
CPU_MMAP;GPIO;DOUT11_8;RESERVED17
CPU_MMAP;GPIO;DOUT11_8;DIO10
CPU_MMAP;GPIO;DOUT11_8;RESERVED9
CPU_MMAP;GPIO;DOUT11_8;DIO9
CPU_MMAP;GPIO;DOUT11_8;RESERVED1
CPU_MMAP;GPIO;DOUT11_8;DIO8
CPU_MMAP;GPIO;DOUT15_12
CPU_MMAP;GPIO;DOUT15_12;RESERVED25
CPU_MMAP;GPIO;DOUT15_12;DIO15
CPU_MMAP;GPIO;DOUT15_12;RESERVED17
CPU_MMAP;GPIO;DOUT15_12;DIO14
CPU_MMAP;GPIO;DOUT15_12;RESERVED9
CPU_MMAP;GPIO;DOUT15_12;DIO13
CPU_MMAP;GPIO;DOUT15_12;RESERVED1
CPU_MMAP;GPIO;DOUT15_12;DIO12
CPU_MMAP;GPIO;DOUT19_16
CPU_MMAP;GPIO;DOUT19_16;RESERVED25
CPU_MMAP;GPIO;DOUT19_16;DIO19
CPU_MMAP;GPIO;DOUT19_16;RESERVED17
CPU_MMAP;GPIO;DOUT19_16;DIO18
CPU_MMAP;GPIO;DOUT19_16;RESERVED9
CPU_MMAP;GPIO;DOUT19_16;DIO17
CPU_MMAP;GPIO;DOUT19_16;RESERVED1
CPU_MMAP;GPIO;DOUT19_16;DIO16
CPU_MMAP;GPIO;DOUT23_20
CPU_MMAP;GPIO;DOUT23_20;RESERVED25
CPU_MMAP;GPIO;DOUT23_20;DIO23
CPU_MMAP;GPIO;DOUT23_20;RESERVED17
CPU_MMAP;GPIO;DOUT23_20;DIO22
CPU_MMAP;GPIO;DOUT23_20;RESERVED9
CPU_MMAP;GPIO;DOUT23_20;DIO21
CPU_MMAP;GPIO;DOUT23_20;RESERVED1
CPU_MMAP;GPIO;DOUT23_20;DIO20
CPU_MMAP;GPIO;DOUT27_24
CPU_MMAP;GPIO;DOUT27_24;RESERVED25
CPU_MMAP;GPIO;DOUT27_24;DIO27
CPU_MMAP;GPIO;DOUT27_24;RESERVED17
CPU_MMAP;GPIO;DOUT27_24;DIO26
CPU_MMAP;GPIO;DOUT27_24;RESERVED9
CPU_MMAP;GPIO;DOUT27_24;DIO25
CPU_MMAP;GPIO;DOUT27_24;RESERVED1
CPU_MMAP;GPIO;DOUT27_24;DIO24
CPU_MMAP;GPIO;DOUT31_28
CPU_MMAP;GPIO;DOUT31_28;RESERVED25
CPU_MMAP;GPIO;DOUT31_28;DIO31
CPU_MMAP;GPIO;DOUT31_28;RESERVED17
CPU_MMAP;GPIO;DOUT31_28;DIO30
CPU_MMAP;GPIO;DOUT31_28;RESERVED9
CPU_MMAP;GPIO;DOUT31_28;DIO29
CPU_MMAP;GPIO;DOUT31_28;RESERVED1
CPU_MMAP;GPIO;DOUT31_28;DIO28
CPU_MMAP;GPIO;DOUT31_0
CPU_MMAP;GPIO;DOUT31_0;DIO31
CPU_MMAP;GPIO;DOUT31_0;DIO30
CPU_MMAP;GPIO;DOUT31_0;DIO29
CPU_MMAP;GPIO;DOUT31_0;DIO28
CPU_MMAP;GPIO;DOUT31_0;DIO27
CPU_MMAP;GPIO;DOUT31_0;DIO26
CPU_MMAP;GPIO;DOUT31_0;DIO25
CPU_MMAP;GPIO;DOUT31_0;DIO24
CPU_MMAP;GPIO;DOUT31_0;DIO23
CPU_MMAP;GPIO;DOUT31_0;DIO22
CPU_MMAP;GPIO;DOUT31_0;DIO21
CPU_MMAP;GPIO;DOUT31_0;DIO20
CPU_MMAP;GPIO;DOUT31_0;DIO19
CPU_MMAP;GPIO;DOUT31_0;DIO18
CPU_MMAP;GPIO;DOUT31_0;DIO17
CPU_MMAP;GPIO;DOUT31_0;DIO16
CPU_MMAP;GPIO;DOUT31_0;DIO15
CPU_MMAP;GPIO;DOUT31_0;DIO14
CPU_MMAP;GPIO;DOUT31_0;DIO13
CPU_MMAP;GPIO;DOUT31_0;DIO12
CPU_MMAP;GPIO;DOUT31_0;DIO11
CPU_MMAP;GPIO;DOUT31_0;DIO10
CPU_MMAP;GPIO;DOUT31_0;DIO9
CPU_MMAP;GPIO;DOUT31_0;DIO8
CPU_MMAP;GPIO;DOUT31_0;DIO7
CPU_MMAP;GPIO;DOUT31_0;DIO6
CPU_MMAP;GPIO;DOUT31_0;DIO5
CPU_MMAP;GPIO;DOUT31_0;DIO4
CPU_MMAP;GPIO;DOUT31_0;DIO3
CPU_MMAP;GPIO;DOUT31_0;DIO2
CPU_MMAP;GPIO;DOUT31_0;DIO1
CPU_MMAP;GPIO;DOUT31_0;DIO0
CPU_MMAP;GPIO;DOUTSET31_0
CPU_MMAP;GPIO;DOUTSET31_0;DIO31
CPU_MMAP;GPIO;DOUTSET31_0;DIO30
CPU_MMAP;GPIO;DOUTSET31_0;DIO29
CPU_MMAP;GPIO;DOUTSET31_0;DIO28
CPU_MMAP;GPIO;DOUTSET31_0;DIO27
CPU_MMAP;GPIO;DOUTSET31_0;DIO26
CPU_MMAP;GPIO;DOUTSET31_0;DIO25
CPU_MMAP;GPIO;DOUTSET31_0;DIO24
CPU_MMAP;GPIO;DOUTSET31_0;DIO23
CPU_MMAP;GPIO;DOUTSET31_0;DIO22
CPU_MMAP;GPIO;DOUTSET31_0;DIO21
CPU_MMAP;GPIO;DOUTSET31_0;DIO20
CPU_MMAP;GPIO;DOUTSET31_0;DIO19
CPU_MMAP;GPIO;DOUTSET31_0;DIO18
CPU_MMAP;GPIO;DOUTSET31_0;DIO17
CPU_MMAP;GPIO;DOUTSET31_0;DIO16
CPU_MMAP;GPIO;DOUTSET31_0;DIO15
CPU_MMAP;GPIO;DOUTSET31_0;DIO14
CPU_MMAP;GPIO;DOUTSET31_0;DIO13
CPU_MMAP;GPIO;DOUTSET31_0;DIO12
CPU_MMAP;GPIO;DOUTSET31_0;DIO11
CPU_MMAP;GPIO;DOUTSET31_0;DIO10
CPU_MMAP;GPIO;DOUTSET31_0;DIO9
CPU_MMAP;GPIO;DOUTSET31_0;DIO8
CPU_MMAP;GPIO;DOUTSET31_0;DIO7
CPU_MMAP;GPIO;DOUTSET31_0;DIO6
CPU_MMAP;GPIO;DOUTSET31_0;DIO5
CPU_MMAP;GPIO;DOUTSET31_0;DIO4
CPU_MMAP;GPIO;DOUTSET31_0;DIO3
CPU_MMAP;GPIO;DOUTSET31_0;DIO2
CPU_MMAP;GPIO;DOUTSET31_0;DIO1
CPU_MMAP;GPIO;DOUTSET31_0;DIO0
CPU_MMAP;GPIO;DOUTCLR31_0
CPU_MMAP;GPIO;DOUTCLR31_0;DIO31
CPU_MMAP;GPIO;DOUTCLR31_0;DIO30
CPU_MMAP;GPIO;DOUTCLR31_0;DIO29
CPU_MMAP;GPIO;DOUTCLR31_0;DIO28
CPU_MMAP;GPIO;DOUTCLR31_0;DIO27
CPU_MMAP;GPIO;DOUTCLR31_0;DIO26
CPU_MMAP;GPIO;DOUTCLR31_0;DIO25
CPU_MMAP;GPIO;DOUTCLR31_0;DIO24
CPU_MMAP;GPIO;DOUTCLR31_0;DIO23
CPU_MMAP;GPIO;DOUTCLR31_0;DIO22
CPU_MMAP;GPIO;DOUTCLR31_0;DIO21
CPU_MMAP;GPIO;DOUTCLR31_0;DIO20
CPU_MMAP;GPIO;DOUTCLR31_0;DIO19
CPU_MMAP;GPIO;DOUTCLR31_0;DIO18
CPU_MMAP;GPIO;DOUTCLR31_0;DIO17
CPU_MMAP;GPIO;DOUTCLR31_0;DIO16
CPU_MMAP;GPIO;DOUTCLR31_0;DIO15
CPU_MMAP;GPIO;DOUTCLR31_0;DIO14
CPU_MMAP;GPIO;DOUTCLR31_0;DIO13
CPU_MMAP;GPIO;DOUTCLR31_0;DIO12
CPU_MMAP;GPIO;DOUTCLR31_0;DIO11
CPU_MMAP;GPIO;DOUTCLR31_0;DIO10
CPU_MMAP;GPIO;DOUTCLR31_0;DIO9
CPU_MMAP;GPIO;DOUTCLR31_0;DIO8
CPU_MMAP;GPIO;DOUTCLR31_0;DIO7
CPU_MMAP;GPIO;DOUTCLR31_0;DIO6
CPU_MMAP;GPIO;DOUTCLR31_0;DIO5
CPU_MMAP;GPIO;DOUTCLR31_0;DIO4
CPU_MMAP;GPIO;DOUTCLR31_0;DIO3
CPU_MMAP;GPIO;DOUTCLR31_0;DIO2
CPU_MMAP;GPIO;DOUTCLR31_0;DIO1
CPU_MMAP;GPIO;DOUTCLR31_0;DIO0
CPU_MMAP;GPIO;DOUTTGL31_0
CPU_MMAP;GPIO;DOUTTGL31_0;DIO31
CPU_MMAP;GPIO;DOUTTGL31_0;DIO30
CPU_MMAP;GPIO;DOUTTGL31_0;DIO29
CPU_MMAP;GPIO;DOUTTGL31_0;DIO28
CPU_MMAP;GPIO;DOUTTGL31_0;DIO27
CPU_MMAP;GPIO;DOUTTGL31_0;DIO26
CPU_MMAP;GPIO;DOUTTGL31_0;DIO25
CPU_MMAP;GPIO;DOUTTGL31_0;DIO24
CPU_MMAP;GPIO;DOUTTGL31_0;DIO23
CPU_MMAP;GPIO;DOUTTGL31_0;DIO22
CPU_MMAP;GPIO;DOUTTGL31_0;DIO21
CPU_MMAP;GPIO;DOUTTGL31_0;DIO20
CPU_MMAP;GPIO;DOUTTGL31_0;DIO19
CPU_MMAP;GPIO;DOUTTGL31_0;DIO18
CPU_MMAP;GPIO;DOUTTGL31_0;DIO17
CPU_MMAP;GPIO;DOUTTGL31_0;DIO16
CPU_MMAP;GPIO;DOUTTGL31_0;DIO15
CPU_MMAP;GPIO;DOUTTGL31_0;DIO14
CPU_MMAP;GPIO;DOUTTGL31_0;DIO13
CPU_MMAP;GPIO;DOUTTGL31_0;DIO12
CPU_MMAP;GPIO;DOUTTGL31_0;DIO11
CPU_MMAP;GPIO;DOUTTGL31_0;DIO10
CPU_MMAP;GPIO;DOUTTGL31_0;DIO9
CPU_MMAP;GPIO;DOUTTGL31_0;DIO8
CPU_MMAP;GPIO;DOUTTGL31_0;DIO7
CPU_MMAP;GPIO;DOUTTGL31_0;DIO6
CPU_MMAP;GPIO;DOUTTGL31_0;DIO5
CPU_MMAP;GPIO;DOUTTGL31_0;DIO4
CPU_MMAP;GPIO;DOUTTGL31_0;DIO3
CPU_MMAP;GPIO;DOUTTGL31_0;DIO2
CPU_MMAP;GPIO;DOUTTGL31_0;DIO1
CPU_MMAP;GPIO;DOUTTGL31_0;DIO0
CPU_MMAP;GPIO;DIN31_0
CPU_MMAP;GPIO;DIN31_0;DIO31
CPU_MMAP;GPIO;DIN31_0;DIO30
CPU_MMAP;GPIO;DIN31_0;DIO29
CPU_MMAP;GPIO;DIN31_0;DIO28
CPU_MMAP;GPIO;DIN31_0;DIO27
CPU_MMAP;GPIO;DIN31_0;DIO26
CPU_MMAP;GPIO;DIN31_0;DIO25
CPU_MMAP;GPIO;DIN31_0;DIO24
CPU_MMAP;GPIO;DIN31_0;DIO23
CPU_MMAP;GPIO;DIN31_0;DIO22
CPU_MMAP;GPIO;DIN31_0;DIO21
CPU_MMAP;GPIO;DIN31_0;DIO20
CPU_MMAP;GPIO;DIN31_0;DIO19
CPU_MMAP;GPIO;DIN31_0;DIO18
CPU_MMAP;GPIO;DIN31_0;DIO17
CPU_MMAP;GPIO;DIN31_0;DIO16
CPU_MMAP;GPIO;DIN31_0;DIO15
CPU_MMAP;GPIO;DIN31_0;DIO14
CPU_MMAP;GPIO;DIN31_0;DIO13
CPU_MMAP;GPIO;DIN31_0;DIO12
CPU_MMAP;GPIO;DIN31_0;DIO11
CPU_MMAP;GPIO;DIN31_0;DIO10
CPU_MMAP;GPIO;DIN31_0;DIO9
CPU_MMAP;GPIO;DIN31_0;DIO8
CPU_MMAP;GPIO;DIN31_0;DIO7
CPU_MMAP;GPIO;DIN31_0;DIO6
CPU_MMAP;GPIO;DIN31_0;DIO5
CPU_MMAP;GPIO;DIN31_0;DIO4
CPU_MMAP;GPIO;DIN31_0;DIO3
CPU_MMAP;GPIO;DIN31_0;DIO2
CPU_MMAP;GPIO;DIN31_0;DIO1
CPU_MMAP;GPIO;DIN31_0;DIO0
CPU_MMAP;GPIO;DOE31_0
CPU_MMAP;GPIO;DOE31_0;DIO31
CPU_MMAP;GPIO;DOE31_0;DIO30
CPU_MMAP;GPIO;DOE31_0;DIO29
CPU_MMAP;GPIO;DOE31_0;DIO28
CPU_MMAP;GPIO;DOE31_0;DIO27
CPU_MMAP;GPIO;DOE31_0;DIO26
CPU_MMAP;GPIO;DOE31_0;DIO25
CPU_MMAP;GPIO;DOE31_0;DIO24
CPU_MMAP;GPIO;DOE31_0;DIO23
CPU_MMAP;GPIO;DOE31_0;DIO22
CPU_MMAP;GPIO;DOE31_0;DIO21
CPU_MMAP;GPIO;DOE31_0;DIO20
CPU_MMAP;GPIO;DOE31_0;DIO19
CPU_MMAP;GPIO;DOE31_0;DIO18
CPU_MMAP;GPIO;DOE31_0;DIO17
CPU_MMAP;GPIO;DOE31_0;DIO16
CPU_MMAP;GPIO;DOE31_0;DIO15
CPU_MMAP;GPIO;DOE31_0;DIO14
CPU_MMAP;GPIO;DOE31_0;DIO13
CPU_MMAP;GPIO;DOE31_0;DIO12
CPU_MMAP;GPIO;DOE31_0;DIO11
CPU_MMAP;GPIO;DOE31_0;DIO10
CPU_MMAP;GPIO;DOE31_0;DIO9
CPU_MMAP;GPIO;DOE31_0;DIO8
CPU_MMAP;GPIO;DOE31_0;DIO7
CPU_MMAP;GPIO;DOE31_0;DIO6
CPU_MMAP;GPIO;DOE31_0;DIO5
CPU_MMAP;GPIO;DOE31_0;DIO4
CPU_MMAP;GPIO;DOE31_0;DIO3
CPU_MMAP;GPIO;DOE31_0;DIO2
CPU_MMAP;GPIO;DOE31_0;DIO1
CPU_MMAP;GPIO;DOE31_0;DIO0
CPU_MMAP;GPIO;EVFLAGS31_0
CPU_MMAP;GPIO;EVFLAGS31_0;DIO31
CPU_MMAP;GPIO;EVFLAGS31_0;DIO30
CPU_MMAP;GPIO;EVFLAGS31_0;DIO29
CPU_MMAP;GPIO;EVFLAGS31_0;DIO28
CPU_MMAP;GPIO;EVFLAGS31_0;DIO27
CPU_MMAP;GPIO;EVFLAGS31_0;DIO26
CPU_MMAP;GPIO;EVFLAGS31_0;DIO25
CPU_MMAP;GPIO;EVFLAGS31_0;DIO24
CPU_MMAP;GPIO;EVFLAGS31_0;DIO23
CPU_MMAP;GPIO;EVFLAGS31_0;DIO22
CPU_MMAP;GPIO;EVFLAGS31_0;DIO21
CPU_MMAP;GPIO;EVFLAGS31_0;DIO20
CPU_MMAP;GPIO;EVFLAGS31_0;DIO19
CPU_MMAP;GPIO;EVFLAGS31_0;DIO18
CPU_MMAP;GPIO;EVFLAGS31_0;DIO17
CPU_MMAP;GPIO;EVFLAGS31_0;DIO16
CPU_MMAP;GPIO;EVFLAGS31_0;DIO15
CPU_MMAP;GPIO;EVFLAGS31_0;DIO14
CPU_MMAP;GPIO;EVFLAGS31_0;DIO13
CPU_MMAP;GPIO;EVFLAGS31_0;DIO12
CPU_MMAP;GPIO;EVFLAGS31_0;DIO11
CPU_MMAP;GPIO;EVFLAGS31_0;DIO10
CPU_MMAP;GPIO;EVFLAGS31_0;DIO9
CPU_MMAP;GPIO;EVFLAGS31_0;DIO8
CPU_MMAP;GPIO;EVFLAGS31_0;DIO7
CPU_MMAP;GPIO;EVFLAGS31_0;DIO6
CPU_MMAP;GPIO;EVFLAGS31_0;DIO5
CPU_MMAP;GPIO;EVFLAGS31_0;DIO4
CPU_MMAP;GPIO;EVFLAGS31_0;DIO3
CPU_MMAP;GPIO;EVFLAGS31_0;DIO2
CPU_MMAP;GPIO;EVFLAGS31_0;DIO1
CPU_MMAP;GPIO;EVFLAGS31_0;DIO0
CPU_MMAP;CRYPTO
CPU_MMAP;CRYPTO;DMACH0CTL
CPU_MMAP;CRYPTO;DMACH0CTL;RESERVED2
CPU_MMAP;CRYPTO;DMACH0CTL;PRIO
CPU_MMAP;CRYPTO;DMACH0CTL;PRIO;LOW
CPU_MMAP;CRYPTO;DMACH0CTL;PRIO;HIGH
CPU_MMAP;CRYPTO;DMACH0CTL;EN
CPU_MMAP;CRYPTO;DMACH0CTL;EN;DIS
CPU_MMAP;CRYPTO;DMACH0CTL;EN;EN
CPU_MMAP;CRYPTO;DMACH0EXTADDR
CPU_MMAP;CRYPTO;DMACH0EXTADDR;ADDR
CPU_MMAP;CRYPTO;DMACH0LEN
CPU_MMAP;CRYPTO;DMACH0LEN;RESERVED16
CPU_MMAP;CRYPTO;DMACH0LEN;LEN
CPU_MMAP;CRYPTO;DMASTAT
CPU_MMAP;CRYPTO;DMASTAT;RESERVED18
CPU_MMAP;CRYPTO;DMASTAT;PORT_ERR
CPU_MMAP;CRYPTO;DMASTAT;RESERVED2
CPU_MMAP;CRYPTO;DMASTAT;CH1_ACTIVE
CPU_MMAP;CRYPTO;DMASTAT;CH0_ACTIVE
CPU_MMAP;CRYPTO;DMASWRESET
CPU_MMAP;CRYPTO;DMASWRESET;RESERVED1
CPU_MMAP;CRYPTO;DMASWRESET;RESET
CPU_MMAP;CRYPTO;DMACH1CTL
CPU_MMAP;CRYPTO;DMACH1CTL;RESERVED2
CPU_MMAP;CRYPTO;DMACH1CTL;PRIO
CPU_MMAP;CRYPTO;DMACH1CTL;PRIO;LOW
CPU_MMAP;CRYPTO;DMACH1CTL;PRIO;HIGH
CPU_MMAP;CRYPTO;DMACH1CTL;EN
CPU_MMAP;CRYPTO;DMACH1CTL;EN;DIS
CPU_MMAP;CRYPTO;DMACH1CTL;EN;EN
CPU_MMAP;CRYPTO;DMACH1EXTADDR
CPU_MMAP;CRYPTO;DMACH1EXTADDR;ADDR
CPU_MMAP;CRYPTO;DMACH1LEN
CPU_MMAP;CRYPTO;DMACH1LEN;RESERVED16
CPU_MMAP;CRYPTO;DMACH1LEN;LEN
CPU_MMAP;CRYPTO;DMABUSCFG
CPU_MMAP;CRYPTO;DMABUSCFG;RESERVED16
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BURST_SIZE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BURST_SIZE;4_BYTE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BURST_SIZE;8_BYTE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BURST_SIZE;16_BYTE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BURST_SIZE;32_BYTE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BURST_SIZE;64_BYTE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_IDLE_EN
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_IDLE_EN;NO_IDLE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_IDLE_EN;IDLE
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_INCR_EN
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_INCR_EN;UNSPECIFIED
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_INCR_EN;SPECIFIED
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_LOCK_EN
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_LOCK_EN;NOT_LOCKED
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_LOCK_EN;LOCKED
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BIGEND
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BIGEND;LITTLE_ENDIAN
CPU_MMAP;CRYPTO;DMABUSCFG;AHB_MST1_BIGEND;BIG_ENDIAN
CPU_MMAP;CRYPTO;DMABUSCFG;RESERVED0
CPU_MMAP;CRYPTO;DMAPORTERR
CPU_MMAP;CRYPTO;DMAPORTERR;RESERVED13
CPU_MMAP;CRYPTO;DMAPORTERR;AHB_ERR
CPU_MMAP;CRYPTO;DMAPORTERR;RESERVED10
CPU_MMAP;CRYPTO;DMAPORTERR;LAST_CH
CPU_MMAP;CRYPTO;DMAPORTERR;RESERVED0
CPU_MMAP;CRYPTO;DMAHWVER
CPU_MMAP;CRYPTO;DMAHWVER;RESERVED28
CPU_MMAP;CRYPTO;DMAHWVER;HW_MAJOR_VER
CPU_MMAP;CRYPTO;DMAHWVER;HW_MINOR_VER
CPU_MMAP;CRYPTO;DMAHWVER;HW_PATCH_LVL
CPU_MMAP;CRYPTO;DMAHWVER;VER_NUM_COMPL
CPU_MMAP;CRYPTO;DMAHWVER;VER_NUM
CPU_MMAP;CRYPTO;KEYWRITEAREA
CPU_MMAP;CRYPTO;KEYWRITEAREA;RESERVED8
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA7
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA7;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA7;SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA6
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA6;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA6;SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA5
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA5;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA5;SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA4
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA4;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA4;SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA3
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA3;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA3;SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA2
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA2;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA2;SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA1
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA1;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA1;SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA0
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA0;NOT_SEL
CPU_MMAP;CRYPTO;KEYWRITEAREA;RAM_AREA0;SEL
CPU_MMAP;CRYPTO;KEYWRITTENAREA
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RESERVED8
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN7
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN7;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN7;WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN6
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN6;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN6;WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN5
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN5;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN5;WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN4
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN4;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN4;WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN3
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN3;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN3;WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN2
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN2;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN2;WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN1
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN1;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN1;WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN0
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN0;NOT_WRITTEN
CPU_MMAP;CRYPTO;KEYWRITTENAREA;RAM_AREA_WRITTEN0;WRITTEN
CPU_MMAP;CRYPTO;KEYSIZE
CPU_MMAP;CRYPTO;KEYSIZE;RESERVED2
CPU_MMAP;CRYPTO;KEYSIZE;SIZE
CPU_MMAP;CRYPTO;KEYSIZE;SIZE;128_BIT
CPU_MMAP;CRYPTO;KEYSIZE;SIZE;192_BIT
CPU_MMAP;CRYPTO;KEYSIZE;SIZE;256_BIT
CPU_MMAP;CRYPTO;KEYREADAREA
CPU_MMAP;CRYPTO;KEYREADAREA;BUSY
CPU_MMAP;CRYPTO;KEYREADAREA;RESERVED4
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA0
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA1
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA2
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA3
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA4
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA5
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA6
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;RAM_AREA7
CPU_MMAP;CRYPTO;KEYREADAREA;RAM_AREA;NO_RAM
CPU_MMAP;CRYPTO;AESKEY2
CPU_MMAP;CRYPTO;AESKEY2;KEY2
CPU_MMAP;CRYPTO;AESKEY3
CPU_MMAP;CRYPTO;AESKEY3;KEY3
CPU_MMAP;CRYPTO;AESIV
CPU_MMAP;CRYPTO;AESIV;IV
CPU_MMAP;CRYPTO;AESCTL
CPU_MMAP;CRYPTO;AESCTL;CONTEXT_RDY
CPU_MMAP;CRYPTO;AESCTL;SAVED_CONTEXT_RDY
CPU_MMAP;CRYPTO;AESCTL;SAVE_CONTEXT
CPU_MMAP;CRYPTO;AESCTL;RESERVED25
CPU_MMAP;CRYPTO;AESCTL;CCM_M
CPU_MMAP;CRYPTO;AESCTL;CCM_L
CPU_MMAP;CRYPTO;AESCTL;CCM
CPU_MMAP;CRYPTO;AESCTL;RESERVED
CPU_MMAP;CRYPTO;AESCTL;CBC_MAC
CPU_MMAP;CRYPTO;AESCTL;RESERVED9
CPU_MMAP;CRYPTO;AESCTL;CTR_WIDTH
CPU_MMAP;CRYPTO;AESCTL;CTR_WIDTH;32_BIT
CPU_MMAP;CRYPTO;AESCTL;CTR_WIDTH;64_BIT
CPU_MMAP;CRYPTO;AESCTL;CTR_WIDTH;96_BIT
CPU_MMAP;CRYPTO;AESCTL;CTR_WIDTH;128_BIT
CPU_MMAP;CRYPTO;AESCTL;CTR
CPU_MMAP;CRYPTO;AESCTL;CBC
CPU_MMAP;CRYPTO;AESCTL;KEY_SIZE
CPU_MMAP;CRYPTO;AESCTL;DIR
CPU_MMAP;CRYPTO;AESCTL;INPUT_RDY
CPU_MMAP;CRYPTO;AESCTL;OUTPUT_RDY
CPU_MMAP;CRYPTO;AESDATALEN0
CPU_MMAP;CRYPTO;AESDATALEN0;LEN_LSW
CPU_MMAP;CRYPTO;AESDATALEN1
CPU_MMAP;CRYPTO;AESDATALEN1;RESERVED
CPU_MMAP;CRYPTO;AESDATALEN1;LEN_MSW
CPU_MMAP;CRYPTO;AESAUTHLEN
CPU_MMAP;CRYPTO;AESAUTHLEN;LEN
CPU_MMAP;CRYPTO;AESDATAIN0
CPU_MMAP;CRYPTO;AESDATAIN0;DATA
CPU_MMAP;CRYPTO;AESDATAOUT0
CPU_MMAP;CRYPTO;AESDATAOUT0;DATA
CPU_MMAP;CRYPTO;AESDATAIN1
CPU_MMAP;CRYPTO;AESDATAIN1;DATA
CPU_MMAP;CRYPTO;AESDATAOUT1
CPU_MMAP;CRYPTO;AESDATAOUT1;DATA
CPU_MMAP;CRYPTO;AESDATAIN2
CPU_MMAP;CRYPTO;AESDATAIN2;DATA
CPU_MMAP;CRYPTO;AESDATAOUT2
CPU_MMAP;CRYPTO;AESDATAOUT2;DATA
CPU_MMAP;CRYPTO;AESDATAIN3
CPU_MMAP;CRYPTO;AESDATAIN3;DATA
CPU_MMAP;CRYPTO;AESDATAOUT3
CPU_MMAP;CRYPTO;AESDATAOUT3;DATA
CPU_MMAP;CRYPTO;AESTAGOUT
CPU_MMAP;CRYPTO;AESTAGOUT;TAG
CPU_MMAP;CRYPTO;ALGSEL
CPU_MMAP;CRYPTO;ALGSEL;TAG
CPU_MMAP;CRYPTO;ALGSEL;RESERVED2
CPU_MMAP;CRYPTO;ALGSEL;AES
CPU_MMAP;CRYPTO;ALGSEL;KEY_STORE
CPU_MMAP;CRYPTO;DMAPROTCTL
CPU_MMAP;CRYPTO;DMAPROTCTL;RESERVED1
CPU_MMAP;CRYPTO;DMAPROTCTL;EN
CPU_MMAP;CRYPTO;SWRESET
CPU_MMAP;CRYPTO;SWRESET;RESERVED1
CPU_MMAP;CRYPTO;SWRESET;RESET
CPU_MMAP;CRYPTO;IRQTYPE
CPU_MMAP;CRYPTO;IRQTYPE;RESERVED1
CPU_MMAP;CRYPTO;IRQTYPE;IEN
CPU_MMAP;CRYPTO;IRQEN
CPU_MMAP;CRYPTO;IRQEN;RESERVED2
CPU_MMAP;CRYPTO;IRQEN;DMA_IN_DONE
CPU_MMAP;CRYPTO;IRQEN;RESULT_AVAIL
CPU_MMAP;CRYPTO;IRQCLR
CPU_MMAP;CRYPTO;IRQCLR;DMA_BUS_ERR
CPU_MMAP;CRYPTO;IRQCLR;KEY_ST_WR_ERR
CPU_MMAP;CRYPTO;IRQCLR;KEY_ST_RD_ERR
CPU_MMAP;CRYPTO;IRQCLR;RESERVED2
CPU_MMAP;CRYPTO;IRQCLR;DMA_IN_DONE
CPU_MMAP;CRYPTO;IRQCLR;RESULT_AVAIL
CPU_MMAP;CRYPTO;IRQSET
CPU_MMAP;CRYPTO;IRQSET;RESERVED2
CPU_MMAP;CRYPTO;IRQSET;DMA_IN_DONE
CPU_MMAP;CRYPTO;IRQSET;RESULT_AVAIL
CPU_MMAP;CRYPTO;IRQSTAT
CPU_MMAP;CRYPTO;IRQSTAT;DMA_BUS_ERR
CPU_MMAP;CRYPTO;IRQSTAT;KEY_ST_WR_ERR
CPU_MMAP;CRYPTO;IRQSTAT;KEY_ST_RD_ERR
CPU_MMAP;CRYPTO;IRQSTAT;RESERVED2
CPU_MMAP;CRYPTO;IRQSTAT;DMA_IN_DONE
CPU_MMAP;CRYPTO;IRQSTAT;RESULT_AVAIL
CPU_MMAP;CRYPTO;HWVER
CPU_MMAP;CRYPTO;HWVER;RESERVED28
CPU_MMAP;CRYPTO;HWVER;HW_MAJOR_VER
CPU_MMAP;CRYPTO;HWVER;HW_MINOR_VER
CPU_MMAP;CRYPTO;HWVER;HW_PATCH_LVL
CPU_MMAP;CRYPTO;HWVER;VER_NUM_COMPL
CPU_MMAP;CRYPTO;HWVER;VER_NUM
CPU_MMAP;TRNG
CPU_MMAP;TRNG;OUT0
CPU_MMAP;TRNG;OUT0;VALUE_31_0
CPU_MMAP;TRNG;OUT1
CPU_MMAP;TRNG;OUT1;VALUE_63_32
CPU_MMAP;TRNG;IRQFLAGSTAT
CPU_MMAP;TRNG;IRQFLAGSTAT;NEED_CLOCK
CPU_MMAP;TRNG;IRQFLAGSTAT;RESERVED2
CPU_MMAP;TRNG;IRQFLAGSTAT;SHUTDOWN_OVF
CPU_MMAP;TRNG;IRQFLAGSTAT;RDY
CPU_MMAP;TRNG;IRQFLAGMASK
CPU_MMAP;TRNG;IRQFLAGMASK;RESERVED2
CPU_MMAP;TRNG;IRQFLAGMASK;SHUTDOWN_OVF
CPU_MMAP;TRNG;IRQFLAGMASK;RDY
CPU_MMAP;TRNG;IRQFLAGCLR
CPU_MMAP;TRNG;IRQFLAGCLR;RESERVED2
CPU_MMAP;TRNG;IRQFLAGCLR;SHUTDOWN_OVF
CPU_MMAP;TRNG;IRQFLAGCLR;RDY
CPU_MMAP;TRNG;CTL
CPU_MMAP;TRNG;CTL;STARTUP_CYCLES
CPU_MMAP;TRNG;CTL;RESERVED11
CPU_MMAP;TRNG;CTL;TRNG_EN
CPU_MMAP;TRNG;CTL;RESERVED3
CPU_MMAP;TRNG;CTL;NO_LFSR_FB
CPU_MMAP;TRNG;CTL;TEST_MODE
CPU_MMAP;TRNG;CTL;RESERVED0
CPU_MMAP;TRNG;CFG0
CPU_MMAP;TRNG;CFG0;MAX_REFILL_CYCLES
CPU_MMAP;TRNG;CFG0;RESERVED12
CPU_MMAP;TRNG;CFG0;SMPL_DIV
CPU_MMAP;TRNG;CFG0;MIN_REFILL_CYCLES
CPU_MMAP;TRNG;ALARMCNT
CPU_MMAP;TRNG;ALARMCNT;RESERVED30
CPU_MMAP;TRNG;ALARMCNT;SHUTDOWN_CNT
CPU_MMAP;TRNG;ALARMCNT;RESERVED21
CPU_MMAP;TRNG;ALARMCNT;SHUTDOWN_THR
CPU_MMAP;TRNG;ALARMCNT;RESERVED8
CPU_MMAP;TRNG;ALARMCNT;ALARM_THR
CPU_MMAP;TRNG;FROEN
CPU_MMAP;TRNG;FROEN;RESERVED24
CPU_MMAP;TRNG;FROEN;FRO_MASK
CPU_MMAP;TRNG;FRODETUNE
CPU_MMAP;TRNG;FRODETUNE;RESERVED24
CPU_MMAP;TRNG;FRODETUNE;FRO_MASK
CPU_MMAP;TRNG;ALARMMASK
CPU_MMAP;TRNG;ALARMMASK;RESERVED24
CPU_MMAP;TRNG;ALARMMASK;FRO_MASK
CPU_MMAP;TRNG;ALARMSTOP
CPU_MMAP;TRNG;ALARMSTOP;RESERVED24
CPU_MMAP;TRNG;ALARMSTOP;FRO_FLAGS
CPU_MMAP;TRNG;LFSR0
CPU_MMAP;TRNG;LFSR0;LFSR_31_0
CPU_MMAP;TRNG;LFSR1
CPU_MMAP;TRNG;LFSR1;LFSR_63_32
CPU_MMAP;TRNG;LFSR2
CPU_MMAP;TRNG;LFSR2;RESERVED17
CPU_MMAP;TRNG;LFSR2;LFSR_80_64
CPU_MMAP;TRNG;HWOPT
CPU_MMAP;TRNG;HWOPT;RESERVED12
CPU_MMAP;TRNG;HWOPT;NR_OF_FROS
CPU_MMAP;TRNG;HWOPT;RESERVED0
CPU_MMAP;TRNG;HWVER0
CPU_MMAP;TRNG;HWVER0;RESERVED28
CPU_MMAP;TRNG;HWVER0;HW_MAJOR_VER
CPU_MMAP;TRNG;HWVER0;HW_MINOR_VER
CPU_MMAP;TRNG;HWVER0;HW_PATCH_LVL
CPU_MMAP;TRNG;HWVER0;EIP_NUM_COMPL
CPU_MMAP;TRNG;HWVER0;EIP_NUM
CPU_MMAP;TRNG;IRQSTATMASK
CPU_MMAP;TRNG;IRQSTATMASK;RESERVED2
CPU_MMAP;TRNG;IRQSTATMASK;SHUTDOWN_OVF
CPU_MMAP;TRNG;IRQSTATMASK;RDY
CPU_MMAP;TRNG;HWVER1
CPU_MMAP;TRNG;HWVER1;RESERVED8
CPU_MMAP;TRNG;HWVER1;REV
CPU_MMAP;TRNG;IRQSET
CPU_MMAP;TRNG;IRQSET;RESERVED2
CPU_MMAP;TRNG;IRQSET;SHUTDOWN_OVF
CPU_MMAP;TRNG;IRQSET;RDY
CPU_MMAP;TRNG;SWRESET
CPU_MMAP;TRNG;SWRESET;RESERVED1
CPU_MMAP;TRNG;SWRESET;RESET
CPU_MMAP;TRNG;IRQSTAT
CPU_MMAP;TRNG;IRQSTAT;RESERVED1
CPU_MMAP;TRNG;IRQSTAT;STAT
CPU_MMAP;FLASH
CPU_MMAP;FLASH;STAT
CPU_MMAP;FLASH;STAT;RESERVED16
CPU_MMAP;FLASH;STAT;EFUSE_BLANK
CPU_MMAP;FLASH;STAT;EFUSE_TIMEOUT
CPU_MMAP;FLASH;STAT;EFUSE_CRC_ERROR
CPU_MMAP;FLASH;STAT;EFUSE_ERRCODE
CPU_MMAP;FLASH;STAT;RESERVED3
CPU_MMAP;FLASH;STAT;SAMHOLD_DIS
CPU_MMAP;FLASH;STAT;BUSY
CPU_MMAP;FLASH;STAT;POWER_MODE
CPU_MMAP;FLASH;CFG
CPU_MMAP;FLASH;CFG;CONFIGURED
CPU_MMAP;FLASH;CFG;RESERVED9
CPU_MMAP;FLASH;CFG;STANDBY_MODE_SEL
CPU_MMAP;FLASH;CFG;STANDBY_PW_SEL
CPU_MMAP;FLASH;CFG;DIS_EFUSECLK
CPU_MMAP;FLASH;CFG;DIS_READACCESS
CPU_MMAP;FLASH;CFG;ENABLE_SWINTF
CPU_MMAP;FLASH;CFG;PROTECTCFG
CPU_MMAP;FLASH;CFG;DIS_STANDBY
CPU_MMAP;FLASH;CFG;DIS_IDLE
CPU_MMAP;FLASH;SYSCODE_START
CPU_MMAP;FLASH;SYSCODE_START;RESERVED5
CPU_MMAP;FLASH;SYSCODE_START;SYSCODE_START
CPU_MMAP;FLASH;FLASH_SIZE
CPU_MMAP;FLASH;FLASH_SIZE;RESERVED8
CPU_MMAP;FLASH;FLASH_SIZE;SECTORS
CPU_MMAP;FLASH;FWLOCK
CPU_MMAP;FLASH;FWLOCK;RESERVED3
CPU_MMAP;FLASH;FWLOCK;FWLOCK
CPU_MMAP;FLASH;FWFLAG
CPU_MMAP;FLASH;FWFLAG;RESERVED3
CPU_MMAP;FLASH;FWFLAG;FWFLAG
CPU_MMAP;FLASH;EFUSE
CPU_MMAP;FLASH;EFUSE;RESERVED29
CPU_MMAP;FLASH;EFUSE;INSTRUCTION
CPU_MMAP;FLASH;EFUSE;RESERVED16
CPU_MMAP;FLASH;EFUSE;DUMPWORD
CPU_MMAP;FLASH;EFUSEADDR
CPU_MMAP;FLASH;EFUSEADDR;RESERVED16
CPU_MMAP;FLASH;EFUSEADDR;BLOCK
CPU_MMAP;FLASH;EFUSEADDR;ROW
CPU_MMAP;FLASH;DATAUPPER
CPU_MMAP;FLASH;DATAUPPER;RESERVED8
CPU_MMAP;FLASH;DATAUPPER;SPARE
CPU_MMAP;FLASH;DATAUPPER;P
CPU_MMAP;FLASH;DATAUPPER;R
CPU_MMAP;FLASH;DATAUPPER;EEN
CPU_MMAP;FLASH;DATALOWER
CPU_MMAP;FLASH;DATALOWER;DATA
CPU_MMAP;FLASH;EFUSECFG
CPU_MMAP;FLASH;EFUSECFG;RESERVED14
CPU_MMAP;FLASH;EFUSECFG;RESERVED12
CPU_MMAP;FLASH;EFUSECFG;RESERVED9
CPU_MMAP;FLASH;EFUSECFG;IDLEGATING
CPU_MMAP;FLASH;EFUSECFG;RESERVED7
CPU_MMAP;FLASH;EFUSECFG;RESERVED6
CPU_MMAP;FLASH;EFUSECFG;RESERVED5
CPU_MMAP;FLASH;EFUSECFG;SLAVEPOWER
CPU_MMAP;FLASH;EFUSECFG;RESERVED2
CPU_MMAP;FLASH;EFUSECFG;RESERVED1
CPU_MMAP;FLASH;EFUSECFG;GATING
CPU_MMAP;FLASH;EFUSESTAT
CPU_MMAP;FLASH;EFUSESTAT;RESERVED1
CPU_MMAP;FLASH;EFUSESTAT;RESETDONE
CPU_MMAP;FLASH;ACC
CPU_MMAP;FLASH;ACC;RESERVED24
CPU_MMAP;FLASH;ACC;ACCUMULATOR
CPU_MMAP;FLASH;BOUNDARY
CPU_MMAP;FLASH;BOUNDARY;RESERVED24
CPU_MMAP;FLASH;BOUNDARY;DISROW0
CPU_MMAP;FLASH;BOUNDARY;SPARE
CPU_MMAP;FLASH;BOUNDARY;EFC_SELF_TEST_ERROR
CPU_MMAP;FLASH;BOUNDARY;EFC_INSTRUCTION_INFO
CPU_MMAP;FLASH;BOUNDARY;EFC_INSTRUCTION_ERROR
CPU_MMAP;FLASH;BOUNDARY;EFC_AUTOLOAD_ERROR
CPU_MMAP;FLASH;BOUNDARY;OUTPUTENABLE
CPU_MMAP;FLASH;BOUNDARY;YS_ECC_SELF_TEST_EN
CPU_MMAP;FLASH;BOUNDARY;SYS_ECC_OVERRIDE_EN
CPU_MMAP;FLASH;BOUNDARY;EFC_FDI
CPU_MMAP;FLASH;BOUNDARY;SYS_DIEID_AUTOLOAD_EN
CPU_MMAP;FLASH;BOUNDARY;SYS_REPAIR_EN
CPU_MMAP;FLASH;BOUNDARY;SYS_WS_READ_STATES
CPU_MMAP;FLASH;BOUNDARY;INPUTENABLE
CPU_MMAP;FLASH;EFUSEFLAG
CPU_MMAP;FLASH;EFUSEFLAG;RESERVED1
CPU_MMAP;FLASH;EFUSEFLAG;KEY
CPU_MMAP;FLASH;EFUSEKEY
CPU_MMAP;FLASH;EFUSEKEY;CODE
CPU_MMAP;FLASH;EFUSERELEASE
CPU_MMAP;FLASH;EFUSERELEASE;ODPYEAR
CPU_MMAP;FLASH;EFUSERELEASE;ODPMONTH
CPU_MMAP;FLASH;EFUSERELEASE;ODPDAY
CPU_MMAP;FLASH;EFUSERELEASE;EFUSEYEAR
CPU_MMAP;FLASH;EFUSERELEASE;EFUSEMONTH
CPU_MMAP;FLASH;EFUSERELEASE;EFUSEDAY
CPU_MMAP;FLASH;EFUSEPINS
CPU_MMAP;FLASH;EFUSEPINS;RESERVED16
CPU_MMAP;FLASH;EFUSEPINS;EFC_SELF_TEST_DONE
CPU_MMAP;FLASH;EFUSEPINS;EFC_SELF_TEST_ERROR
CPU_MMAP;FLASH;EFUSEPINS;SYS_ECC_SELF_TEST_EN
CPU_MMAP;FLASH;EFUSEPINS;EFC_INSTRUCTION_INFO
CPU_MMAP;FLASH;EFUSEPINS;EFC_INSTRUCTION_ERROR
CPU_MMAP;FLASH;EFUSEPINS;EFC_AUTOLOAD_ERROR
CPU_MMAP;FLASH;EFUSEPINS;SYS_ECC_OVERRIDE_EN
CPU_MMAP;FLASH;EFUSEPINS;EFC_READY
CPU_MMAP;FLASH;EFUSEPINS;EFC_FCLRZ
CPU_MMAP;FLASH;EFUSEPINS;SYS_DIEID_AUTOLOAD_EN
CPU_MMAP;FLASH;EFUSEPINS;SYS_REPAIR_EN
CPU_MMAP;FLASH;EFUSEPINS;SYS_WS_READ_STATES
CPU_MMAP;FLASH;EFUSECRA
CPU_MMAP;FLASH;EFUSECRA;RESERVED6
CPU_MMAP;FLASH;EFUSECRA;DATA
CPU_MMAP;FLASH;EFUSEREAD
CPU_MMAP;FLASH;EFUSEREAD;RESERVED10
CPU_MMAP;FLASH;EFUSEREAD;DATABIT
CPU_MMAP;FLASH;EFUSEREAD;READCLOCK
CPU_MMAP;FLASH;EFUSEREAD;DEBUG
CPU_MMAP;FLASH;EFUSEREAD;SPARE
CPU_MMAP;FLASH;EFUSEREAD;MARGIN
CPU_MMAP;FLASH;EFUSEPROGRAM
CPU_MMAP;FLASH;EFUSEPROGRAM;RESERVED31
CPU_MMAP;FLASH;EFUSEPROGRAM;COMPAREDISABLE
CPU_MMAP;FLASH;EFUSEPROGRAM;CLOCKSTALL
CPU_MMAP;FLASH;EFUSEPROGRAM;VPPTOVDD
CPU_MMAP;FLASH;EFUSEPROGRAM;ITERATIONS
CPU_MMAP;FLASH;EFUSEPROGRAM;WRITECLOCK
CPU_MMAP;FLASH;EFUSEERROR
CPU_MMAP;FLASH;EFUSEERROR;RESERVED6
CPU_MMAP;FLASH;EFUSEERROR;DONE
CPU_MMAP;FLASH;EFUSEERROR;CODE
CPU_MMAP;FLASH;SINGLEBIT
CPU_MMAP;FLASH;SINGLEBIT;FROMN
CPU_MMAP;FLASH;SINGLEBIT;FROM0
CPU_MMAP;FLASH;TWOBIT
CPU_MMAP;FLASH;TWOBIT;FROMN
CPU_MMAP;FLASH;TWOBIT;FROM0
CPU_MMAP;FLASH;SELFTESTCYC
CPU_MMAP;FLASH;SELFTESTCYC;CYCLES
CPU_MMAP;FLASH;SELFTESTSIGN
CPU_MMAP;FLASH;SELFTESTSIGN;SIGNATURE
CPU_MMAP;FLASH;FRDCTL
CPU_MMAP;FLASH;FRDCTL;RESERVED28
CPU_MMAP;FLASH;FRDCTL;IFLUSH_HOLD
CPU_MMAP;FLASH;FRDCTL;RESERVED17
CPU_MMAP;FLASH;FRDCTL;IDLEN
CPU_MMAP;FLASH;FRDCTL;RESERVED12
CPU_MMAP;FLASH;FRDCTL;RWAIT
CPU_MMAP;FLASH;FRDCTL;RESERVED5
CPU_MMAP;FLASH;FRDCTL;ASWSTEN
CPU_MMAP;FLASH;FRDCTL;RESERVED1
CPU_MMAP;FLASH;FRDCTL;RM
CPU_MMAP;FLASH;FSPRD
CPU_MMAP;FLASH;FSPRD;RESERVED28
CPU_MMAP;FLASH;FSPRD;ROM_KEY
CPU_MMAP;FLASH;FSPRD;RESERVED17
CPU_MMAP;FLASH;FSPRD;DIS_PREEMPT
CPU_MMAP;FLASH;FSPRD;RMBSEM
CPU_MMAP;FLASH;FSPRD;RESERVED2
CPU_MMAP;FLASH;FSPRD;RM1
CPU_MMAP;FLASH;FSPRD;RM0
CPU_MMAP;FLASH;FEDACCTL1
CPU_MMAP;FLASH;FEDACCTL1;RESERVED25
CPU_MMAP;FLASH;FEDACCTL1;SUSP_IGNR
CPU_MMAP;FLASH;FEDACCTL1;RESERVED20
CPU_MMAP;FLASH;FEDACCTL1;EDACMODE
CPU_MMAP;FLASH;FEDACCTL1;RESERVED11
CPU_MMAP;FLASH;FEDACCTL1;EOFEN
CPU_MMAP;FLASH;FEDACCTL1;EZFEN
CPU_MMAP;FLASH;FEDACCTL1;EPEN
CPU_MMAP;FLASH;FEDACCTL1;RESERVED6
CPU_MMAP;FLASH;FEDACCTL1;EOCV
CPU_MMAP;FLASH;FEDACCTL1;EZCV
CPU_MMAP;FLASH;FEDACCTL1;EDACEN
CPU_MMAP;FLASH;FEDACSTAT
CPU_MMAP;FLASH;FEDACSTAT;RESERVED26
CPU_MMAP;FLASH;FEDACSTAT;RVF_INT
CPU_MMAP;FLASH;FEDACSTAT;FSM_DONE
CPU_MMAP;FLASH;FEDACSTAT;COM3_MAL_GOOD
CPU_MMAP;FLASH;FEDACSTAT;COM2_MAL_GOOD
CPU_MMAP;FLASH;FEDACSTAT;ECC3_MAL_ERR
CPU_MMAP;FLASH;FEDACSTAT;ECC2_MAL_ERR
CPU_MMAP;FLASH;FEDACSTAT;COMB2_BUS_MAL_GOOD
CPU_MMAP;FLASH;FEDACSTAT;ECCB2_MAL_ERR
CPU_MMAP;FLASH;FEDACSTAT;B2_UNC_ERR
CPU_MMAP;FLASH;FEDACSTAT;B2_COR_ERR
CPU_MMAP;FLASH;FEDACSTAT;RESERVED14
CPU_MMAP;FLASH;FEDACSTAT;B2_ERR_IS_EE
CPU_MMAP;FLASH;FEDACSTAT;D_UNC_ERR
CPU_MMAP;FLASH;FEDACSTAT;ADD_TAG_ERR
CPU_MMAP;FLASH;FEDACSTAT;ADD_PAR_ERR
CPU_MMAP;FLASH;FEDACSTAT;BUF_PAR_ERR
CPU_MMAP;FLASH;FEDACSTAT;ECC_MUL_ERR
CPU_MMAP;FLASH;FEDACSTAT;COM1_MAL_GOOD
CPU_MMAP;FLASH;FEDACSTAT;COM0_MAL_GOOD
CPU_MMAP;FLASH;FEDACSTAT;ECC1_MAL_ERR
CPU_MMAP;FLASH;FEDACSTAT;ECC0_MAL_ERR
CPU_MMAP;FLASH;FEDACSTAT;D_COR_ERR
CPU_MMAP;FLASH;FEDACSTAT;ERR_ONE_FLG
CPU_MMAP;FLASH;FEDACSTAT;ERR_ZERO_FLG
CPU_MMAP;FLASH;FEDACSTAT;ERR_PRF_FLG
CPU_MMAP;FLASH;FBPROT
CPU_MMAP;FLASH;FBPROT;RESERVED1
CPU_MMAP;FLASH;FBPROT;PROTL1DIS
CPU_MMAP;FLASH;FBSE
CPU_MMAP;FLASH;FBSE;RESERVED16
CPU_MMAP;FLASH;FBSE;BSE
CPU_MMAP;FLASH;FBBUSY
CPU_MMAP;FLASH;FBBUSY;RESERVED8
CPU_MMAP;FLASH;FBBUSY;BUSY
CPU_MMAP;FLASH;FBAC
CPU_MMAP;FLASH;FBAC;RESERVED24
CPU_MMAP;FLASH;FBAC;RESERVED17
CPU_MMAP;FLASH;FBAC;OTPPROTDIS
CPU_MMAP;FLASH;FBAC;BAGP
CPU_MMAP;FLASH;FBAC;VREADS
CPU_MMAP;FLASH;FBFALLBACK
CPU_MMAP;FLASH;FBFALLBACK;RESERVED28
CPU_MMAP;FLASH;FBFALLBACK;FSM_PWRSAV
CPU_MMAP;FLASH;FBFALLBACK;RESERVED20
CPU_MMAP;FLASH;FBFALLBACK;REG_PWRSAV
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR7
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR6
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR5
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR4
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR3
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR2
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR1
CPU_MMAP;FLASH;FBFALLBACK;BANKPWR0
CPU_MMAP;FLASH;FBPRDY
CPU_MMAP;FLASH;FBPRDY;RESERVED24
CPU_MMAP;FLASH;FBPRDY;RESERVED17
CPU_MMAP;FLASH;FBPRDY;BANKBUSY
CPU_MMAP;FLASH;FBPRDY;PUMPRDY
CPU_MMAP;FLASH;FBPRDY;RESERVED8
CPU_MMAP;FLASH;FBPRDY;RESERVED1
CPU_MMAP;FLASH;FBPRDY;BANKRDY
CPU_MMAP;FLASH;FPAC1
CPU_MMAP;FLASH;FPAC1;RESERVED28
CPU_MMAP;FLASH;FPAC1;PSLEEPTDIS
CPU_MMAP;FLASH;FPAC1;PUMPRESET_PW
CPU_MMAP;FLASH;FPAC1;RESERVED1
CPU_MMAP;FLASH;FPAC1;PUMPPWR
CPU_MMAP;FLASH;FPAC2
CPU_MMAP;FLASH;FPAC2;RESERVED16
CPU_MMAP;FLASH;FPAC2;PAGP
CPU_MMAP;FLASH;FMAC
CPU_MMAP;FLASH;FMAC;RESERVED3
CPU_MMAP;FLASH;FMAC;BANK
CPU_MMAP;FLASH;FMSTAT
CPU_MMAP;FLASH;FMSTAT;RESERVED18
CPU_MMAP;FLASH;FMSTAT;RVSUSP
CPU_MMAP;FLASH;FMSTAT;RDVER
CPU_MMAP;FLASH;FMSTAT;RVF
CPU_MMAP;FLASH;FMSTAT;ILA
CPU_MMAP;FLASH;FMSTAT;DBF
CPU_MMAP;FLASH;FMSTAT;PGV
CPU_MMAP;FLASH;FMSTAT;PCV
CPU_MMAP;FLASH;FMSTAT;EV
CPU_MMAP;FLASH;FMSTAT;CV
CPU_MMAP;FLASH;FMSTAT;BUSY
CPU_MMAP;FLASH;FMSTAT;ERS
CPU_MMAP;FLASH;FMSTAT;PGM
CPU_MMAP;FLASH;FMSTAT;INVDAT
CPU_MMAP;FLASH;FMSTAT;CSTAT
CPU_MMAP;FLASH;FMSTAT;VOLSTAT
CPU_MMAP;FLASH;FMSTAT;ESUSP
CPU_MMAP;FLASH;FMSTAT;PSUSP
CPU_MMAP;FLASH;FMSTAT;SLOCK
CPU_MMAP;FLASH;FLOCK
CPU_MMAP;FLASH;FLOCK;RESERVED16
CPU_MMAP;FLASH;FLOCK;ENCOM
CPU_MMAP;FLASH;FVREADCT
CPU_MMAP;FLASH;FVREADCT;RESERVED4
CPU_MMAP;FLASH;FVREADCT;VREADCT
CPU_MMAP;FLASH;FVHVCT1
CPU_MMAP;FLASH;FVHVCT1;RESERVED24
CPU_MMAP;FLASH;FVHVCT1;TRIM13_E
CPU_MMAP;FLASH;FVHVCT1;VHVCT_E
CPU_MMAP;FLASH;FVHVCT1;RESERVED8
CPU_MMAP;FLASH;FVHVCT1;TRIM13_PV
CPU_MMAP;FLASH;FVHVCT1;VHVCT_PV
CPU_MMAP;FLASH;FVHVCT2
CPU_MMAP;FLASH;FVHVCT2;RESERVED24
CPU_MMAP;FLASH;FVHVCT2;TRIM13_P
CPU_MMAP;FLASH;FVHVCT2;VHVCT_P
CPU_MMAP;FLASH;FVHVCT2;RESERVED0
CPU_MMAP;FLASH;FVHVCT3
CPU_MMAP;FLASH;FVHVCT3;RESERVED20
CPU_MMAP;FLASH;FVHVCT3;WCT
CPU_MMAP;FLASH;FVHVCT3;RESERVED4
CPU_MMAP;FLASH;FVHVCT3;VHVCT_READ
CPU_MMAP;FLASH;FVNVCT
CPU_MMAP;FLASH;FVNVCT;RESERVED13
CPU_MMAP;FLASH;FVNVCT;VCG2P5CT
CPU_MMAP;FLASH;FVNVCT;RESERVED5
CPU_MMAP;FLASH;FVNVCT;VIN_CT
CPU_MMAP;FLASH;FVSLP
CPU_MMAP;FLASH;FVSLP;RESERVED16
CPU_MMAP;FLASH;FVSLP;VSL_P
CPU_MMAP;FLASH;FVSLP;RESERVED0
CPU_MMAP;FLASH;FVWLCT
CPU_MMAP;FLASH;FVWLCT;RESERVED5
CPU_MMAP;FLASH;FVWLCT;VWLCT_P
CPU_MMAP;FLASH;FEFUSECTL
CPU_MMAP;FLASH;FEFUSECTL;RESERVED27
CPU_MMAP;FLASH;FEFUSECTL;CHAIN_SEL
CPU_MMAP;FLASH;FEFUSECTL;RESERVED18
CPU_MMAP;FLASH;FEFUSECTL;WRITE_EN
CPU_MMAP;FLASH;FEFUSECTL;BP_SEL
CPU_MMAP;FLASH;FEFUSECTL;RESERVED9
CPU_MMAP;FLASH;FEFUSECTL;EF_CLRZ
CPU_MMAP;FLASH;FEFUSECTL;RESERVED5
CPU_MMAP;FLASH;FEFUSECTL;EF_TEST
CPU_MMAP;FLASH;FEFUSECTL;EFUSE_EN
CPU_MMAP;FLASH;FEFUSESTAT
CPU_MMAP;FLASH;FEFUSESTAT;RESERVED1
CPU_MMAP;FLASH;FEFUSESTAT;SHIFT_DONE
CPU_MMAP;FLASH;FEFUSEDATA
CPU_MMAP;FLASH;FEFUSEDATA;FEFUSEDATA
CPU_MMAP;FLASH;FSEQPMP
CPU_MMAP;FLASH;FSEQPMP;RESERVED28
CPU_MMAP;FLASH;FSEQPMP;TRIM_3P4
CPU_MMAP;FLASH;FSEQPMP;RESERVED22
CPU_MMAP;FLASH;FSEQPMP;TRIM_1P7
CPU_MMAP;FLASH;FSEQPMP;TRIM_0P8
CPU_MMAP;FLASH;FSEQPMP;RESERVED15
CPU_MMAP;FLASH;FSEQPMP;VIN_AT_X
CPU_MMAP;FLASH;FSEQPMP;RESERVED9
CPU_MMAP;FLASH;FSEQPMP;VIN_BY_PASS
CPU_MMAP;FLASH;FSEQPMP;SEQ_PUMP
CPU_MMAP;FLASH;FBSTROBES
CPU_MMAP;FLASH;FBSTROBES;RESERVED25
CPU_MMAP;FLASH;FBSTROBES;ECBIT
CPU_MMAP;FLASH;FBSTROBES;RESERVED19
CPU_MMAP;FLASH;FBSTROBES;RWAIT2_FLCLK
CPU_MMAP;FLASH;FBSTROBES;RWAIT_FLCLK
CPU_MMAP;FLASH;FBSTROBES;FLCLKEN
CPU_MMAP;FLASH;FBSTROBES;RESERVED9
CPU_MMAP;FLASH;FBSTROBES;CTRLENZ
CPU_MMAP;FLASH;FBSTROBES;RESERVED7
CPU_MMAP;FLASH;FBSTROBES;NOCOLRED
CPU_MMAP;FLASH;FBSTROBES;PRECOL
CPU_MMAP;FLASH;FBSTROBES;TI_OTP
CPU_MMAP;FLASH;FBSTROBES;OTP
CPU_MMAP;FLASH;FBSTROBES;TEZ
CPU_MMAP;FLASH;FBSTROBES;RESERVED0
CPU_MMAP;FLASH;FPSTROBES
CPU_MMAP;FLASH;FPSTROBES;RESERVED9
CPU_MMAP;FLASH;FPSTROBES;EXECUTEZ
CPU_MMAP;FLASH;FPSTROBES;RESERVED2
CPU_MMAP;FLASH;FPSTROBES;V3PWRDNZ
CPU_MMAP;FLASH;FPSTROBES;V5PWRDNZ
CPU_MMAP;FLASH;FBMODE
CPU_MMAP;FLASH;FBMODE;RESERVED3
CPU_MMAP;FLASH;FBMODE;MODE
CPU_MMAP;FLASH;FTCR
CPU_MMAP;FLASH;FTCR;RESERVED7
CPU_MMAP;FLASH;FTCR;TCR
CPU_MMAP;FLASH;FADDR
CPU_MMAP;FLASH;FADDR;FADDR
CPU_MMAP;FLASH;FTCTL
CPU_MMAP;FLASH;FTCTL;RESERVED25
CPU_MMAP;FLASH;FTCTL;AUTOCALC_EN
CPU_MMAP;FLASH;FTCTL;RESERVED17
CPU_MMAP;FLASH;FTCTL;WDATA_BLK_CLR
CPU_MMAP;FLASH;FTCTL;RESERVED2
CPU_MMAP;FLASH;FTCTL;TEST_EN
CPU_MMAP;FLASH;FTCTL;RESERVED0
CPU_MMAP;FLASH;FWPWRITE0
CPU_MMAP;FLASH;FWPWRITE0;FWPWRITE0
CPU_MMAP;FLASH;FWPWRITE1
CPU_MMAP;FLASH;FWPWRITE1;FWPWRITE1
CPU_MMAP;FLASH;FWPWRITE2
CPU_MMAP;FLASH;FWPWRITE2;FWPWRITE2
CPU_MMAP;FLASH;FWPWRITE3
CPU_MMAP;FLASH;FWPWRITE3;FWPWRITE3
CPU_MMAP;FLASH;FWPWRITE4
CPU_MMAP;FLASH;FWPWRITE4;FWPWRITE4
CPU_MMAP;FLASH;FWPWRITE5
CPU_MMAP;FLASH;FWPWRITE5;FWPWRITE5
CPU_MMAP;FLASH;FWPWRITE6
CPU_MMAP;FLASH;FWPWRITE6;FWPWRITE6
CPU_MMAP;FLASH;FWPWRITE7
CPU_MMAP;FLASH;FWPWRITE7;FWPWRITE7
CPU_MMAP;FLASH;FWPWRITE_ECC
CPU_MMAP;FLASH;FWPWRITE_ECC;ECCBYTES07_00
CPU_MMAP;FLASH;FWPWRITE_ECC;ECCBYTES15_08
CPU_MMAP;FLASH;FWPWRITE_ECC;ECCBYTES23_16
CPU_MMAP;FLASH;FWPWRITE_ECC;ECCBYTES31_24
CPU_MMAP;FLASH;FSWSTAT
CPU_MMAP;FLASH;FSWSTAT;RESERVED1
CPU_MMAP;FLASH;FSWSTAT;SAFELV
CPU_MMAP;FLASH;FSM_GLBCTL
CPU_MMAP;FLASH;FSM_GLBCTL;RESERVED1
CPU_MMAP;FLASH;FSM_GLBCTL;CLKSEL
CPU_MMAP;FLASH;FSM_STATE
CPU_MMAP;FLASH;FSM_STATE;RESERVED12
CPU_MMAP;FLASH;FSM_STATE;CTRLENZ
CPU_MMAP;FLASH;FSM_STATE;EXECUTEZ
CPU_MMAP;FLASH;FSM_STATE;RESERVED9
CPU_MMAP;FLASH;FSM_STATE;FSM_ACT
CPU_MMAP;FLASH;FSM_STATE;TIOTP_ACT
CPU_MMAP;FLASH;FSM_STATE;OTP_ACT
CPU_MMAP;FLASH;FSM_STATE;RESERVED0
CPU_MMAP;FLASH;FSM_STAT
CPU_MMAP;FLASH;FSM_STAT;RESERVED3
CPU_MMAP;FLASH;FSM_STAT;NON_OP
CPU_MMAP;FLASH;FSM_STAT;OVR_PUL_CNT
CPU_MMAP;FLASH;FSM_STAT;INV_DAT
CPU_MMAP;FLASH;FSM_CMD
CPU_MMAP;FLASH;FSM_CMD;RESERVED6
CPU_MMAP;FLASH;FSM_CMD;FSMCMD
CPU_MMAP;FLASH;FSM_PE_OSU
CPU_MMAP;FLASH;FSM_PE_OSU;RESERVED16
CPU_MMAP;FLASH;FSM_PE_OSU;PGM_OSU
CPU_MMAP;FLASH;FSM_PE_OSU;ERA_OSU
CPU_MMAP;FLASH;FSM_VSTAT
CPU_MMAP;FLASH;FSM_VSTAT;RESERVED16
CPU_MMAP;FLASH;FSM_VSTAT;VSTAT_CNT
CPU_MMAP;FLASH;FSM_VSTAT;RESERVED0
CPU_MMAP;FLASH;FSM_PE_VSU
CPU_MMAP;FLASH;FSM_PE_VSU;RESERVED16
CPU_MMAP;FLASH;FSM_PE_VSU;PGM_VSU
CPU_MMAP;FLASH;FSM_PE_VSU;ERA_VSU
CPU_MMAP;FLASH;FSM_CMP_VSU
CPU_MMAP;FLASH;FSM_CMP_VSU;RESERVED16
CPU_MMAP;FLASH;FSM_CMP_VSU;ADD_EXZ
CPU_MMAP;FLASH;FSM_CMP_VSU;RESERVED0
CPU_MMAP;FLASH;FSM_EX_VAL
CPU_MMAP;FLASH;FSM_EX_VAL;RESERVED16
CPU_MMAP;FLASH;FSM_EX_VAL;REP_VSU
CPU_MMAP;FLASH;FSM_EX_VAL;EXE_VALD
CPU_MMAP;FLASH;FSM_RD_H
CPU_MMAP;FLASH;FSM_RD_H;RESERVED8
CPU_MMAP;FLASH;FSM_RD_H;RD_H
CPU_MMAP;FLASH;FSM_P_OH
CPU_MMAP;FLASH;FSM_P_OH;RESERVED16
CPU_MMAP;FLASH;FSM_P_OH;PGM_OH
CPU_MMAP;FLASH;FSM_P_OH;RESERVED0
CPU_MMAP;FLASH;FSM_ERA_OH
CPU_MMAP;FLASH;FSM_ERA_OH;RESERVED16
CPU_MMAP;FLASH;FSM_ERA_OH;ERA_OH
CPU_MMAP;FLASH;FSM_SAV_PPUL
CPU_MMAP;FLASH;FSM_SAV_PPUL;RESERVED12
CPU_MMAP;FLASH;FSM_SAV_PPUL;SAV_P_PUL
CPU_MMAP;FLASH;FSM_PE_VH
CPU_MMAP;FLASH;FSM_PE_VH;RESERVED16
CPU_MMAP;FLASH;FSM_PE_VH;PGM_VH
CPU_MMAP;FLASH;FSM_PE_VH;ERA_VH
CPU_MMAP;FLASH;FSM_PRG_PW
CPU_MMAP;FLASH;FSM_PRG_PW;RESERVED16
CPU_MMAP;FLASH;FSM_PRG_PW;PROG_PUL_WIDTH
CPU_MMAP;FLASH;FSM_ERA_PW
CPU_MMAP;FLASH;FSM_ERA_PW;FSM_ERA_PW
CPU_MMAP;FLASH;FSM_SAV_ERA_PUL
CPU_MMAP;FLASH;FSM_SAV_ERA_PUL;RESERVED12
CPU_MMAP;FLASH;FSM_SAV_ERA_PUL;SAV_ERA_PUL
CPU_MMAP;FLASH;FSM_TIMER
CPU_MMAP;FLASH;FSM_TIMER;FSM_TIMER
CPU_MMAP;FLASH;FSM_MODE
CPU_MMAP;FLASH;FSM_MODE;RESERVED20
CPU_MMAP;FLASH;FSM_MODE;RDV_SUBMODE
CPU_MMAP;FLASH;FSM_MODE;PGM_SUBMODE
CPU_MMAP;FLASH;FSM_MODE;ERA_SUBMODE
CPU_MMAP;FLASH;FSM_MODE;SUBMODE
CPU_MMAP;FLASH;FSM_MODE;SAV_PGM_CMD
CPU_MMAP;FLASH;FSM_MODE;SAV_ERA_MODE
CPU_MMAP;FLASH;FSM_MODE;MODE
CPU_MMAP;FLASH;FSM_MODE;CMD
CPU_MMAP;FLASH;FSM_PGM
CPU_MMAP;FLASH;FSM_PGM;RESERVED26
CPU_MMAP;FLASH;FSM_PGM;PGM_BANK
CPU_MMAP;FLASH;FSM_PGM;PGM_ADDR
CPU_MMAP;FLASH;FSM_ERA
CPU_MMAP;FLASH;FSM_ERA;RESERVED26
CPU_MMAP;FLASH;FSM_ERA;ERA_BANK
CPU_MMAP;FLASH;FSM_ERA;ERA_ADDR
CPU_MMAP;FLASH;FSM_PRG_PUL
CPU_MMAP;FLASH;FSM_PRG_PUL;RESERVED20
CPU_MMAP;FLASH;FSM_PRG_PUL;BEG_EC_LEVEL
CPU_MMAP;FLASH;FSM_PRG_PUL;RESERVED12
CPU_MMAP;FLASH;FSM_PRG_PUL;MAX_PRG_PUL
CPU_MMAP;FLASH;FSM_ERA_PUL
CPU_MMAP;FLASH;FSM_ERA_PUL;RESERVED20
CPU_MMAP;FLASH;FSM_ERA_PUL;MAX_EC_LEVEL
CPU_MMAP;FLASH;FSM_ERA_PUL;RESERVED12
CPU_MMAP;FLASH;FSM_ERA_PUL;MAX_ERA_PUL
CPU_MMAP;FLASH;FSM_STEP_SIZE
CPU_MMAP;FLASH;FSM_STEP_SIZE;RESERVED25
CPU_MMAP;FLASH;FSM_STEP_SIZE;EC_STEP_SIZE
CPU_MMAP;FLASH;FSM_STEP_SIZE;RESERVED0
CPU_MMAP;FLASH;FSM_PUL_CNTR
CPU_MMAP;FLASH;FSM_PUL_CNTR;RESERVED25
CPU_MMAP;FLASH;FSM_PUL_CNTR;CUR_EC_LEVEL
CPU_MMAP;FLASH;FSM_PUL_CNTR;RESERVED12
CPU_MMAP;FLASH;FSM_PUL_CNTR;PUL_CNTR
CPU_MMAP;FLASH;FSM_EC_STEP_HEIGHT
CPU_MMAP;FLASH;FSM_EC_STEP_HEIGHT;RESERVED4
CPU_MMAP;FLASH;FSM_EC_STEP_HEIGHT;EC_STEP_HEIGHT
CPU_MMAP;FLASH;FSM_ST_MACHINE
CPU_MMAP;FLASH;FSM_ST_MACHINE;RESERVED24
CPU_MMAP;FLASH;FSM_ST_MACHINE;DO_PRECOND
CPU_MMAP;FLASH;FSM_ST_MACHINE;FSM_INT_EN
CPU_MMAP;FLASH;FSM_ST_MACHINE;ALL_BANKS
CPU_MMAP;FLASH;FSM_ST_MACHINE;CMPV_ALLOWED
CPU_MMAP;FLASH;FSM_ST_MACHINE;RANDOM
CPU_MMAP;FLASH;FSM_ST_MACHINE;RV_SEC_EN
CPU_MMAP;FLASH;FSM_ST_MACHINE;RV_RES
CPU_MMAP;FLASH;FSM_ST_MACHINE;RV_INT_EN
CPU_MMAP;FLASH;FSM_ST_MACHINE;RESERVED15
CPU_MMAP;FLASH;FSM_ST_MACHINE;ONE_TIME_GOOD
CPU_MMAP;FLASH;FSM_ST_MACHINE;RESERVED13
CPU_MMAP;FLASH;FSM_ST_MACHINE;RESERVED12
CPU_MMAP;FLASH;FSM_ST_MACHINE;DO_REDU_COL
CPU_MMAP;FLASH;FSM_ST_MACHINE;DBG_SHORT_ROW
CPU_MMAP;FLASH;FSM_ST_MACHINE;RESERVED6
CPU_MMAP;FLASH;FSM_ST_MACHINE;PGM_SEC_COF_EN
CPU_MMAP;FLASH;FSM_ST_MACHINE;PREC_STOP_EN
CPU_MMAP;FLASH;FSM_ST_MACHINE;DIS_TST_EN
CPU_MMAP;FLASH;FSM_ST_MACHINE;CMD_EN
CPU_MMAP;FLASH;FSM_ST_MACHINE;INV_DATA
CPU_MMAP;FLASH;FSM_ST_MACHINE;OVERRIDE
CPU_MMAP;FLASH;FSM_FLES
CPU_MMAP;FLASH;FSM_FLES;RESERVED12
CPU_MMAP;FLASH;FSM_FLES;BLK_TIOTP
CPU_MMAP;FLASH;FSM_FLES;BLK_OTP
CPU_MMAP;FLASH;FSM_WR_ENA
CPU_MMAP;FLASH;FSM_WR_ENA;RESERVED3
CPU_MMAP;FLASH;FSM_WR_ENA;WR_ENA
CPU_MMAP;FLASH;FSM_ACC_PP
CPU_MMAP;FLASH;FSM_ACC_PP;FSM_ACC_PP
CPU_MMAP;FLASH;FSM_ACC_EP
CPU_MMAP;FLASH;FSM_ACC_EP;RESERVED16
CPU_MMAP;FLASH;FSM_ACC_EP;ACC_EP
CPU_MMAP;FLASH;FSM_ADDR
CPU_MMAP;FLASH;FSM_ADDR;RESERVED31
CPU_MMAP;FLASH;FSM_ADDR;BANK
CPU_MMAP;FLASH;FSM_ADDR;CUR_ADDR
CPU_MMAP;FLASH;FSM_SECTOR
CPU_MMAP;FLASH;FSM_SECTOR;SECT_ERASED
CPU_MMAP;FLASH;FSM_SECTOR;FSM_SECTOR_EXTENSION
CPU_MMAP;FLASH;FSM_SECTOR;SECTOR
CPU_MMAP;FLASH;FSM_SECTOR;SEC_OUT
CPU_MMAP;FLASH;FMC_REV_ID
CPU_MMAP;FLASH;FMC_REV_ID;MOD_VERSION
CPU_MMAP;FLASH;FMC_REV_ID;CONFIG_CRC
CPU_MMAP;FLASH;FSM_ERR_ADDR
CPU_MMAP;FLASH;FSM_ERR_ADDR;FSM_ERR_ADDR
CPU_MMAP;FLASH;FSM_ERR_ADDR;RESERVED4
CPU_MMAP;FLASH;FSM_ERR_ADDR;FSM_ERR_BANK
CPU_MMAP;FLASH;FSM_PGM_MAXPUL
CPU_MMAP;FLASH;FSM_PGM_MAXPUL;RESERVED12
CPU_MMAP;FLASH;FSM_PGM_MAXPUL;FSM_PGM_MAXPUL
CPU_MMAP;FLASH;FSM_EXECUTE
CPU_MMAP;FLASH;FSM_EXECUTE;RESERVED20
CPU_MMAP;FLASH;FSM_EXECUTE;SUSPEND_NOW
CPU_MMAP;FLASH;FSM_EXECUTE;RESERVED5
CPU_MMAP;FLASH;FSM_EXECUTE;FSMEXECUTE
CPU_MMAP;FLASH;FSM_SECTOR1
CPU_MMAP;FLASH;FSM_SECTOR1;FSM_SECTOR1
CPU_MMAP;FLASH;FSM_SECTOR2
CPU_MMAP;FLASH;FSM_SECTOR2;FSM_SECTOR2
CPU_MMAP;FLASH;FSM_BSLE0
CPU_MMAP;FLASH;FSM_BSLE0;FSM_BSLE0
CPU_MMAP;FLASH;FSM_BSLE1
CPU_MMAP;FLASH;FSM_BSLE1;FSM_BSL1
CPU_MMAP;FLASH;FSM_BSLP0
CPU_MMAP;FLASH;FSM_BSLP0;FSM_BSLP0
CPU_MMAP;FLASH;FSM_BSLP1
CPU_MMAP;FLASH;FSM_BSLP1;FSM_BSL1
CPU_MMAP;FLASH;FCFG_BANK
CPU_MMAP;FLASH;FCFG_BANK;EE_BANK_WIDTH
CPU_MMAP;FLASH;FCFG_BANK;EE_NUM_BANK
CPU_MMAP;FLASH;FCFG_BANK;MAIN_BANK_WIDTH
CPU_MMAP;FLASH;FCFG_BANK;MAIN_NUM_BANK
CPU_MMAP;FLASH;FCFG_WRAPPER
CPU_MMAP;FLASH;FCFG_WRAPPER;FAMILY_TYPE
CPU_MMAP;FLASH;FCFG_WRAPPER;RESERVED21
CPU_MMAP;FLASH;FCFG_WRAPPER;MEM_MAP
CPU_MMAP;FLASH;FCFG_WRAPPER;CPU2
CPU_MMAP;FLASH;FCFG_WRAPPER;EE_IN_MAIN
CPU_MMAP;FLASH;FCFG_WRAPPER;ROM
CPU_MMAP;FLASH;FCFG_WRAPPER;IFLUSH
CPU_MMAP;FLASH;FCFG_WRAPPER;SIL3
CPU_MMAP;FLASH;FCFG_WRAPPER;ECCA
CPU_MMAP;FLASH;FCFG_WRAPPER;AUTO_SUSP
CPU_MMAP;FLASH;FCFG_WRAPPER;UERR
CPU_MMAP;FLASH;FCFG_WRAPPER;CPU_TYPE1
CPU_MMAP;FLASH;FCFG_BNK_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B7_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B6_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B5_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B4_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B3_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B2_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B1_TYPE
CPU_MMAP;FLASH;FCFG_BNK_TYPE;B0_TYPE
CPU_MMAP;FLASH;FCFG_B0_START
CPU_MMAP;FLASH;FCFG_B0_START;B0_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B0_START;B0_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B0_START;B0_START_ADDR
CPU_MMAP;FLASH;FCFG_B1_START
CPU_MMAP;FLASH;FCFG_B1_START;B1_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B1_START;B1_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B1_START;B1_START_ADDR
CPU_MMAP;FLASH;FCFG_B2_START
CPU_MMAP;FLASH;FCFG_B2_START;B2_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B2_START;B2_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B2_START;B2_START_ADDR
CPU_MMAP;FLASH;FCFG_B3_START
CPU_MMAP;FLASH;FCFG_B3_START;B3_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B3_START;B3_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B3_START;B3_START_ADDR
CPU_MMAP;FLASH;FCFG_B4_START
CPU_MMAP;FLASH;FCFG_B4_START;B4_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B4_START;B4_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B4_START;B4_START_ADDR
CPU_MMAP;FLASH;FCFG_B5_START
CPU_MMAP;FLASH;FCFG_B5_START;B5_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B5_START;B5_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B5_START;B5_START_ADDR
CPU_MMAP;FLASH;FCFG_B6_START
CPU_MMAP;FLASH;FCFG_B6_START;B6_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B6_START;B6_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B6_START;B6_START_ADDR
CPU_MMAP;FLASH;FCFG_B7_START
CPU_MMAP;FLASH;FCFG_B7_START;B7_MAX_SECTOR
CPU_MMAP;FLASH;FCFG_B7_START;B7_MUX_FACTOR
CPU_MMAP;FLASH;FCFG_B7_START;B7_START_ADDR
CPU_MMAP;FLASH;FCFG_B0_SSIZE0
CPU_MMAP;FLASH;FCFG_B0_SSIZE0;RESERVED28
CPU_MMAP;FLASH;FCFG_B0_SSIZE0;B0_NUM_SECTORS
CPU_MMAP;FLASH;FCFG_B0_SSIZE0;RESERVED4
CPU_MMAP;FLASH;FCFG_B0_SSIZE0;B0_SECT_SIZE
CPU_MMAP;VIMS
CPU_MMAP;VIMS;STAT
CPU_MMAP;VIMS;STAT;RESERVED6
CPU_MMAP;VIMS;STAT;IDCODE_LB_DIS
CPU_MMAP;VIMS;STAT;SYSBUS_LB_DIS
CPU_MMAP;VIMS;STAT;MODE_CHANGING
CPU_MMAP;VIMS;STAT;INV
CPU_MMAP;VIMS;STAT;MODE
CPU_MMAP;VIMS;STAT;MODE;GPRAM
CPU_MMAP;VIMS;STAT;MODE;CACHE
CPU_MMAP;VIMS;STAT;MODE;SPLIT
CPU_MMAP;VIMS;STAT;MODE;OFF
CPU_MMAP;VIMS;CTL
CPU_MMAP;VIMS;CTL;STATS_CLR
CPU_MMAP;VIMS;CTL;STATS_EN
CPU_MMAP;VIMS;CTL;DYN_CG_EN
CPU_MMAP;VIMS;CTL;RESERVED6
CPU_MMAP;VIMS;CTL;IDCODE_LB_DIS
CPU_MMAP;VIMS;CTL;SYSBUS_LB_DIS
CPU_MMAP;VIMS;CTL;ARB_CFG
CPU_MMAP;VIMS;CTL;PREF_EN
CPU_MMAP;VIMS;CTL;MODE
CPU_MMAP;VIMS;CTL;MODE;GPRAM
CPU_MMAP;VIMS;CTL;MODE;CACHE
CPU_MMAP;VIMS;CTL;MODE;SPLIT
CPU_MMAP;VIMS;CTL;MODE;OFF
CPU_MMAP;VIMS;STATS0
CPU_MMAP;VIMS;STATS0;HIT
CPU_MMAP;VIMS;STATS1
CPU_MMAP;VIMS;STATS1;MISS
CPU_MMAP;VIMS;STATS2
CPU_MMAP;VIMS;STATS2;LB_HIT
CPU_MMAP;VIMS;STATS3
CPU_MMAP;VIMS;STATS3;PREF_HIT
CPU_MMAP;VIMS;STATS4
CPU_MMAP;VIMS;STATS4;ICODE_STALL
CPU_MMAP;VIMS;STATS5
CPU_MMAP;VIMS;STATS5;DCODE_STALL
CPU_MMAP;RFC_PWR
CPU_MMAP;RFC_PWR;PWMCLKEN
CPU_MMAP;RFC_PWR;PWMCLKEN;RESERVED11
CPU_MMAP;RFC_PWR;PWMCLKEN;RFCTRC
CPU_MMAP;RFC_PWR;PWMCLKEN;FSCA
CPU_MMAP;RFC_PWR;PWMCLKEN;PHA
CPU_MMAP;RFC_PWR;PWMCLKEN;RAT
CPU_MMAP;RFC_PWR;PWMCLKEN;RFERAM
CPU_MMAP;RFC_PWR;PWMCLKEN;RFE
CPU_MMAP;RFC_PWR;PWMCLKEN;MDMRAM
CPU_MMAP;RFC_PWR;PWMCLKEN;MDM
CPU_MMAP;RFC_PWR;PWMCLKEN;CPERAM
CPU_MMAP;RFC_PWR;PWMCLKEN;CPE
CPU_MMAP;RFC_PWR;PWMCLKEN;RFC
CPU_MMAP;RFC_DBELL
CPU_MMAP;RFC_DBELL;CMDR
CPU_MMAP;RFC_DBELL;CMDR;CMD
CPU_MMAP;RFC_DBELL;CMDSTA
CPU_MMAP;RFC_DBELL;CMDSTA;STAT
CPU_MMAP;RFC_DBELL;RFHWIFG
CPU_MMAP;RFC_DBELL;RFHWIFG;RESERVED20
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH7
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH6
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH5
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH4
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH3
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH2
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH1
CPU_MMAP;RFC_DBELL;RFHWIFG;RATCH0
CPU_MMAP;RFC_DBELL;RFHWIFG;RFESOFT2
CPU_MMAP;RFC_DBELL;RFHWIFG;RFESOFT1
CPU_MMAP;RFC_DBELL;RFHWIFG;RFESOFT0
CPU_MMAP;RFC_DBELL;RFHWIFG;RFEDONE
CPU_MMAP;RFC_DBELL;RFHWIFG;RESERVED7
CPU_MMAP;RFC_DBELL;RFHWIFG;TRCTK
CPU_MMAP;RFC_DBELL;RFHWIFG;MDMSOFT
CPU_MMAP;RFC_DBELL;RFHWIFG;MDMOUT
CPU_MMAP;RFC_DBELL;RFHWIFG;MDMIN
CPU_MMAP;RFC_DBELL;RFHWIFG;MDMDONE
CPU_MMAP;RFC_DBELL;RFHWIFG;FSCA
CPU_MMAP;RFC_DBELL;RFHWIFG;RESERVED0
CPU_MMAP;RFC_DBELL;RFHWIEN
CPU_MMAP;RFC_DBELL;RFHWIEN;RESERVED20
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH7
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH6
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH5
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH4
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH3
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH2
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH1
CPU_MMAP;RFC_DBELL;RFHWIEN;RATCH0
CPU_MMAP;RFC_DBELL;RFHWIEN;RFESOFT2
CPU_MMAP;RFC_DBELL;RFHWIEN;RFESOFT1
CPU_MMAP;RFC_DBELL;RFHWIEN;RFESOFT0
CPU_MMAP;RFC_DBELL;RFHWIEN;RFEDONE
CPU_MMAP;RFC_DBELL;RFHWIEN;RESERVED7
CPU_MMAP;RFC_DBELL;RFHWIEN;TRCTK
CPU_MMAP;RFC_DBELL;RFHWIEN;MDMSOFT
CPU_MMAP;RFC_DBELL;RFHWIEN;MDMOUT
CPU_MMAP;RFC_DBELL;RFHWIEN;MDMIN
CPU_MMAP;RFC_DBELL;RFHWIEN;MDMDONE
CPU_MMAP;RFC_DBELL;RFHWIEN;FSCA
CPU_MMAP;RFC_DBELL;RFHWIEN;RESERVED0
CPU_MMAP;RFC_DBELL;RFCPEIFG
CPU_MMAP;RFC_DBELL;RFCPEIFG;INTERNAL_ERROR
CPU_MMAP;RFC_DBELL;RFCPEIFG;BOOT_DONE
CPU_MMAP;RFC_DBELL;RFCPEIFG;MODULES_UNLOCKED
CPU_MMAP;RFC_DBELL;RFCPEIFG;SYNTH_NO_LOCK
CPU_MMAP;RFC_DBELL;RFCPEIFG;IRQ27
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_ABORTED
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_N_DATA_WRITTEN
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_DATA_WRITTEN
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_ENTRY_DONE
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_BUF_FULL
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_CTRL_ACK
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_CTRL
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_EMPTY
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_IGNORED
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_NOK
CPU_MMAP;RFC_DBELL;RFCPEIFG;RX_OK
CPU_MMAP;RFC_DBELL;RFCPEIFG;IRQ15
CPU_MMAP;RFC_DBELL;RFCPEIFG;IRQ14
CPU_MMAP;RFC_DBELL;RFCPEIFG;IRQ13
CPU_MMAP;RFC_DBELL;RFCPEIFG;BG_COMMAND_SUSPENDED
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_BUFFER_CHANGED
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_ENTRY_DONE
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_RETRANS
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_CTRL_ACK_ACK
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_CTRL_ACK
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_CTRL
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_ACK
CPU_MMAP;RFC_DBELL;RFCPEIFG;TX_DONE
CPU_MMAP;RFC_DBELL;RFCPEIFG;LAST_FG_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEIFG;FG_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEIFG;LAST_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEIFG;COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN
CPU_MMAP;RFC_DBELL;RFCPEIEN;INTERNAL_ERROR
CPU_MMAP;RFC_DBELL;RFCPEIEN;BOOT_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN;MODULES_UNLOCKED
CPU_MMAP;RFC_DBELL;RFCPEIEN;SYNTH_NO_LOCK
CPU_MMAP;RFC_DBELL;RFCPEIEN;IRQ27
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_ABORTED
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_N_DATA_WRITTEN
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_DATA_WRITTEN
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_ENTRY_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_BUF_FULL
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_CTRL_ACK
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_CTRL
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_EMPTY
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_IGNORED
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_NOK
CPU_MMAP;RFC_DBELL;RFCPEIEN;RX_OK
CPU_MMAP;RFC_DBELL;RFCPEIEN;IRQ15
CPU_MMAP;RFC_DBELL;RFCPEIEN;IRQ14
CPU_MMAP;RFC_DBELL;RFCPEIEN;IRQ13
CPU_MMAP;RFC_DBELL;RFCPEIEN;BG_COMMAND_SUSPENDED
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_BUFFER_CHANGED
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_ENTRY_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_RETRANS
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_CTRL_ACK_ACK
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_CTRL_ACK
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_CTRL
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_ACK
CPU_MMAP;RFC_DBELL;RFCPEIEN;TX_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN;LAST_FG_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN;FG_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN;LAST_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEIEN;COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL
CPU_MMAP;RFC_DBELL;RFCPEISL;INTERNAL_ERROR
CPU_MMAP;RFC_DBELL;RFCPEISL;INTERNAL_ERROR;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;INTERNAL_ERROR;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;BOOT_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;BOOT_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;BOOT_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;MODULES_UNLOCKED
CPU_MMAP;RFC_DBELL;RFCPEISL;MODULES_UNLOCKED;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;MODULES_UNLOCKED;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;SYNTH_NO_LOCK
CPU_MMAP;RFC_DBELL;RFCPEISL;SYNTH_NO_LOCK;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;SYNTH_NO_LOCK;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ27
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ27;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ27;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_ABORTED
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_ABORTED;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_ABORTED;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_N_DATA_WRITTEN
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_N_DATA_WRITTEN;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_N_DATA_WRITTEN;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_DATA_WRITTEN
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_DATA_WRITTEN;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_DATA_WRITTEN;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_ENTRY_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_ENTRY_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_ENTRY_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_BUF_FULL
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_BUF_FULL;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_BUF_FULL;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_CTRL_ACK
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_CTRL_ACK;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_CTRL_ACK;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_CTRL
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_CTRL;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_CTRL;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_EMPTY
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_EMPTY;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_EMPTY;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_IGNORED
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_IGNORED;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_IGNORED;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_NOK
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_NOK;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_NOK;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_OK
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_OK;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;RX_OK;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ15
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ15;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ15;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ14
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ14;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ14;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ13
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ13;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;IRQ13;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;BG_COMMAND_SUSPENDED
CPU_MMAP;RFC_DBELL;RFCPEISL;BG_COMMAND_SUSPENDED;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;BG_COMMAND_SUSPENDED;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_BUFFER_CHANGED
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_BUFFER_CHANGED;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_BUFFER_CHANGED;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_ENTRY_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_ENTRY_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_ENTRY_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_RETRANS
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_RETRANS;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_RETRANS;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL_ACK_ACK
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL_ACK_ACK;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL_ACK_ACK;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL_ACK
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL_ACK;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL_ACK;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_CTRL;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_ACK
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_ACK;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_ACK;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;TX_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;LAST_FG_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;LAST_FG_COMMAND_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;LAST_FG_COMMAND_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;FG_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;FG_COMMAND_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;FG_COMMAND_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;LAST_COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;LAST_COMMAND_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;LAST_COMMAND_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFCPEISL;COMMAND_DONE
CPU_MMAP;RFC_DBELL;RFCPEISL;COMMAND_DONE;CPE0
CPU_MMAP;RFC_DBELL;RFCPEISL;COMMAND_DONE;CPE1
CPU_MMAP;RFC_DBELL;RFACKIFG
CPU_MMAP;RFC_DBELL;RFACKIFG;RESERVED1
CPU_MMAP;RFC_DBELL;RFACKIFG;ACKFLAG
CPU_MMAP;RFC_DBELL;SYSGPOCTL
CPU_MMAP;RFC_DBELL;SYSGPOCTL;RESERVED16
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;CPEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;CPEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;CPEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;CPEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;MCEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;MCEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;MCEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;MCEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RFEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RFEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RFEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RFEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RATGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RATGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RATGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL3;RATGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;CPEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;CPEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;CPEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;CPEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;MCEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;MCEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;MCEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;MCEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RFEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RFEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RFEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RFEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RATGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RATGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RATGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL2;RATGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;CPEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;CPEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;CPEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;CPEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;MCEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;MCEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;MCEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;MCEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RFEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RFEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RFEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RFEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RATGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RATGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RATGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL1;RATGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;CPEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;CPEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;CPEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;CPEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;MCEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;MCEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;MCEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;MCEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RFEGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RFEGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RFEGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RFEGPO3
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RATGPO0
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RATGPO1
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RATGPO2
CPU_MMAP;RFC_DBELL;SYSGPOCTL;GPOCTL0;RATGPO3
CPU_MMAP;RFC_PHA
CPU_MMAP;RFC_PHA;PHAPOLY0
CPU_MMAP;RFC_PHA;PHAPOLY0;POLY0
CPU_MMAP;RFC_PHA;PHAPOLY1
CPU_MMAP;RFC_PHA;PHAPOLY1;POLY1
CPU_MMAP;RFC_PHA;PHACFG
CPU_MMAP;RFC_PHA;PHACFG;RESERVED3
CPU_MMAP;RFC_PHA;PHACFG;MODE1
CPU_MMAP;RFC_PHA;PHACFG;MODE1;INDEP
CPU_MMAP;RFC_PHA;PHACFG;MODE1;CASC
CPU_MMAP;RFC_PHA;PHACFG;MODE1;PARAL
CPU_MMAP;RFC_PHA;PHACFG;MODE0
CPU_MMAP;RFC_PHA;PHACFG;MODE0;CRC
CPU_MMAP;RFC_PHA;PHACFG;MODE0;WHITE
CPU_MMAP;RFC_PHA;PHASTA
CPU_MMAP;RFC_PHA;PHASTA;RESERVED2
CPU_MMAP;RFC_PHA;PHASTA;BUSY
CPU_MMAP;RFC_PHA;PHASTA;BUSY;IDLE
CPU_MMAP;RFC_PHA;PHASTA;BUSY;BUSY
CPU_MMAP;RFC_PHA;PHALFSR0VAL
CPU_MMAP;RFC_PHA;PHALFSR0VAL;LFSR0VAL
CPU_MMAP;RFC_PHA;PHALFSR1VAL
CPU_MMAP;RFC_PHA;PHALFSR1VAL;LFSR1VAL
CPU_MMAP;RFC_PHA;PHALFSR0VALBR
CPU_MMAP;RFC_PHA;PHALFSR0VALBR;LFSR0VAL
CPU_MMAP;RFC_PHA;PHALFSR1VALBR
CPU_MMAP;RFC_PHA;PHALFSR1VALBR;LFSR1VAL
CPU_MMAP;RFC_PHA;PHAOUT0
CPU_MMAP;RFC_PHA;PHAOUT0;OUT0
CPU_MMAP;RFC_PHA;PHAOUT0BR
CPU_MMAP;RFC_PHA;PHAOUT0BR;OUT0
CPU_MMAP;RFC_PHA;PHAHAMENCIN
CPU_MMAP;RFC_PHA;PHAHAMENCIN;RESERVED8
CPU_MMAP;RFC_PHA;PHAHAMENCIN;HAMENCIN1
CPU_MMAP;RFC_PHA;PHAHAMENCIN;HAMENCIN0
CPU_MMAP;RFC_PHA;PHAHAMENCOUT
CPU_MMAP;RFC_PHA;PHAHAMENCOUT;RESERVED16
CPU_MMAP;RFC_PHA;PHAHAMENCOUT;HAMENCOUT1
CPU_MMAP;RFC_PHA;PHAHAMENCOUT;HAMENCOUT0
CPU_MMAP;RFC_PHA;PHAHAMDECIN
CPU_MMAP;RFC_PHA;PHAHAMDECIN;RESERVED16
CPU_MMAP;RFC_PHA;PHAHAMDECIN;HAMDECIN1
CPU_MMAP;RFC_PHA;PHAHAMDECIN;HAMDECIN0
CPU_MMAP;RFC_PHA;PHAHAMDECOUT
CPU_MMAP;RFC_PHA;PHAHAMDECOUT;RESERVED10
CPU_MMAP;RFC_PHA;PHAHAMDECOUT;HAMERR1
CPU_MMAP;RFC_PHA;PHAHAMDECOUT;HAMERR0
CPU_MMAP;RFC_PHA;PHAHAMDECOUT;HAMDECOUT1
CPU_MMAP;RFC_PHA;PHAHAMDECOUT;HAMDECOUT0
CPU_MMAP;RFC_PHA;PHALFSR0INL1
CPU_MMAP;RFC_PHA;PHALFSR0INL1;RESERVED1
CPU_MMAP;RFC_PHA;PHALFSR0INL1;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL2
CPU_MMAP;RFC_PHA;PHALFSR0INL2;RESERVED2
CPU_MMAP;RFC_PHA;PHALFSR0INL2;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL3
CPU_MMAP;RFC_PHA;PHALFSR0INL3;RESERVED3
CPU_MMAP;RFC_PHA;PHALFSR0INL3;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL4
CPU_MMAP;RFC_PHA;PHALFSR0INL4;RESERVED4
CPU_MMAP;RFC_PHA;PHALFSR0INL4;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL5
CPU_MMAP;RFC_PHA;PHALFSR0INL5;RESERVED5
CPU_MMAP;RFC_PHA;PHALFSR0INL5;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL6
CPU_MMAP;RFC_PHA;PHALFSR0INL6;RESERVED6
CPU_MMAP;RFC_PHA;PHALFSR0INL6;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL7
CPU_MMAP;RFC_PHA;PHALFSR0INL7;RESERVED7
CPU_MMAP;RFC_PHA;PHALFSR0INL7;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL8
CPU_MMAP;RFC_PHA;PHALFSR0INL8;RESERVED8
CPU_MMAP;RFC_PHA;PHALFSR0INL8;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL9
CPU_MMAP;RFC_PHA;PHALFSR0INL9;RESERVED9
CPU_MMAP;RFC_PHA;PHALFSR0INL9;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL10
CPU_MMAP;RFC_PHA;PHALFSR0INL10;RESERVED10
CPU_MMAP;RFC_PHA;PHALFSR0INL10;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL11
CPU_MMAP;RFC_PHA;PHALFSR0INL11;RESERVED11
CPU_MMAP;RFC_PHA;PHALFSR0INL11;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL12
CPU_MMAP;RFC_PHA;PHALFSR0INL12;RESERVED12
CPU_MMAP;RFC_PHA;PHALFSR0INL12;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL13
CPU_MMAP;RFC_PHA;PHALFSR0INL13;RESERVED13
CPU_MMAP;RFC_PHA;PHALFSR0INL13;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL14
CPU_MMAP;RFC_PHA;PHALFSR0INL14;RESERVED14
CPU_MMAP;RFC_PHA;PHALFSR0INL14;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL15
CPU_MMAP;RFC_PHA;PHALFSR0INL15;RESERVED15
CPU_MMAP;RFC_PHA;PHALFSR0INL15;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL16
CPU_MMAP;RFC_PHA;PHALFSR0INL16;RESERVED16
CPU_MMAP;RFC_PHA;PHALFSR0INL16;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL17
CPU_MMAP;RFC_PHA;PHALFSR0INL17;RESERVED17
CPU_MMAP;RFC_PHA;PHALFSR0INL17;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL18
CPU_MMAP;RFC_PHA;PHALFSR0INL18;RESERVED18
CPU_MMAP;RFC_PHA;PHALFSR0INL18;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL19
CPU_MMAP;RFC_PHA;PHALFSR0INL19;RESERVED19
CPU_MMAP;RFC_PHA;PHALFSR0INL19;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL20
CPU_MMAP;RFC_PHA;PHALFSR0INL20;RESERVED20
CPU_MMAP;RFC_PHA;PHALFSR0INL20;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL21
CPU_MMAP;RFC_PHA;PHALFSR0INL21;RESERVED21
CPU_MMAP;RFC_PHA;PHALFSR0INL21;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL22
CPU_MMAP;RFC_PHA;PHALFSR0INL22;RESERVED22
CPU_MMAP;RFC_PHA;PHALFSR0INL22;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL23
CPU_MMAP;RFC_PHA;PHALFSR0INL23;RESERVED23
CPU_MMAP;RFC_PHA;PHALFSR0INL23;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL24
CPU_MMAP;RFC_PHA;PHALFSR0INL24;RESERVED24
CPU_MMAP;RFC_PHA;PHALFSR0INL24;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL25
CPU_MMAP;RFC_PHA;PHALFSR0INL25;RESERVED25
CPU_MMAP;RFC_PHA;PHALFSR0INL25;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL26
CPU_MMAP;RFC_PHA;PHALFSR0INL26;RESERVED26
CPU_MMAP;RFC_PHA;PHALFSR0INL26;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL27
CPU_MMAP;RFC_PHA;PHALFSR0INL27;RESERVED27
CPU_MMAP;RFC_PHA;PHALFSR0INL27;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL28
CPU_MMAP;RFC_PHA;PHALFSR0INL28;RESERVED28
CPU_MMAP;RFC_PHA;PHALFSR0INL28;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL29
CPU_MMAP;RFC_PHA;PHALFSR0INL29;RESERVED29
CPU_MMAP;RFC_PHA;PHALFSR0INL29;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL30
CPU_MMAP;RFC_PHA;PHALFSR0INL30;RESERVED30
CPU_MMAP;RFC_PHA;PHALFSR0INL30;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL31
CPU_MMAP;RFC_PHA;PHALFSR0INL31;RESERVED31
CPU_MMAP;RFC_PHA;PHALFSR0INL31;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INL32
CPU_MMAP;RFC_PHA;PHALFSR0INL32;LFSR0IN
CPU_MMAP;RFC_PHA;PHALFSR0INM1
CPU_MMAP;RFC_PHA;PHALFSR0INM1;RESERVED1
CPU_MMAP;RFC_PHA;PHALFSR0INM1;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM2
CPU_MMAP;RFC_PHA;PHALFSR0INM2;RESERVED2
CPU_MMAP;RFC_PHA;PHALFSR0INM2;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM3
CPU_MMAP;RFC_PHA;PHALFSR0INM3;RESERVED3
CPU_MMAP;RFC_PHA;PHALFSR0INM3;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM4
CPU_MMAP;RFC_PHA;PHALFSR0INM4;RESERVED4
CPU_MMAP;RFC_PHA;PHALFSR0INM4;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM5
CPU_MMAP;RFC_PHA;PHALFSR0INM5;RESERVED5
CPU_MMAP;RFC_PHA;PHALFSR0INM5;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM6
CPU_MMAP;RFC_PHA;PHALFSR0INM6;RESERVED6
CPU_MMAP;RFC_PHA;PHALFSR0INM6;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM7
CPU_MMAP;RFC_PHA;PHALFSR0INM7;RESERVED7
CPU_MMAP;RFC_PHA;PHALFSR0INM7;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM8
CPU_MMAP;RFC_PHA;PHALFSR0INM8;RESERVED8
CPU_MMAP;RFC_PHA;PHALFSR0INM8;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM9
CPU_MMAP;RFC_PHA;PHALFSR0INM9;RESERVED9
CPU_MMAP;RFC_PHA;PHALFSR0INM9;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM10
CPU_MMAP;RFC_PHA;PHALFSR0INM10;RESERVED10
CPU_MMAP;RFC_PHA;PHALFSR0INM10;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM11
CPU_MMAP;RFC_PHA;PHALFSR0INM11;RESERVED11
CPU_MMAP;RFC_PHA;PHALFSR0INM11;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM12
CPU_MMAP;RFC_PHA;PHALFSR0INM12;RESERVED12
CPU_MMAP;RFC_PHA;PHALFSR0INM12;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM13
CPU_MMAP;RFC_PHA;PHALFSR0INM13;RESERVED13
CPU_MMAP;RFC_PHA;PHALFSR0INM13;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM14
CPU_MMAP;RFC_PHA;PHALFSR0INM14;RESERVED14
CPU_MMAP;RFC_PHA;PHALFSR0INM14;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM15
CPU_MMAP;RFC_PHA;PHALFSR0INM15;RESERVED15
CPU_MMAP;RFC_PHA;PHALFSR0INM15;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM16
CPU_MMAP;RFC_PHA;PHALFSR0INM16;RESERVED16
CPU_MMAP;RFC_PHA;PHALFSR0INM16;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM17
CPU_MMAP;RFC_PHA;PHALFSR0INM17;RESERVED17
CPU_MMAP;RFC_PHA;PHALFSR0INM17;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM18
CPU_MMAP;RFC_PHA;PHALFSR0INM18;RESERVED18
CPU_MMAP;RFC_PHA;PHALFSR0INM18;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM19
CPU_MMAP;RFC_PHA;PHALFSR0INM19;RESERVED19
CPU_MMAP;RFC_PHA;PHALFSR0INM19;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM20
CPU_MMAP;RFC_PHA;PHALFSR0INM20;RESERVED20
CPU_MMAP;RFC_PHA;PHALFSR0INM20;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM21
CPU_MMAP;RFC_PHA;PHALFSR0INM21;RESERVED21
CPU_MMAP;RFC_PHA;PHALFSR0INM21;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM22
CPU_MMAP;RFC_PHA;PHALFSR0INM22;RESERVED22
CPU_MMAP;RFC_PHA;PHALFSR0INM22;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM23
CPU_MMAP;RFC_PHA;PHALFSR0INM23;RESERVED23
CPU_MMAP;RFC_PHA;PHALFSR0INM23;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM24
CPU_MMAP;RFC_PHA;PHALFSR0INM24;RESERVED24
CPU_MMAP;RFC_PHA;PHALFSR0INM24;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM25
CPU_MMAP;RFC_PHA;PHALFSR0INM25;RESERVED25
CPU_MMAP;RFC_PHA;PHALFSR0INM25;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM26
CPU_MMAP;RFC_PHA;PHALFSR0INM26;RESERVED26
CPU_MMAP;RFC_PHA;PHALFSR0INM26;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM27
CPU_MMAP;RFC_PHA;PHALFSR0INM27;RESERVED27
CPU_MMAP;RFC_PHA;PHALFSR0INM27;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM28
CPU_MMAP;RFC_PHA;PHALFSR0INM28;RESERVED28
CPU_MMAP;RFC_PHA;PHALFSR0INM28;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM29
CPU_MMAP;RFC_PHA;PHALFSR0INM29;RESERVED29
CPU_MMAP;RFC_PHA;PHALFSR0INM29;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM30
CPU_MMAP;RFC_PHA;PHALFSR0INM30;RESERVED30
CPU_MMAP;RFC_PHA;PHALFSR0INM30;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM31
CPU_MMAP;RFC_PHA;PHALFSR0INM31;RESERVED31
CPU_MMAP;RFC_PHA;PHALFSR0INM31;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR0INM32
CPU_MMAP;RFC_PHA;PHALFSR0INM32;LFSR0INR
CPU_MMAP;RFC_PHA;PHALFSR1INL1
CPU_MMAP;RFC_PHA;PHALFSR1INL1;RESERVED1
CPU_MMAP;RFC_PHA;PHALFSR1INL1;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL2
CPU_MMAP;RFC_PHA;PHALFSR1INL2;RESERVED2
CPU_MMAP;RFC_PHA;PHALFSR1INL2;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL3
CPU_MMAP;RFC_PHA;PHALFSR1INL3;RESERVED3
CPU_MMAP;RFC_PHA;PHALFSR1INL3;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL4
CPU_MMAP;RFC_PHA;PHALFSR1INL4;RESERVED4
CPU_MMAP;RFC_PHA;PHALFSR1INL4;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL5
CPU_MMAP;RFC_PHA;PHALFSR1INL5;RESERVED5
CPU_MMAP;RFC_PHA;PHALFSR1INL5;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL6
CPU_MMAP;RFC_PHA;PHALFSR1INL6;RESERVED6
CPU_MMAP;RFC_PHA;PHALFSR1INL6;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL7
CPU_MMAP;RFC_PHA;PHALFSR1INL7;RESERVED7
CPU_MMAP;RFC_PHA;PHALFSR1INL7;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL8
CPU_MMAP;RFC_PHA;PHALFSR1INL8;RESERVED8
CPU_MMAP;RFC_PHA;PHALFSR1INL8;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL9
CPU_MMAP;RFC_PHA;PHALFSR1INL9;RESERVED9
CPU_MMAP;RFC_PHA;PHALFSR1INL9;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL10
CPU_MMAP;RFC_PHA;PHALFSR1INL10;RESERVED10
CPU_MMAP;RFC_PHA;PHALFSR1INL10;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL11
CPU_MMAP;RFC_PHA;PHALFSR1INL11;RESERVED11
CPU_MMAP;RFC_PHA;PHALFSR1INL11;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL12
CPU_MMAP;RFC_PHA;PHALFSR1INL12;RESERVED12
CPU_MMAP;RFC_PHA;PHALFSR1INL12;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL13
CPU_MMAP;RFC_PHA;PHALFSR1INL13;RESERVED13
CPU_MMAP;RFC_PHA;PHALFSR1INL13;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL14
CPU_MMAP;RFC_PHA;PHALFSR1INL14;RESERVED14
CPU_MMAP;RFC_PHA;PHALFSR1INL14;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL15
CPU_MMAP;RFC_PHA;PHALFSR1INL15;RESERVED15
CPU_MMAP;RFC_PHA;PHALFSR1INL15;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL16
CPU_MMAP;RFC_PHA;PHALFSR1INL16;RESERVED16
CPU_MMAP;RFC_PHA;PHALFSR1INL16;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL17
CPU_MMAP;RFC_PHA;PHALFSR1INL17;RESERVED17
CPU_MMAP;RFC_PHA;PHALFSR1INL17;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL18
CPU_MMAP;RFC_PHA;PHALFSR1INL18;RESERVED18
CPU_MMAP;RFC_PHA;PHALFSR1INL18;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL19
CPU_MMAP;RFC_PHA;PHALFSR1INL19;RESERVED19
CPU_MMAP;RFC_PHA;PHALFSR1INL19;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL20
CPU_MMAP;RFC_PHA;PHALFSR1INL20;RESERVED20
CPU_MMAP;RFC_PHA;PHALFSR1INL20;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL21
CPU_MMAP;RFC_PHA;PHALFSR1INL21;RESERVED21
CPU_MMAP;RFC_PHA;PHALFSR1INL21;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL22
CPU_MMAP;RFC_PHA;PHALFSR1INL22;RESERVED22
CPU_MMAP;RFC_PHA;PHALFSR1INL22;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL23
CPU_MMAP;RFC_PHA;PHALFSR1INL23;RESERVED23
CPU_MMAP;RFC_PHA;PHALFSR1INL23;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL24
CPU_MMAP;RFC_PHA;PHALFSR1INL24;RESERVED24
CPU_MMAP;RFC_PHA;PHALFSR1INL24;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL25
CPU_MMAP;RFC_PHA;PHALFSR1INL25;RESERVED25
CPU_MMAP;RFC_PHA;PHALFSR1INL25;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL26
CPU_MMAP;RFC_PHA;PHALFSR1INL26;RESERVED26
CPU_MMAP;RFC_PHA;PHALFSR1INL26;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL27
CPU_MMAP;RFC_PHA;PHALFSR1INL27;RESERVED27
CPU_MMAP;RFC_PHA;PHALFSR1INL27;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL28
CPU_MMAP;RFC_PHA;PHALFSR1INL28;RESERVED28
CPU_MMAP;RFC_PHA;PHALFSR1INL28;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL29
CPU_MMAP;RFC_PHA;PHALFSR1INL29;RESERVED29
CPU_MMAP;RFC_PHA;PHALFSR1INL29;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL30
CPU_MMAP;RFC_PHA;PHALFSR1INL30;RESERVED30
CPU_MMAP;RFC_PHA;PHALFSR1INL30;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL31
CPU_MMAP;RFC_PHA;PHALFSR1INL31;RESERVED31
CPU_MMAP;RFC_PHA;PHALFSR1INL31;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INL32
CPU_MMAP;RFC_PHA;PHALFSR1INL32;LFSR1IN
CPU_MMAP;RFC_PHA;PHALFSR1INM1
CPU_MMAP;RFC_PHA;PHALFSR1INM1;RESERVED1
CPU_MMAP;RFC_PHA;PHALFSR1INM1;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM2
CPU_MMAP;RFC_PHA;PHALFSR1INM2;RESERVED2
CPU_MMAP;RFC_PHA;PHALFSR1INM2;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM3
CPU_MMAP;RFC_PHA;PHALFSR1INM3;RESERVED3
CPU_MMAP;RFC_PHA;PHALFSR1INM3;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM4
CPU_MMAP;RFC_PHA;PHALFSR1INM4;RESERVED4
CPU_MMAP;RFC_PHA;PHALFSR1INM4;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM5
CPU_MMAP;RFC_PHA;PHALFSR1INM5;RESERVED5
CPU_MMAP;RFC_PHA;PHALFSR1INM5;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM6
CPU_MMAP;RFC_PHA;PHALFSR1INM6;RESERVED6
CPU_MMAP;RFC_PHA;PHALFSR1INM6;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM7
CPU_MMAP;RFC_PHA;PHALFSR1INM7;RESERVED7
CPU_MMAP;RFC_PHA;PHALFSR1INM7;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM8
CPU_MMAP;RFC_PHA;PHALFSR1INM8;RESERVED8
CPU_MMAP;RFC_PHA;PHALFSR1INM8;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM9
CPU_MMAP;RFC_PHA;PHALFSR1INM9;RESERVED9
CPU_MMAP;RFC_PHA;PHALFSR1INM9;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM10
CPU_MMAP;RFC_PHA;PHALFSR1INM10;RESERVED10
CPU_MMAP;RFC_PHA;PHALFSR1INM10;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM11
CPU_MMAP;RFC_PHA;PHALFSR1INM11;RESERVED11
CPU_MMAP;RFC_PHA;PHALFSR1INM11;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM12
CPU_MMAP;RFC_PHA;PHALFSR1INM12;RESERVED12
CPU_MMAP;RFC_PHA;PHALFSR1INM12;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM13
CPU_MMAP;RFC_PHA;PHALFSR1INM13;RESERVED13
CPU_MMAP;RFC_PHA;PHALFSR1INM13;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM14
CPU_MMAP;RFC_PHA;PHALFSR1INM14;RESERVED14
CPU_MMAP;RFC_PHA;PHALFSR1INM14;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM15
CPU_MMAP;RFC_PHA;PHALFSR1INM15;RESERVED15
CPU_MMAP;RFC_PHA;PHALFSR1INM15;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM16
CPU_MMAP;RFC_PHA;PHALFSR1INM16;RESERVED16
CPU_MMAP;RFC_PHA;PHALFSR1INM16;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM17
CPU_MMAP;RFC_PHA;PHALFSR1INM17;RESERVED17
CPU_MMAP;RFC_PHA;PHALFSR1INM17;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM18
CPU_MMAP;RFC_PHA;PHALFSR1INM18;RESERVED18
CPU_MMAP;RFC_PHA;PHALFSR1INM18;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM19
CPU_MMAP;RFC_PHA;PHALFSR1INM19;RESERVED19
CPU_MMAP;RFC_PHA;PHALFSR1INM19;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM20
CPU_MMAP;RFC_PHA;PHALFSR1INM20;RESERVED20
CPU_MMAP;RFC_PHA;PHALFSR1INM20;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM21
CPU_MMAP;RFC_PHA;PHALFSR1INM21;RESERVED21
CPU_MMAP;RFC_PHA;PHALFSR1INM21;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM22
CPU_MMAP;RFC_PHA;PHALFSR1INM22;RESERVED22
CPU_MMAP;RFC_PHA;PHALFSR1INM22;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM23
CPU_MMAP;RFC_PHA;PHALFSR1INM23;RESERVED23
CPU_MMAP;RFC_PHA;PHALFSR1INM23;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM24
CPU_MMAP;RFC_PHA;PHALFSR1INM24;RESERVED24
CPU_MMAP;RFC_PHA;PHALFSR1INM24;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM25
CPU_MMAP;RFC_PHA;PHALFSR1INM25;RESERVED25
CPU_MMAP;RFC_PHA;PHALFSR1INM25;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM26
CPU_MMAP;RFC_PHA;PHALFSR1INM26;RESERVED26
CPU_MMAP;RFC_PHA;PHALFSR1INM26;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM27
CPU_MMAP;RFC_PHA;PHALFSR1INM27;RESERVED27
CPU_MMAP;RFC_PHA;PHALFSR1INM27;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM28
CPU_MMAP;RFC_PHA;PHALFSR1INM28;RESERVED28
CPU_MMAP;RFC_PHA;PHALFSR1INM28;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM29
CPU_MMAP;RFC_PHA;PHALFSR1INM29;RESERVED29
CPU_MMAP;RFC_PHA;PHALFSR1INM29;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM30
CPU_MMAP;RFC_PHA;PHALFSR1INM30;RESERVED30
CPU_MMAP;RFC_PHA;PHALFSR1INM30;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM31
CPU_MMAP;RFC_PHA;PHALFSR1INM31;RESERVED31
CPU_MMAP;RFC_PHA;PHALFSR1INM31;LFSR1INR
CPU_MMAP;RFC_PHA;PHALFSR1INM32
CPU_MMAP;RFC_PHA;PHALFSR1INM32;LFSR1INR
CPU_MMAP;RFC_RAT
CPU_MMAP;RFC_RAT;RATCNT
CPU_MMAP;RFC_RAT;RATCNT;CNT
CPU_MMAP;RFC_FSCA
CPU_MMAP;RFC_FSCA;SYNTHREG00
CPU_MMAP;RFC_FSCA;SYNTHREG00;SYNTH_TX_RX_Z
CPU_MMAP;RFC_FSCA;SYNTHREG00;SYNTH_TX_RX_Z;RX
CPU_MMAP;RFC_FSCA;SYNTHREG00;SYNTH_TX_RX_Z;TX
CPU_MMAP;RFC_FSCA;SYNTHREG00;HSD_CLOCK_MASTER_ENABLE
CPU_MMAP;RFC_FSCA;SYNTHREG00;HSD_CLOCK_MASTER_ENABLE;DIS
CPU_MMAP;RFC_FSCA;SYNTHREG00;HSD_CLOCK_MASTER_ENABLE;EN
CPU_MMAP;RFC_FSCA;SYNTHREG00;RETIMER_CLRZ_MASTER
CPU_MMAP;RFC_FSCA;SYNTHREG00;RESERVED12
CPU_MMAP;RFC_FSCA;SYNTHREG00;TDC_SUBTRACT
CPU_MMAP;RFC_FSCA;SYNTHREG00;RESERVED5
CPU_MMAP;RFC_FSCA;SYNTHREG00;SYNTH_TUNE_PHASE
CPU_MMAP;RFC_FSCA;PREDIV
CPU_MMAP;RFC_FSCA;PREDIV;PLL_PREDIV_RATIO
CPU_MMAP;RFC_FSCA;PREDIV;FINECALIB_PREDIV_RATIO
CPU_MMAP;RFC_FSCA;PREDIV;MIDCALIB_PREDIV_RATIO
CPU_MMAP;RFC_FSCA;PREDIV;DEFAULTCALIB_PREDIV_RATIO
CPU_MMAP;RFC_FSCA;PLLM
CPU_MMAP;RFC_FSCA;PLLM;FREF_DITHER_EN
CPU_MMAP;RFC_FSCA;PLLM;RESERVED28
CPU_MMAP;RFC_FSCA;PLLM;VAL
CPU_MMAP;RFC_FSCA;OTHERM
CPU_MMAP;RFC_FSCA;OTHERM;MID_M_VAL
CPU_MMAP;RFC_FSCA;OTHERM;DEF_M_VAL
CPU_MMAP;RFC_FSCA;FINECALM
CPU_MMAP;RFC_FSCA;FINECALM;RESERVED18
CPU_MMAP;RFC_FSCA;FINECALM;VAL
CPU_MMAP;RFC_FSCA;FRCDCO
CPU_MMAP;RFC_FSCA;FRCDCO;RESERVED30
CPU_MMAP;RFC_FSCA;FRCDCO;TST_DCO_FINE_REG
CPU_MMAP;RFC_FSCA;FRCDCO;TST_DCO_SD_REG
CPU_MMAP;RFC_FSCA;FRCDCO;TST_DCO_MID_REG
CPU_MMAP;RFC_FSCA;FRCDCO;TST_DCO_COARSE_REG
CPU_MMAP;RFC_FSCA;FRCDCO;TST_FORCE_C_M_F_CODES
CPU_MMAP;RFC_FSCA;FRCDCO;TST_FORCE_SD
CPU_MMAP;RFC_FSCA;SDCTL
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DLY_DOUBLE_EN
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DLY_MAT_DIS
CPU_MMAP;RFC_FSCA;SDCTL;RESERVED29
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DITHER_MODE
CPU_MMAP;RFC_FSCA;SDCTL;SDM_ORDER_1OR2Z
CPU_MMAP;RFC_FSCA;SDCTL;SDM_ORDER_1OR2Z;2ND
CPU_MMAP;RFC_FSCA;SDCTL;SDM_ORDER_1OR2Z;1ST
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DEM_DIS
CPU_MMAP;RFC_FSCA;SDCTL;MPX_CAN_DIS
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DIS
CPU_MMAP;RFC_FSCA;SDCTL;TST_DCO_SDM_OP_REG
CPU_MMAP;RFC_FSCA;SDCTL;TST_FORCE_SDM_OP
CPU_MMAP;RFC_FSCA;SDCTL;RESERVED18
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DLY_MODE
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DLY_MODE;1DELAY
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DLY_MODE;2DELAY
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DLY_MODE;3DELAY
CPU_MMAP;RFC_FSCA;SDCTL;SDM_DLY_MODE;4DELAY
CPU_MMAP;RFC_FSCA;SDCTL;RESERVED0
CPU_MMAP;RFC_FSCA;DTSTCTL
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_CLK_SEL
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_CLK_SEL;NC
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_CLK_SEL;FBCNTEREN
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_DATA_SEL
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_DATA_SEL;NC
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_DATA_SEL;PHASE_ERROR
CPU_MMAP;RFC_FSCA;DTSTCTL;RDCORE_DTST_EN
CPU_MMAP;RFC_FSCA;DTSTCTL;RESERVED23
CPU_MMAP;RFC_FSCA;DTSTCTL;READ_DTST_BY_SW
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_MASTER_EN
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_DATA_SEL2
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_DATA_SEL2;ZERO
CPU_MMAP;RFC_FSCA;DTSTCTL;DTST_DATA_SEL2;PLL_MSB_LSB_TDC
CPU_MMAP;RFC_FSCA;DTSTCTL;RESERVED0
CPU_MMAP;RFC_FSCA;DIGCFG2
CPU_MMAP;RFC_FSCA;DIGCFG2;FINE_BOT_CODE_DURING_CALIB
CPU_MMAP;RFC_FSCA;DIGCFG2;RESERVED16
CPU_MMAP;RFC_FSCA;DIGCFG2;FINE_TOP_CODE_DURING_CALIB
CPU_MMAP;RFC_FSCA;DIGCFG2;RESERVED0
CPU_MMAP;RFC_FSCA;TDCTH
CPU_MMAP;RFC_FSCA;TDCTH;MEM_KT_INV
CPU_MMAP;RFC_FSCA;TDCTH;EDGESEL_TDC_TH2
CPU_MMAP;RFC_FSCA;TDCTH;EDGESEL_TDC_TH1
CPU_MMAP;RFC_FSCA;LOOPCOEFF
CPU_MMAP;RFC_FSCA;LOOPCOEFF;PLL_COEFF_DYN_CHANGE
CPU_MMAP;RFC_FSCA;LOOPCOEFF;IIR_FILT_BW
CPU_MMAP;RFC_FSCA;LOOPCOEFF;IIR_FILTER_ORDER
CPU_MMAP;RFC_FSCA;LOOPCOEFF;IIR_FILT_EN
CPU_MMAP;RFC_FSCA;LOOPCOEFF;ALPHA_HIGH_PREC
CPU_MMAP;RFC_FSCA;LOOPCOEFF;PLL_BETA
CPU_MMAP;RFC_FSCA;LOOPCOEFF;PLL_ALPHA
CPU_MMAP;RFC_FSCA;PLLCTL0
CPU_MMAP;RFC_FSCA;PLLCTL0;RESERVED24
CPU_MMAP;RFC_FSCA;PLLCTL0;DLY_RETIMER_INP
CPU_MMAP;RFC_FSCA;PLLCTL0;DLY_RETIMER_INP;3CLK
CPU_MMAP;RFC_FSCA;PLLCTL0;DLY_RETIMER_INP;4CLK
CPU_MMAP;RFC_FSCA;PLLCTL0;RECENTER_DISABLE
CPU_MMAP;RFC_FSCA;PLLCTL0;RECENTER_THRESHOLD
CPU_MMAP;RFC_FSCA;PLLCTL0;RESERVED13
CPU_MMAP;RFC_FSCA;PLLCTL0;CKVD64_LATENCY_FOR_MPX_CAN
CPU_MMAP;RFC_FSCA;PLLCTL0;RESERVED9
CPU_MMAP;RFC_FSCA;PLLCTL0;CKVD16_LATENCY_FOR_MPX_CAN
CPU_MMAP;RFC_FSCA;PLLCTL0;REFCLK_LATCH_EDGE_SEL
CPU_MMAP;RFC_FSCA;PLLCTL0;REFCLK_LATCH_EDGE_SEL;POSEDGE
CPU_MMAP;RFC_FSCA;PLLCTL0;REFCLK_LATCH_EDGE_SEL;NEGEDGE
CPU_MMAP;RFC_FSCA;PLLCTL0;RESERVED5
CPU_MMAP;RFC_FSCA;PLLCTL0;TDC_SAT_ENABLE
CPU_MMAP;RFC_FSCA;PLLCTL0;RESERVED2
CPU_MMAP;RFC_FSCA;PLLCTL0;TDC_CALIB_AVERAGE
CPU_MMAP;RFC_FSCA;PLLCTL0;TDC_CALIB_AVERAGE;1CYCLE
CPU_MMAP;RFC_FSCA;PLLCTL0;TDC_CALIB_AVERAGE;2CYCLE
CPU_MMAP;RFC_FSCA;FSMCTL0
CPU_MMAP;RFC_FSCA;FSMCTL0;RESERVED29
CPU_MMAP;RFC_FSCA;FSMCTL0;PLL_FREEZE
CPU_MMAP;RFC_FSCA;FSMCTL0;RETIMERFREEZE
CPU_MMAP;RFC_FSCA;FSMCTL0;FINECODEFREEZE
CPU_MMAP;RFC_FSCA;FSMCTL0;TDCFREEZE
CPU_MMAP;RFC_FSCA;FSMCTL0;RESERVED19
CPU_MMAP;RFC_FSCA;FSMCTL0;MID_SAR_INIT_VAL
CPU_MMAP;RFC_FSCA;FSMCTL0;COARSE_PRECAL_VAL
CPU_MMAP;RFC_FSCA;FSMCTL0;MID_PRECAL_VAL
CPU_MMAP;RFC_FSCA;FSMCTL0;COARSE_CAL_SKIP_EN
CPU_MMAP;RFC_FSCA;FSMCTL0;MID_CAL_SKIP_EN
CPU_MMAP;RFC_FSCA;FSMCTL0;TDC_CAL_SKIP_EN
CPU_MMAP;RFC_FSCA;PETH
CPU_MMAP;RFC_FSCA;PETH;RESERVED29
CPU_MMAP;RFC_FSCA;PETH;PHASE_ERROR_LOCK_THRESH_CNT
CPU_MMAP;RFC_FSCA;PETH;PHASE_ERROR_LOCK_THRESH
CPU_MMAP;RFC_FSCA;PETH;RESERVED15
CPU_MMAP;RFC_FSCA;PETH;PHASE_ERROR_DISCARD_ENABLE
CPU_MMAP;RFC_FSCA;PETH;PHASE_ERROR_DISCARD_CNT
CPU_MMAP;RFC_FSCA;PETH;PHASE_ERROR_DISCARD_TH
CPU_MMAP;RFC_FSCA;PLLCTL1
CPU_MMAP;RFC_FSCA;PLLCTL1;PLL_OPEN_LOOP_MODE_WITH_1PT_MOD
CPU_MMAP;RFC_FSCA;PLLCTL1;RESERVED16
CPU_MMAP;RFC_FSCA;PLLCTL1;XTALID_FRAC
CPU_MMAP;RFC_FSCA;PLLCTL1;RESERVED6
CPU_MMAP;RFC_FSCA;PLLCTL1;PO_MID_SEL
CPU_MMAP;RFC_FSCA;PLLCTL1;PO_FINE_SEL
CPU_MMAP;RFC_FSCA;PLLCTL1;PO_TAIL_RES_TRIM
CPU_MMAP;RFC_FSCA;DTX
CPU_MMAP;RFC_FSCA;DTX;RESERVED20
CPU_MMAP;RFC_FSCA;DTX;TXOFF
CPU_MMAP;RFC_FSCA;DTX;SHAPEDZIGBEE
CPU_MMAP;RFC_FSCA;DTX;ZIGBEEMODE
CPU_MMAP;RFC_FSCA;DTX;SHAPEGAIN
CPU_MMAP;RFC_FSCA;DTX;INPTFACTOR
CPU_MMAP;RFC_FSCA;DTX;INIT
CPU_MMAP;RFC_FSCA;DTX;MODULEEN
CPU_MMAP;RFC_FSCA;DTX00
CPU_MMAP;RFC_FSCA;DTX00;SHAPE3
CPU_MMAP;RFC_FSCA;DTX00;SHAPE2
CPU_MMAP;RFC_FSCA;DTX00;SHAPE1
CPU_MMAP;RFC_FSCA;DTX00;SHAPE0
CPU_MMAP;RFC_FSCA;DTX01
CPU_MMAP;RFC_FSCA;DTX01;SHAPE7
CPU_MMAP;RFC_FSCA;DTX01;SHAPE6
CPU_MMAP;RFC_FSCA;DTX01;SHAPE5
CPU_MMAP;RFC_FSCA;DTX01;SHAPE4
CPU_MMAP;RFC_FSCA;DTX02
CPU_MMAP;RFC_FSCA;DTX02;SHAPE11
CPU_MMAP;RFC_FSCA;DTX02;SHAPE10
CPU_MMAP;RFC_FSCA;DTX02;SHAPE9
CPU_MMAP;RFC_FSCA;DTX02;SHAPE8
CPU_MMAP;RFC_FSCA;DTX03
CPU_MMAP;RFC_FSCA;DTX03;SHAPE15
CPU_MMAP;RFC_FSCA;DTX03;SHAPE14
CPU_MMAP;RFC_FSCA;DTX03;SHAPE13
CPU_MMAP;RFC_FSCA;DTX03;SHAPE12
CPU_MMAP;RFC_FSCA;DTX04
CPU_MMAP;RFC_FSCA;DTX04;SHAPE19
CPU_MMAP;RFC_FSCA;DTX04;SHAPE18
CPU_MMAP;RFC_FSCA;DTX04;SHAPE17
CPU_MMAP;RFC_FSCA;DTX04;SHAPE16
CPU_MMAP;RFC_FSCA;DTX05
CPU_MMAP;RFC_FSCA;DTX05;SHAPE23
CPU_MMAP;RFC_FSCA;DTX05;SHAPE22
CPU_MMAP;RFC_FSCA;DTX05;SHAPE21
CPU_MMAP;RFC_FSCA;DTX05;SHAPE20
CPU_MMAP;RFC_FSCA;DTXGAIN
CPU_MMAP;RFC_FSCA;DTXGAIN;CKVD64_LATENCY_FOR_MPX_ADD
CPU_MMAP;RFC_FSCA;DTXGAIN;RESERVED16
CPU_MMAP;RFC_FSCA;DTXGAIN;ADD_PATH_GAIN
CPU_MMAP;RFC_FSCA;ANADIV
CPU_MMAP;RFC_FSCA;ANADIV;CORNER_CAP
CPU_MMAP;RFC_FSCA;ANADIV;EN_KICK_START
CPU_MMAP;RFC_FSCA;ANADIV;DIV_BIAS_MODE
CPU_MMAP;RFC_FSCA;ANADIV;TDC_CALIB_PERIOD
CPU_MMAP;RFC_FSCA;ANADIV;RESERVED24
CPU_MMAP;RFC_FSCA;ANADIV;RETIMER_ISO
CPU_MMAP;RFC_FSCA;ANADIV;RESERVED17
CPU_MMAP;RFC_FSCA;ANADIV;CTL_NM_IREF
CPU_MMAP;RFC_FSCA;ANADIV;CTL_PM_IREF
CPU_MMAP;RFC_FSCA;ANADIV;RESERVED7
CPU_MMAP;RFC_FSCA;ANADIV;EN_ADC
CPU_MMAP;RFC_FSCA;ANADIV;EN_SYNTH
CPU_MMAP;RFC_FSCA;ANADIV;EN_TX_PH180
CPU_MMAP;RFC_FSCA;ANADIV;EN_TX_PH0
CPU_MMAP;RFC_FSCA;ANADIV;EN_RX_Q
CPU_MMAP;RFC_FSCA;ANADIV;EN_RX_I
CPU_MMAP;RFC_FSCA;ANADIV;DIV_BUF_ENABLE
CPU_MMAP;RFC_FSCA;PLLCTL2
CPU_MMAP;RFC_FSCA;PLLCTL2;RESERVED0
CPU_MMAP;RFC_FSCA;FSMCTL1
CPU_MMAP;RFC_FSCA;FSMCTL1;RESERVED8
CPU_MMAP;RFC_FSCA;FSMCTL1;FINE_START_CODE
CPU_MMAP;RFC_FSCA;FSMCTL2
CPU_MMAP;RFC_FSCA;FSMCTL2;RESERVED0
CPU_MMAP;RFC_FSCA;SPARE0
CPU_MMAP;RFC_FSCA;SPARE0;RESERVED0
CPU_MMAP;RFC_FSCA;STAT0
CPU_MMAP;RFC_FSCA;STAT0;RESERVED16
CPU_MMAP;RFC_FSCA;STAT0;FB_CNT
CPU_MMAP;RFC_FSCA;STAT1
CPU_MMAP;RFC_FSCA;STAT1;RESERVED16
CPU_MMAP;RFC_FSCA;STAT1;SYNTH_TUNE_STAT
CPU_MMAP;RFC_FSCA;STAT2
CPU_MMAP;RFC_FSCA;STAT2;FDCO_SPAN
CPU_MMAP;RFC_FSCA;STAT3
CPU_MMAP;RFC_FSCA;STAT3;DTST_READ
CPU_MMAP;RFC_FSCA;STAT3;TDC_CALIB_AVG
CPU_MMAP;RFC_FSCA;DDICTL
CPU_MMAP;RFC_FSCA;DDICTL;RESERVED2
CPU_MMAP;RFC_FSCA;DDICTL;RESTART
CPU_MMAP;RFC_FSCA;DDICTL;SAFEPARK
CPU_MMAP;RFC_FSCA;DDISTATUS
CPU_MMAP;RFC_FSCA;DDISTATUS;RESERVED1
CPU_MMAP;RFC_FSCA;DDISTATUS;BUSY
CPU_MMAP;RFC_FSCA;ADI1CTL
CPU_MMAP;RFC_FSCA;ADI1CTL;RESERVED2
CPU_MMAP;RFC_FSCA;ADI1CTL;WRSIZE
CPU_MMAP;RFC_FSCA;ADI1CTL;WRSIZE;FULL
CPU_MMAP;RFC_FSCA;ADI1CTL;WRSIZE;HALF
CPU_MMAP;RFC_FSCA;ADI1CTL;WREN
CPU_MMAP;RFC_FSCA;ADI1CTL;WREN;READ
CPU_MMAP;RFC_FSCA;ADI1CTL;WREN;WRITE
CPU_MMAP;RFC_FSCA;ADI1CLK
CPU_MMAP;RFC_FSCA;ADI1CLK;RESERVED1
CPU_MMAP;RFC_FSCA;ADI1CLK;CLK
CPU_MMAP;RFC_FSCA;ADI1CLRREQ
CPU_MMAP;RFC_FSCA;ADI1CLRREQ;RESERVED1
CPU_MMAP;RFC_FSCA;ADI1CLRREQ;REQ0
CPU_MMAP;RFC_FSCA;ADI1ADDRWRDATA
CPU_MMAP;RFC_FSCA;ADI1ADDRWRDATA;RESERVED13
CPU_MMAP;RFC_FSCA;ADI1ADDRWRDATA;ADDR
CPU_MMAP;RFC_FSCA;ADI1ADDRWRDATA;WRDATA
CPU_MMAP;RFC_FSCA;ADI1RD
CPU_MMAP;RFC_FSCA;ADI1RD;RESERVED5
CPU_MMAP;RFC_FSCA;ADI1RD;ACK
CPU_MMAP;RFC_FSCA;ADI1RD;RDDATA
CPU_MMAP;RFC_FSCA;DIVCTRL
CPU_MMAP;RFC_FSCA;DIVCTRL;RESERVED1
CPU_MMAP;RFC_FSCA;DIVCTRL;BUSY
CPU_MMAP;RFC_FSCA;DIVIDEND
CPU_MMAP;RFC_FSCA;DIVIDEND;DIVIDEND
CPU_MMAP;RFC_FSCA;DIVISOR
CPU_MMAP;RFC_FSCA;DIVISOR;DIVISOR
CPU_MMAP;RFC_FSCA;QUOTIENT
CPU_MMAP;RFC_FSCA;QUOTIENT;QUOTIENT
CPU_MMAP;RFC_MDM
CPU_MMAP;RFC_MDM;MDMENABLE
CPU_MMAP;RFC_MDM;MDMENABLE;RESERVED8
CPU_MMAP;RFC_MDM;MDMENABLE;VITACC
CPU_MMAP;RFC_MDM;MDMENABLE;ADCDIG
CPU_MMAP;RFC_MDM;MDMENABLE;SMI
CPU_MMAP;RFC_MDM;MDMENABLE;DEMODULATOR
CPU_MMAP;RFC_MDM;MDMENABLE;MODULATOR
CPU_MMAP;RFC_MDM;MDMENABLE;TIMEBASE
CPU_MMAP;RFC_MDM;MDMENABLE;TXRXFIFO
CPU_MMAP;RFC_MDM;MDMENABLE;TOPSM
CPU_MMAP;RFC_MDM;MDMINIT
CPU_MMAP;RFC_MDM;MDMINIT;RESERVED8
CPU_MMAP;RFC_MDM;MDMINIT;VITACC
CPU_MMAP;RFC_MDM;MDMINIT;ADCDIG
CPU_MMAP;RFC_MDM;MDMINIT;SMI
CPU_MMAP;RFC_MDM;MDMINIT;DEMODULATOR
CPU_MMAP;RFC_MDM;MDMINIT;MODULATOR
CPU_MMAP;RFC_MDM;MDMINIT;TIMEBASE
CPU_MMAP;RFC_MDM;MDMINIT;TXRXFIFO
CPU_MMAP;RFC_MDM;MDMINIT;TOPSM
CPU_MMAP;RFC_MDM;MDMPDREQ
CPU_MMAP;RFC_MDM;MDMPDREQ;RESERVED1
CPU_MMAP;RFC_MDM;MDMPDREQ;TOPSMPDREQ
CPU_MMAP;RFC_MDM;DEMENABLE0
CPU_MMAP;RFC_MDM;DEMENABLE0;RESERVED16
CPU_MMAP;RFC_MDM;DEMENABLE0;FE23
CPU_MMAP;RFC_MDM;DEMENABLE0;FE13
CPU_MMAP;RFC_MDM;DEMENABLE0;FELP
CPU_MMAP;RFC_MDM;DEMENABLE0;THRD
CPU_MMAP;RFC_MDM;DEMENABLE0;FRAC
CPU_MMAP;RFC_MDM;DEMENABLE0;FIDC
CPU_MMAP;RFC_MDM;DEMENABLE0;CHFI
CPU_MMAP;RFC_MDM;DEMENABLE0;BDEC
CPU_MMAP;RFC_MDM;DEMENABLE0;IQMC
CPU_MMAP;RFC_MDM;DEMENABLE0;MGE2
CPU_MMAP;RFC_MDM;DEMENABLE0;MGE1
CPU_MMAP;RFC_MDM;DEMENABLE0;RESERVED4
CPU_MMAP;RFC_MDM;DEMENABLE0;CODC
CPU_MMAP;RFC_MDM;DEMENABLE0;CMI4
CPU_MMAP;RFC_MDM;DEMENABLE0;CMIX
CPU_MMAP;RFC_MDM;DEMENABLE0;HILB
CPU_MMAP;RFC_MDM;DEMENABLE1
CPU_MMAP;RFC_MDM;DEMENABLE1;RESERVED16
CPU_MMAP;RFC_MDM;DEMENABLE1;VITE
CPU_MMAP;RFC_MDM;DEMENABLE1;MLSE
CPU_MMAP;RFC_MDM;DEMENABLE1;SOFD
CPU_MMAP;RFC_MDM;DEMENABLE1;SWQU
CPU_MMAP;RFC_MDM;DEMENABLE1;MAFC
CPU_MMAP;RFC_MDM;DEMENABLE1;MAFI
CPU_MMAP;RFC_MDM;DEMENABLE1;FIFE
CPU_MMAP;RFC_MDM;DEMENABLE1;PDIF
CPU_MMAP;RFC_MDM;DEMENABLE1;CA2P
CPU_MMAP;RFC_MDM;DEMENABLE1;FECP
CPU_MMAP;RFC_MDM;DEMENABLE1;FEC5
CPU_MMAP;RFC_MDM;DEMENABLE1;C1BE
CPU_MMAP;RFC_MDM;DEMENABLE1;LQIE
CPU_MMAP;RFC_MDM;DEMENABLE1;F4BA
CPU_MMAP;RFC_MDM;DEMENABLE1;STIM
CPU_MMAP;RFC_MDM;DEMENABLE1;DSBU
CPU_MMAP;RFC_MDM;DEMINIT0
CPU_MMAP;RFC_MDM;DEMINIT0;RESERVED16
CPU_MMAP;RFC_MDM;DEMINIT0;FE23
CPU_MMAP;RFC_MDM;DEMINIT0;FE13
CPU_MMAP;RFC_MDM;DEMINIT0;FELP
CPU_MMAP;RFC_MDM;DEMINIT0;THRD
CPU_MMAP;RFC_MDM;DEMINIT0;FRAC
CPU_MMAP;RFC_MDM;DEMINIT0;FIDC
CPU_MMAP;RFC_MDM;DEMINIT0;CHFI
CPU_MMAP;RFC_MDM;DEMINIT0;BDEC
CPU_MMAP;RFC_MDM;DEMINIT0;IQMC
CPU_MMAP;RFC_MDM;DEMINIT0;MGE2
CPU_MMAP;RFC_MDM;DEMINIT0;MGE1
CPU_MMAP;RFC_MDM;DEMINIT0;RESERVED4
CPU_MMAP;RFC_MDM;DEMINIT0;CODC
CPU_MMAP;RFC_MDM;DEMINIT0;CMI4
CPU_MMAP;RFC_MDM;DEMINIT0;CMIX
CPU_MMAP;RFC_MDM;DEMINIT0;HILB
CPU_MMAP;RFC_MDM;DEMINIT1
CPU_MMAP;RFC_MDM;DEMINIT1;RESERVED16
CPU_MMAP;RFC_MDM;DEMINIT1;VITE
CPU_MMAP;RFC_MDM;DEMINIT1;MLSE
CPU_MMAP;RFC_MDM;DEMINIT1;SOFD
CPU_MMAP;RFC_MDM;DEMINIT1;SWQU
CPU_MMAP;RFC_MDM;DEMINIT1;MAFC
CPU_MMAP;RFC_MDM;DEMINIT1;MAFI
CPU_MMAP;RFC_MDM;DEMINIT1;FIFE
CPU_MMAP;RFC_MDM;DEMINIT1;PDIF
CPU_MMAP;RFC_MDM;DEMINIT1;CA2P
CPU_MMAP;RFC_MDM;DEMINIT1;FECP
CPU_MMAP;RFC_MDM;DEMINIT1;FEC5
CPU_MMAP;RFC_MDM;DEMINIT1;C1BE
CPU_MMAP;RFC_MDM;DEMINIT1;LQIE
CPU_MMAP;RFC_MDM;DEMINIT1;F4BA
CPU_MMAP;RFC_MDM;DEMINIT1;STIM
CPU_MMAP;RFC_MDM;DEMINIT1;DSBU
CPU_MMAP;RFC_MDM;MCESTROBES0
CPU_MMAP;RFC_MDM;MCESTROBES0;RESERVED10
CPU_MMAP;RFC_MDM;MCESTROBES0;VITACCSTART
CPU_MMAP;RFC_MDM;MCESTROBES0;MLSETERM
CPU_MMAP;RFC_MDM;MCESTROBES0;EVENT3
CPU_MMAP;RFC_MDM;MCESTROBES0;EVENT2
CPU_MMAP;RFC_MDM;MCESTROBES0;EVENT1
CPU_MMAP;RFC_MDM;MCESTROBES0;EVENT0
CPU_MMAP;RFC_MDM;MCESTROBES0;MCETIMBALIGN
CPU_MMAP;RFC_MDM;MCESTROBES0;DSBURESTART
CPU_MMAP;RFC_MDM;MCESTROBES0;RESERVED1
CPU_MMAP;RFC_MDM;MCESTROBES0;CMDDONE
CPU_MMAP;RFC_MDM;MCESTROBES1
CPU_MMAP;RFC_MDM;MCESTROBES1;RESERVED10
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEPEAKABCMD
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEPEAKCCMD
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEPEAKBCMD
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEPEAKACMD
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEADVANCECMD
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BESTALLCMD
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEROTCMD
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEROTCMD;ROT0
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEROTCMD;ROT1R
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEROTCMD;ROT1L
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BEROTCMD;ROT16R
CPU_MMAP;RFC_MDM;MCESTROBES1;C1BECOPYCMD
CPU_MMAP;RFC_MDM;MCESTROBES1;RESERVED0
CPU_MMAP;RFC_MDM;MCEEVENT0
CPU_MMAP;RFC_MDM;MCEEVENT0;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENT0;EVENT
CPU_MMAP;RFC_MDM;MCEEVENT1
CPU_MMAP;RFC_MDM;MCEEVENT1;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENT1;EVENT
CPU_MMAP;RFC_MDM;MCEEVENT2
CPU_MMAP;RFC_MDM;MCEEVENT2;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENT2;EVENT
CPU_MMAP;RFC_MDM;MCEEVENTMSK0
CPU_MMAP;RFC_MDM;MCEEVENTMSK0;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENTMSK0;EVENTMSK
CPU_MMAP;RFC_MDM;MCEEVENTMSK1
CPU_MMAP;RFC_MDM;MCEEVENTMSK1;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENTMSK1;EVENTMSK
CPU_MMAP;RFC_MDM;MCEEVENTMSK2
CPU_MMAP;RFC_MDM;MCEEVENTMSK2;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENTMSK2;EVENTMSK
CPU_MMAP;RFC_MDM;MCEEVENTCLR0
CPU_MMAP;RFC_MDM;MCEEVENTCLR0;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENTCLR0;EVENTCLR
CPU_MMAP;RFC_MDM;MCEEVENTCLR1
CPU_MMAP;RFC_MDM;MCEEVENTCLR1;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENTCLR1;EVENTCLR
CPU_MMAP;RFC_MDM;MCEEVENTCLR2
CPU_MMAP;RFC_MDM;MCEEVENTCLR2;RESERVED16
CPU_MMAP;RFC_MDM;MCEEVENTCLR2;EVENTCLR
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;RESERVED4
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;ROMBANK
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;ROMBANK;B0
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;ROMBANK;B1
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;ROMBANK;B2
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;ROMBANK;B3
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;ROMBANK;B4
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;ROMBANK;B5
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;RAMROM
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;RAMROM;ROM
CPU_MMAP;RFC_MDM;MCEPROGRAMSRC;RAMROM;RAM
CPU_MMAP;RFC_MDM;MDMAPI
CPU_MMAP;RFC_MDM;MDMAPI;RESERVED16
CPU_MMAP;RFC_MDM;MDMAPI;PROTOCOLID
CPU_MMAP;RFC_MDM;MDMAPI;MDMCMD
CPU_MMAP;RFC_MDM;MDMCMDPAR0
CPU_MMAP;RFC_MDM;MDMCMDPAR0;RESERVED16
CPU_MMAP;RFC_MDM;MDMCMDPAR0;PAR0
CPU_MMAP;RFC_MDM;MDMCMDPAR1
CPU_MMAP;RFC_MDM;MDMCMDPAR1;RESERVED16
CPU_MMAP;RFC_MDM;MDMCMDPAR1;PAR1
CPU_MMAP;RFC_MDM;MDMCMDPAR2
CPU_MMAP;RFC_MDM;MDMCMDPAR2;RESERVED16
CPU_MMAP;RFC_MDM;MDMCMDPAR2;PAR
CPU_MMAP;RFC_MDM;MDMRFCHANNEL
CPU_MMAP;RFC_MDM;MDMRFCHANNEL;RESERVED12
CPU_MMAP;RFC_MDM;MDMRFCHANNEL;VALUE
CPU_MMAP;RFC_MDM;MDMSTATUS
CPU_MMAP;RFC_MDM;MDMSTATUS;RESERVED16
CPU_MMAP;RFC_MDM;MDMSTATUS;VALUE
CPU_MMAP;RFC_MDM;MDMFIFOWR
CPU_MMAP;RFC_MDM;MDMFIFOWR;RESERVED16
CPU_MMAP;RFC_MDM;MDMFIFOWR;PAYLOADIN
CPU_MMAP;RFC_MDM;MDMFIFORD
CPU_MMAP;RFC_MDM;MDMFIFORD;RESERVED16
CPU_MMAP;RFC_MDM;MDMFIFORD;PAYLOADOUT
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;RESERVED5
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;FIFOWRPORT
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;FIFOWRPORT;MDMFIFOWR
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;FIFOWRPORT;MODEM
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS1
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS2
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS3
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS4
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS5
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS6
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS7
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS8
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS9
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS10
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS11
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS12
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS13
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS14
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS15
CPU_MMAP;RFC_MDM;MDMFIFOWRCTRL;WORDSZWR;BITS16
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;RESERVED5
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;FIFORDPORT
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;FIFORDPORT;MDMFIFORD
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;FIFORDPORT;MODEM
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS1
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS2
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS3
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS4
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS5
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS6
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS7
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS8
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS9
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS10
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS11
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS12
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS13
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS14
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS15
CPU_MMAP;RFC_MDM;MDMFIFORDCTRL;WORDSZRD;BITS16
CPU_MMAP;RFC_MDM;MDMFIFOCFG
CPU_MMAP;RFC_MDM;MDMFIFOCFG;RESERVED16
CPU_MMAP;RFC_MDM;MDMFIFOCFG;AFULLTHR
CPU_MMAP;RFC_MDM;MDMFIFOCFG;AEMPTYTHR
CPU_MMAP;RFC_MDM;MDMFIFOSTA
CPU_MMAP;RFC_MDM;MDMFIFOSTA;RESERVED6
CPU_MMAP;RFC_MDM;MDMFIFOSTA;OVERFLOW
CPU_MMAP;RFC_MDM;MDMFIFOSTA;ALMOSTFULL
CPU_MMAP;RFC_MDM;MDMFIFOSTA;ALMOSTEMPTY
CPU_MMAP;RFC_MDM;MDMFIFOSTA;UNDERFLOW
CPU_MMAP;RFC_MDM;MDMFIFOSTA;RXVALID
CPU_MMAP;RFC_MDM;MDMFIFOSTA;TXREADY
CPU_MMAP;RFC_MDM;CPEFWEVENT
CPU_MMAP;RFC_MDM;CPEFWEVENT;RESERVED4
CPU_MMAP;RFC_MDM;CPEFWEVENT;EVENT3
CPU_MMAP;RFC_MDM;CPEFWEVENT;EVENT2
CPU_MMAP;RFC_MDM;CPEFWEVENT;EVENT1
CPU_MMAP;RFC_MDM;CPEFWEVENT;EVENT0
CPU_MMAP;RFC_MDM;RFESEND
CPU_MMAP;RFC_MDM;RFESEND;RESERVED16
CPU_MMAP;RFC_MDM;RFESEND;MCECMD
CPU_MMAP;RFC_MDM;RFERCEV
CPU_MMAP;RFC_MDM;RFERCEV;RESERVED16
CPU_MMAP;RFC_MDM;RFERCEV;RFECMD
CPU_MMAP;RFC_MDM;SMICONF
CPU_MMAP;RFC_MDM;SMICONF;RESERVED9
CPU_MMAP;RFC_MDM;SMICONF;SMIENABLE
CPU_MMAP;RFC_MDM;SMICONF;PRESCALER
CPU_MMAP;RFC_MDM;SMICONF;MLENGTH
CPU_MMAP;RFC_MDM;SMIDLOUTG
CPU_MMAP;RFC_MDM;SMIDLOUTG;RESERVED16
CPU_MMAP;RFC_MDM;SMIDLOUTG;DL
CPU_MMAP;RFC_MDM;SMICLOUTG
CPU_MMAP;RFC_MDM;SMICLOUTG;RESERVED16
CPU_MMAP;RFC_MDM;SMICLOUTG;CL
CPU_MMAP;RFC_MDM;SMIDLINC
CPU_MMAP;RFC_MDM;SMIDLINC;RESERVED16
CPU_MMAP;RFC_MDM;SMIDLINC;DL
CPU_MMAP;RFC_MDM;SMICLINC
CPU_MMAP;RFC_MDM;SMICLINC;RESERVED16
CPU_MMAP;RFC_MDM;SMICLINC;CL
CPU_MMAP;RFC_MDM;SMISTA
CPU_MMAP;RFC_MDM;SMISTA;RESERVED2
CPU_MMAP;RFC_MDM;SMISTA;INCCLERROR
CPU_MMAP;RFC_MDM;SMISTA;INCDLERROR
CPU_MMAP;RFC_MDM;ADCDIGCONF
CPU_MMAP;RFC_MDM;ADCDIGCONF;RESERVED2
CPU_MMAP;RFC_MDM;ADCDIGCONF;QBRANCHEN
CPU_MMAP;RFC_MDM;ADCDIGCONF;IBRANCHEN
CPU_MMAP;RFC_MDM;MODPRECTRL
CPU_MMAP;RFC_MDM;MODPRECTRL;RESERVED8
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS1
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS2
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS3
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS4
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS5
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS6
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS7
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS8
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS9
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS10
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS11
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS12
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS13
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS14
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS15
CPU_MMAP;RFC_MDM;MODPRECTRL;REPS;REPS16
CPU_MMAP;RFC_MDM;MODPRECTRL;SIZE
CPU_MMAP;RFC_MDM;MODPRECTRL;SIZE;BITS4
CPU_MMAP;RFC_MDM;MODPRECTRL;SIZE;BITS8
CPU_MMAP;RFC_MDM;MODPRECTRL;SIZE;BITS16
CPU_MMAP;RFC_MDM;MODSYMMAP0
CPU_MMAP;RFC_MDM;MODSYMMAP0;RESERVED16
CPU_MMAP;RFC_MDM;MODSYMMAP0;SYM3
CPU_MMAP;RFC_MDM;MODSYMMAP0;SYM2
CPU_MMAP;RFC_MDM;MODSYMMAP0;SYM1
CPU_MMAP;RFC_MDM;MODSYMMAP0;SYM0
CPU_MMAP;RFC_MDM;MODSYMMAP1
CPU_MMAP;RFC_MDM;MODSYMMAP1;RESERVED16
CPU_MMAP;RFC_MDM;MODSYMMAP1;SYM7
CPU_MMAP;RFC_MDM;MODSYMMAP1;SYM6
CPU_MMAP;RFC_MDM;MODSYMMAP1;SYM5
CPU_MMAP;RFC_MDM;MODSYMMAP1;SYM4
CPU_MMAP;RFC_MDM;MODSOFTTX
CPU_MMAP;RFC_MDM;MODSOFTTX;RESERVED4
CPU_MMAP;RFC_MDM;MODSOFTTX;SOFTSYMBOL
CPU_MMAP;RFC_MDM;MDMBAUD
CPU_MMAP;RFC_MDM;MDMBAUD;RESERVED16
CPU_MMAP;RFC_MDM;MDMBAUD;RATEWORD
CPU_MMAP;RFC_MDM;MDMBAUDPRE
CPU_MMAP;RFC_MDM;MDMBAUDPRE;RESERVED13
CPU_MMAP;RFC_MDM;MDMBAUDPRE;EXTRATEWORD
CPU_MMAP;RFC_MDM;MDMBAUDPRE;RESERVED7
CPU_MMAP;RFC_MDM;MDMBAUDPRE;ALIGNVALUE
CPU_MMAP;RFC_MDM;MDMBAUDPRE;PRESCALER
CPU_MMAP;RFC_MDM;MODMAIN
CPU_MMAP;RFC_MDM;MODMAIN;RESERVED8
CPU_MMAP;RFC_MDM;MODMAIN;SPREADFACTOR
CPU_MMAP;RFC_MDM;MODMAIN;SPREADFACTOR;FACTOR2
CPU_MMAP;RFC_MDM;MODMAIN;SPREADFACTOR;FACTOR4
CPU_MMAP;RFC_MDM;MODMAIN;SPREADFACTOR;FACTOR8
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;NOSEL
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;IEEE15_4
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;CC85XX
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;SPREAD
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;FEC13
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;FEC23
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;IEEE15_4G_NOREC
CPU_MMAP;RFC_MDM;MODMAIN;FECSELECT;IEEE15_4G_REC
CPU_MMAP;RFC_MDM;MODMAIN;MODLEVELS
CPU_MMAP;RFC_MDM;MODMAIN;MODLEVELS;LVL2
CPU_MMAP;RFC_MDM;MODMAIN;MODLEVELS;LVL4
CPU_MMAP;RFC_MDM;MODMAIN;MODLEVELS;LVL8
CPU_MMAP;RFC_MDM;DEMMISC0
CPU_MMAP;RFC_MDM;DEMMISC0;RESERVED13
CPU_MMAP;RFC_MDM;DEMMISC0;CMI4FMIXSIGN
CPU_MMAP;RFC_MDM;DEMMISC0;CMI4FMIXSIGN;POS
CPU_MMAP;RFC_MDM;DEMMISC0;CMI4FMIXSIGN;NEG
CPU_MMAP;RFC_MDM;DEMMISC0;HILBREMOVEREAL
CPU_MMAP;RFC_MDM;DEMMISC0;HILBREMOVEREAL;IMAG
CPU_MMAP;RFC_MDM;DEMMISC0;HILBREMOVEREAL;REAL
CPU_MMAP;RFC_MDM;DEMMISC0;HILBEN
CPU_MMAP;RFC_MDM;DEMMISC0;HILBEN;DIS
CPU_MMAP;RFC_MDM;DEMMISC0;HILBEN;EN
CPU_MMAP;RFC_MDM;DEMMISC0;CMIXN
CPU_MMAP;RFC_MDM;DEMMISC1
CPU_MMAP;RFC_MDM;DEMMISC1;RESERVED4
CPU_MMAP;RFC_MDM;DEMMISC1;MGE2SRCSEL
CPU_MMAP;RFC_MDM;DEMMISC1;MGE2SRCSEL;FIDC
CPU_MMAP;RFC_MDM;DEMMISC1;MGE2SRCSEL;FEXB1
CPU_MMAP;RFC_MDM;DEMMISC1;MGE2SRCSEL;CHFI
CPU_MMAP;RFC_MDM;DEMMISC1;CHFIBW
CPU_MMAP;RFC_MDM;DEMMISC1;CHFIBW;BW0_5
CPU_MMAP;RFC_MDM;DEMMISC1;CHFIBW;BW0_3333
CPU_MMAP;RFC_MDM;DEMMISC1;CHFIBW;BW0_41667
CPU_MMAP;RFC_MDM;DEMMISC1;CHFIBW;BW0_5SHORT
CPU_MMAP;RFC_MDM;DEMMISC2
CPU_MMAP;RFC_MDM;DEMMISC2;RESERVED16
CPU_MMAP;RFC_MDM;DEMMISC2;LQIPERIOD
CPU_MMAP;RFC_MDM;DEMMISC2;LQIPERIOD;SYM16
CPU_MMAP;RFC_MDM;DEMMISC2;LQIPERIOD;SYM64
CPU_MMAP;RFC_MDM;DEMMISC2;LQIPERIOD;SYM256
CPU_MMAP;RFC_MDM;DEMMISC2;LQIPERIOD;SYM1024
CPU_MMAP;RFC_MDM;DEMMISC2;MLSERUN
CPU_MMAP;RFC_MDM;DEMMISC2;MAFCGAIN
CPU_MMAP;RFC_MDM;DEMMISC2;STIMESTONLY
CPU_MMAP;RFC_MDM;DEMMISC2;STIMESTONLY;DIS
CPU_MMAP;RFC_MDM;DEMMISC2;STIMESTONLY;EN
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAPERIOD
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAPERIOD;SYM4
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAPERIOD;SYM8
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAPERIOD;SYM16
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAPERIOD;SYM32
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAPERIOD;SYM64
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAPERIOD;SYM128
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV512
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV256
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV128
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV64
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV32
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV16
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV8
CPU_MMAP;RFC_MDM;DEMMISC2;STIMTEAGAIN;DIV4
CPU_MMAP;RFC_MDM;DEMMISC2;PDIFLINPREDEN
CPU_MMAP;RFC_MDM;DEMMISC2;PDIFDESPECKLEREN
CPU_MMAP;RFC_MDM;DEMMISC2;PDIFIQCONJEN
CPU_MMAP;RFC_MDM;DEMMISC2;PDIFLIMITRANGE
CPU_MMAP;RFC_MDM;DEMMISC2;PDIFLIMITRANGE;DIS
CPU_MMAP;RFC_MDM;DEMMISC2;PDIFLIMITRANGE;EN
CPU_MMAP;RFC_MDM;DEMMISC3
CPU_MMAP;RFC_MDM;DEMMISC3;RESERVED11
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1DVGA
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1DVGA;GAIN1
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1DVGA;GAIN2
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1DVGA;GAIN4
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1DVGA;GAIN8
CPU_MMAP;RFC_MDM;DEMMISC3;BDE2DVGA
CPU_MMAP;RFC_MDM;DEMMISC3;BDE2DVGA;GAIN1
CPU_MMAP;RFC_MDM;DEMMISC3;BDE2DVGA;GAIN2
CPU_MMAP;RFC_MDM;DEMMISC3;BDE2DVGA;GAIN4
CPU_MMAP;RFC_MDM;DEMMISC3;BDE2DVGA;GAIN8
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1NUMSTAGES
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1NUMSTAGES;DIV1
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1NUMSTAGES;DIV2
CPU_MMAP;RFC_MDM;DEMMISC3;BDE1NUMSTAGES;DIV4
CPU_MMAP;RFC_MDM;DEMMISC3;PDIFDECIM
CPU_MMAP;RFC_MDM;DEMMISC3;PDIFDECIM;DIV1
CPU_MMAP;RFC_MDM;DEMMISC3;PDIFDECIM;DIV2
CPU_MMAP;RFC_MDM;DEMMISC3;PDIFDECIM;DIV4
CPU_MMAP;RFC_MDM;DEMMISC3;BDECNUMSTAGES
CPU_MMAP;RFC_MDM;DEMMISC3;BDECNUMSTAGES;DIV1
CPU_MMAP;RFC_MDM;DEMMISC3;BDECNUMSTAGES;DIV2
CPU_MMAP;RFC_MDM;DEMMISC3;BDECNUMSTAGES;DIV4
CPU_MMAP;RFC_MDM;DEMMISC3;BDECNUMSTAGES;DIV8
CPU_MMAP;RFC_MDM;DEMMISC3;BDECNUMSTAGES;DIV16
CPU_MMAP;RFC_MDM;DEMIQMC0
CPU_MMAP;RFC_MDM;DEMIQMC0;RESERVED16
CPU_MMAP;RFC_MDM;DEMIQMC0;GAINFACTOR
CPU_MMAP;RFC_MDM;DEMIQMC0;PHASEFACTOR
CPU_MMAP;RFC_MDM;DEMDSBU
CPU_MMAP;RFC_MDM;DEMDSBU;RESERVED16
CPU_MMAP;RFC_MDM;DEMDSBU;DSBUAVGLENGTH
CPU_MMAP;RFC_MDM;DEMDSBU;DSBUDELAY
CPU_MMAP;RFC_MDM;DEMCODC0
CPU_MMAP;RFC_MDM;DEMCODC0;RESERVED12
CPU_MMAP;RFC_MDM;DEMCODC0;ESTSEL
CPU_MMAP;RFC_MDM;DEMCODC0;ESTSEL;ACC
CPU_MMAP;RFC_MDM;DEMCODC0;ESTSEL;IIR
CPU_MMAP;RFC_MDM;DEMCODC0;COMPSEL
CPU_MMAP;RFC_MDM;DEMCODC0;COMPSEL;MANUAL
CPU_MMAP;RFC_MDM;DEMCODC0;COMPSEL;ACC
CPU_MMAP;RFC_MDM;DEMCODC0;COMPSEL;IIR
CPU_MMAP;RFC_MDM;DEMCODC0;IIRUSEINITIAL
CPU_MMAP;RFC_MDM;DEMCODC0;IIRUSEINITIAL;DIS
CPU_MMAP;RFC_MDM;DEMCODC0;IIRUSEINITIAL;EN
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;OFF
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;DIV16
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;DIV32
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;DIV64
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;DIV128
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;DIV256
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;DIV512
CPU_MMAP;RFC_MDM;DEMCODC0;IIRGAIN;DIV1024
CPU_MMAP;RFC_MDM;DEMCODC0;IIREN
CPU_MMAP;RFC_MDM;DEMCODC0;IIREN;DIS
CPU_MMAP;RFC_MDM;DEMCODC0;IIREN;EN
CPU_MMAP;RFC_MDM;DEMCODC0;ACCCONTMODE
CPU_MMAP;RFC_MDM;DEMCODC0;ACCCONTMODE;SINGLE
CPU_MMAP;RFC_MDM;DEMCODC0;ACCCONTMODE;CONT
CPU_MMAP;RFC_MDM;DEMCODC0;ACCPERIOD
CPU_MMAP;RFC_MDM;DEMCODC0;ACCPERIOD;SMPL8
CPU_MMAP;RFC_MDM;DEMCODC0;ACCPERIOD;SMPL32
CPU_MMAP;RFC_MDM;DEMCODC0;ACCPERIOD;SMPL128
CPU_MMAP;RFC_MDM;DEMCODC0;ACCPERIOD;SMPL512
CPU_MMAP;RFC_MDM;DEMCODC0;ACCEN
CPU_MMAP;RFC_MDM;DEMCODC0;ACCEN;DIS
CPU_MMAP;RFC_MDM;DEMCODC0;ACCEN;EN
CPU_MMAP;RFC_MDM;DEMFIDC0
CPU_MMAP;RFC_MDM;DEMFIDC0;RESERVED6
CPU_MMAP;RFC_MDM;DEMFIDC0;COMPSEL
CPU_MMAP;RFC_MDM;DEMFIDC0;COMPSEL;MANUAL
CPU_MMAP;RFC_MDM;DEMFIDC0;COMPSEL;ACC
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCPERIOD
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCPERIOD;SMPL8
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCPERIOD;SMPL32
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCPERIOD;SMPL128
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCPERIOD;SMPL512
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCCONTMODE
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCCONTMODE;SINGLE
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCCONTMODE;CONT
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCEN
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCEN;DIS
CPU_MMAP;RFC_MDM;DEMFIDC0;ACCEN;EN
CPU_MMAP;RFC_MDM;DEMFEXB0
CPU_MMAP;RFC_MDM;DEMFEXB0;RESERVED14
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT2PASSTHROUGH
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT2SRCSEL
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT2SRCSEL;HILB
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT2SRCSEL;CMIX
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT2SRCSEL;CMI4
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT2SRCSEL;CODC
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT1PASSTHROUGH
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT1SRCSEL
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT1SRCSEL;HILB
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT1SRCSEL;CMIX
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT1SRCSEL;CMI4
CPU_MMAP;RFC_MDM;DEMFEXB0;OUT1SRCSEL;CODC
CPU_MMAP;RFC_MDM;DEMFEXB0;B4SRCSEL
CPU_MMAP;RFC_MDM;DEMFEXB0;B4SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMFEXB0;B4SRCSEL;HILB
CPU_MMAP;RFC_MDM;DEMFEXB0;B4SRCSEL;CMIX
CPU_MMAP;RFC_MDM;DEMFEXB0;B4SRCSEL;CMI4
CPU_MMAP;RFC_MDM;DEMFEXB0;B3SRCSEL
CPU_MMAP;RFC_MDM;DEMFEXB0;B3SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMFEXB0;B3SRCSEL;HILB
CPU_MMAP;RFC_MDM;DEMFEXB0;B3SRCSEL;CMIX
CPU_MMAP;RFC_MDM;DEMFEXB0;B3SRCSEL;CODC
CPU_MMAP;RFC_MDM;DEMFEXB0;B2SRCSEL
CPU_MMAP;RFC_MDM;DEMFEXB0;B2SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMFEXB0;B2SRCSEL;HILB
CPU_MMAP;RFC_MDM;DEMFEXB0;B2SRCSEL;CMI4
CPU_MMAP;RFC_MDM;DEMFEXB0;B2SRCSEL;CODC
CPU_MMAP;RFC_MDM;DEMFEXB0;B1SRCSEL
CPU_MMAP;RFC_MDM;DEMFEXB0;B1SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMFEXB0;B1SRCSEL;CMIX
CPU_MMAP;RFC_MDM;DEMFEXB0;B1SRCSEL;CMI4
CPU_MMAP;RFC_MDM;DEMFEXB0;B1SRCSEL;CODC
CPU_MMAP;RFC_MDM;DEMDSXB0
CPU_MMAP;RFC_MDM;DEMDSXB0;RESERVED14
CPU_MMAP;RFC_MDM;DEMDSXB0;OUT2PASSTHROUGH
CPU_MMAP;RFC_MDM;DEMDSXB0;OUT1PASSTHROUGH
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL2
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL2;FIFE
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL2;MAFI
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL2;C1BE
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL1
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL1;FIFE
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL1;MAFI
CPU_MMAP;RFC_MDM;DEMDSXB0;OUTSRCSEL1;C1BE
CPU_MMAP;RFC_MDM;DEMDSXB0;RESERVED6
CPU_MMAP;RFC_MDM;DEMDSXB0;B3SRCSEL
CPU_MMAP;RFC_MDM;DEMDSXB0;B3SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMDSXB0;B3SRCSEL;FIFE
CPU_MMAP;RFC_MDM;DEMDSXB0;B3SRCSEL;MAFI
CPU_MMAP;RFC_MDM;DEMDSXB0;B2SRCSEL
CPU_MMAP;RFC_MDM;DEMDSXB0;B2SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMDSXB0;B2SRCSEL;FIFE
CPU_MMAP;RFC_MDM;DEMDSXB0;B2SRCSEL;C1BE
CPU_MMAP;RFC_MDM;DEMDSXB0;B1SRCSEL
CPU_MMAP;RFC_MDM;DEMDSXB0;B1SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMDSXB0;B1SRCSEL;MAFI
CPU_MMAP;RFC_MDM;DEMDSXB0;B1SRCSEL;C1BE
CPU_MMAP;RFC_MDM;DEMD2XB0
CPU_MMAP;RFC_MDM;DEMD2XB0;RESERVED10
CPU_MMAP;RFC_MDM;DEMD2XB0;OUT2PASSTHROUGH
CPU_MMAP;RFC_MDM;DEMD2XB0;OUT1PASSTHROUGH
CPU_MMAP;RFC_MDM;DEMD2XB0;OUTSRCSEL2
CPU_MMAP;RFC_MDM;DEMD2XB0;OUTSRCSEL2;MAFC
CPU_MMAP;RFC_MDM;DEMD2XB0;OUTSRCSEL2;STIM
CPU_MMAP;RFC_MDM;DEMD2XB0;OUTSRCSEL1
CPU_MMAP;RFC_MDM;DEMD2XB0;OUTSRCSEL1;MAFC
CPU_MMAP;RFC_MDM;DEMD2XB0;OUTSRCSEL1;STIM
CPU_MMAP;RFC_MDM;DEMD2XB0;B2SRCSEL
CPU_MMAP;RFC_MDM;DEMD2XB0;B2SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMD2XB0;B2SRCSEL;MAFC
CPU_MMAP;RFC_MDM;DEMD2XB0;B1SRCSEL
CPU_MMAP;RFC_MDM;DEMD2XB0;B1SRCSEL;INPUT
CPU_MMAP;RFC_MDM;DEMD2XB0;B1SRCSEL;STIM
CPU_MMAP;RFC_MDM;DEMFIFE0
CPU_MMAP;RFC_MDM;DEMFIFE0;RESERVED12
CPU_MMAP;RFC_MDM;DEMFIFE0;FINEFOESEL
CPU_MMAP;RFC_MDM;DEMFIFE0;FINEFOESEL;IIR
CPU_MMAP;RFC_MDM;DEMFIFE0;FINEFOESEL;ACC
CPU_MMAP;RFC_MDM;DEMFIFE0;FOCFFSEL
CPU_MMAP;RFC_MDM;DEMFIFE0;FOCFFSEL;IIR
CPU_MMAP;RFC_MDM;DEMFIFE0;FOCFFSEL;ACC
CPU_MMAP;RFC_MDM;DEMFIFE0;FOCFFSEL;MANUAL
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCCNTMODE
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCCNTMODE;SINGLE
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCCNTMODE;CONT
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCPERIOD
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCPERIOD;64
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCPERIOD;128
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCPERIOD;256
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCPERIOD;512
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCEN
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCEN;DIS
CPU_MMAP;RFC_MDM;DEMFIFE0;ACCEN;EN
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRUSEINITIAL
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRUSEINITIAL;DIS
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRUSEINITIAL;EN
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;OFF
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;DIV16
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;DIV32
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;DIV64
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;DIV128
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;DIV256
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;DIV512
CPU_MMAP;RFC_MDM;DEMFIFE0;IIRGAIN;DIV1024
CPU_MMAP;RFC_MDM;DEMFIFE0;IIREN
CPU_MMAP;RFC_MDM;DEMFIFE0;IIREN;DIS
CPU_MMAP;RFC_MDM;DEMFIFE0;IIREN;EN
CPU_MMAP;RFC_MDM;DEMMAFI0
CPU_MMAP;RFC_MDM;DEMMAFI0;RESERVED16
CPU_MMAP;RFC_MDM;DEMMAFI0;C1C7
CPU_MMAP;RFC_MDM;DEMMAFI0;C0C8
CPU_MMAP;RFC_MDM;DEMMAFI1
CPU_MMAP;RFC_MDM;DEMMAFI1;RESERVED16
CPU_MMAP;RFC_MDM;DEMMAFI1;C3C5
CPU_MMAP;RFC_MDM;DEMMAFI1;C2C6
CPU_MMAP;RFC_MDM;DEMMAFI2
CPU_MMAP;RFC_MDM;DEMMAFI2;RESERVED9
CPU_MMAP;RFC_MDM;DEMMAFI2;C4
CPU_MMAP;RFC_MDM;DEMMAFI3
CPU_MMAP;RFC_MDM;DEMMAFI3;RESERVED9
CPU_MMAP;RFC_MDM;DEMMAFI3;K
CPU_MMAP;RFC_MDM;DEMC1BE0
CPU_MMAP;RFC_MDM;DEMC1BE0;RESERVED16
CPU_MMAP;RFC_MDM;DEMC1BE0;MASKB
CPU_MMAP;RFC_MDM;DEMC1BE0;MASKA
CPU_MMAP;RFC_MDM;DEMC1BE0;CASCCONF
CPU_MMAP;RFC_MDM;DEMC1BE0;CASCCONF;SINGLE
CPU_MMAP;RFC_MDM;DEMC1BE0;CASCCONF;SERIAL
CPU_MMAP;RFC_MDM;DEMC1BE0;CASCCONF;PARALLEL
CPU_MMAP;RFC_MDM;DEMC1BE0;COPYCONF
CPU_MMAP;RFC_MDM;DEMC1BE1
CPU_MMAP;RFC_MDM;DEMC1BE1;RESERVED16
CPU_MMAP;RFC_MDM;DEMC1BE1;THRESHOLDB
CPU_MMAP;RFC_MDM;DEMC1BE1;THRESHOLDA
CPU_MMAP;RFC_MDM;DEMC1BE2
CPU_MMAP;RFC_MDM;DEMC1BE2;RESERVED10
CPU_MMAP;RFC_MDM;DEMC1BE2;PEAKCONF
CPU_MMAP;RFC_MDM;DEMC1BE2;PEAKCONF;THRESH
CPU_MMAP;RFC_MDM;DEMC1BE2;PEAKCONF;BEST
CPU_MMAP;RFC_MDM;DEMC1BE2;PEAKCONF;BESTAB
CPU_MMAP;RFC_MDM;DEMC1BE2;THRESHOLDC
CPU_MMAP;RFC_MDM;MDMSYNC0
CPU_MMAP;RFC_MDM;MDMSYNC0;RESERVED16
CPU_MMAP;RFC_MDM;MDMSYNC0;SWA15C0
CPU_MMAP;RFC_MDM;MDMSYNC1
CPU_MMAP;RFC_MDM;MDMSYNC1;RESERVED16
CPU_MMAP;RFC_MDM;MDMSYNC1;SWA31C16
CPU_MMAP;RFC_MDM;MDMSYNC2
CPU_MMAP;RFC_MDM;MDMSYNC2;RESERVED16
CPU_MMAP;RFC_MDM;MDMSYNC2;SWB15C0
CPU_MMAP;RFC_MDM;MDMSYNC3
CPU_MMAP;RFC_MDM;MDMSYNC3;RESERVED16
CPU_MMAP;RFC_MDM;MDMSYNC3;SWB31C16
CPU_MMAP;RFC_MDM;DEMSWQU0
CPU_MMAP;RFC_MDM;DEMSWQU0;RESERVED7
CPU_MMAP;RFC_MDM;DEMSWQU0;AUTOMAFC
CPU_MMAP;RFC_MDM;DEMSWQU0;AUTOMAFC;DIS
CPU_MMAP;RFC_MDM;DEMSWQU0;AUTOMAFC;EN
CPU_MMAP;RFC_MDM;DEMSWQU0;RUN
CPU_MMAP;RFC_MDM;DEMSWQU0;REFLEN
CPU_MMAP;RFC_MDM;MODCTRL
CPU_MMAP;RFC_MDM;MODCTRL;RESERVED10
CPU_MMAP;RFC_MDM;MODCTRL;PARBITQUALEN
CPU_MMAP;RFC_MDM;MODCTRL;STIMEARLYLATE
CPU_MMAP;RFC_MDM;MODCTRL;STIMEARLYLATE;NORMAL
CPU_MMAP;RFC_MDM;MODCTRL;STIMEARLYLATE;LATE
CPU_MMAP;RFC_MDM;MODCTRL;STIMEARLYLATE;EARLY
CPU_MMAP;RFC_MDM;MODCTRL;EARLYLATE
CPU_MMAP;RFC_MDM;MODCTRL;SOFTPDIFFMODE
CPU_MMAP;RFC_MDM;MODCTRL;SOFTTXENABLE
CPU_MMAP;RFC_MDM;MODCTRL;FECENABLE
CPU_MMAP;RFC_MDM;MODCTRL;FEC5TERMINATE
CPU_MMAP;RFC_MDM;MODCTRL;TONEINSERT
CPU_MMAP;RFC_MDM;MODCTRL;PREAMBLEINSERT
CPU_MMAP;RFC_MDM;MODPREAMBLE
CPU_MMAP;RFC_MDM;MODPREAMBLE;RESERVED16
CPU_MMAP;RFC_MDM;MODPREAMBLE;WORD
CPU_MMAP;RFC_MDM;DEMFRAC0
CPU_MMAP;RFC_MDM;DEMFRAC0;RESERVED16
CPU_MMAP;RFC_MDM;DEMFRAC0;P15C0
CPU_MMAP;RFC_MDM;DEMFRAC1
CPU_MMAP;RFC_MDM;DEMFRAC1;RESERVED12
CPU_MMAP;RFC_MDM;DEMFRAC1;P27C16
CPU_MMAP;RFC_MDM;DEMFRAC2
CPU_MMAP;RFC_MDM;DEMFRAC2;RESERVED16
CPU_MMAP;RFC_MDM;DEMFRAC2;Q15C0
CPU_MMAP;RFC_MDM;DEMFRAC3
CPU_MMAP;RFC_MDM;DEMFRAC3;RESERVED12
CPU_MMAP;RFC_MDM;DEMFRAC3;Q27C16
CPU_MMAP;RFC_MDM;DEMCODC1
CPU_MMAP;RFC_MDM;DEMCODC1;RESERVED13
CPU_MMAP;RFC_MDM;DEMCODC1;COMPIVAL
CPU_MMAP;RFC_MDM;DEMCODC2
CPU_MMAP;RFC_MDM;DEMCODC2;RESERVED13
CPU_MMAP;RFC_MDM;DEMCODC2;COMPQVAL
CPU_MMAP;RFC_MDM;DEMFIDC1
CPU_MMAP;RFC_MDM;DEMFIDC1;RESERVED13
CPU_MMAP;RFC_MDM;DEMFIDC1;COMPIVAL
CPU_MMAP;RFC_MDM;DEMFIDC2
CPU_MMAP;RFC_MDM;DEMFIDC2;RESERVED13
CPU_MMAP;RFC_MDM;DEMFIDC2;COMPQVAL
CPU_MMAP;RFC_MDM;DEMFIFE1
CPU_MMAP;RFC_MDM;DEMFIFE1;RESERVED8
CPU_MMAP;RFC_MDM;DEMFIFE1;FOCFBREGVAL
CPU_MMAP;RFC_MDM;DEMTHRD0
CPU_MMAP;RFC_MDM;DEMTHRD0;RESERVED15
CPU_MMAP;RFC_MDM;DEMTHRD0;THR2
CPU_MMAP;RFC_MDM;DEMTHRD0;RESERVED7
CPU_MMAP;RFC_MDM;DEMTHRD0;THR1
CPU_MMAP;RFC_MDM;DEMTHRD1
CPU_MMAP;RFC_MDM;DEMTHRD1;RESERVED7
CPU_MMAP;RFC_MDM;DEMTHRD1;THR3
CPU_MMAP;RFC_MDM;DEMMAFC0
CPU_MMAP;RFC_MDM;DEMMAFC0;RESERVED8
CPU_MMAP;RFC_MDM;DEMMAFC0;COMPVAL
CPU_MMAP;RFC_MDM;DEMMAFI4
CPU_MMAP;RFC_MDM;DEMMAFI4;RESERVED8
CPU_MMAP;RFC_MDM;DEMMAFI4;TERM_VAL
CPU_MMAP;RFC_MDM;DEMSWIMBAL
CPU_MMAP;RFC_MDM;DEMSWIMBAL;RESERVED16
CPU_MMAP;RFC_MDM;DEMSWIMBAL;IMBALB
CPU_MMAP;RFC_MDM;DEMSWIMBAL;IMBALA
CPU_MMAP;RFC_MDM;DEMSOFTPDIFF
CPU_MMAP;RFC_MDM;DEMSOFTPDIFF;RESERVED8
CPU_MMAP;RFC_MDM;DEMSOFTPDIFF;SOFTPDIFF
CPU_MMAP;RFC_MDM;DEMDEBUG
CPU_MMAP;RFC_MDM;DEMDEBUG;RESERVED9
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;NOSEL
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;PDIF
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;MAFI
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;STIM
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;MAFC
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;C1BE
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;SOFD
CPU_MMAP;RFC_MDM;DEMDEBUG;DECSTAGEDEBUG;TRIGGER
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;NOSEL
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;FELP
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;IQMC
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;BDE1
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;FEXB2
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;BDE2
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;CHFI
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;FRAC
CPU_MMAP;RFC_MDM;DEMDEBUG;FRONTENDDEBUG;TRIGGER
CPU_MMAP;RFC_MDM;DEMDEBUG;LOOPBACKMODE
CPU_MMAP;RFC_MDM;VITCTRL
CPU_MMAP;RFC_MDM;VITCTRL;RESERVED10
CPU_MMAP;RFC_MDM;VITCTRL;READEPTH
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;NOSEL
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM0
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM1
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM2
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM3
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM4
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM5
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM6
CPU_MMAP;RFC_MDM;VITCTRL;APMRDBACKSEL;APM7
CPU_MMAP;RFC_MDM;VITCTRL;ACSITERATIONS
CPU_MMAP;RFC_MDM;VITCTRL;ACSITERATIONS;CODE12
CPU_MMAP;RFC_MDM;VITCTRL;ACSITERATIONS;CODE23
CPU_MMAP;RFC_MDM;VITCTRL;SOFTMETRICS
CPU_MMAP;RFC_MDM;VITCTRL;SOFTMETRICS;MET5M
CPU_MMAP;RFC_MDM;VITCTRL;SOFTMETRICS;SOFT
CPU_MMAP;RFC_MDM;VITCOMPUTE
CPU_MMAP;RFC_MDM;VITCOMPUTE;RESERVED1
CPU_MMAP;RFC_MDM;VITCOMPUTE;COMPUTE
CPU_MMAP;RFC_MDM;VITAPMRDBACK
CPU_MMAP;RFC_MDM;VITAPMRDBACK;RESERVED10
CPU_MMAP;RFC_MDM;VITAPMRDBACK;VALUE
CPU_MMAP;RFC_MDM;VITSTATE
CPU_MMAP;RFC_MDM;VITSTATE;RESERVED3
CPU_MMAP;RFC_MDM;VITSTATE;VALUE
CPU_MMAP;RFC_MDM;VITBRMETRIC10
CPU_MMAP;RFC_MDM;VITBRMETRIC10;RESERVED16
CPU_MMAP;RFC_MDM;VITBRMETRIC10;MET1
CPU_MMAP;RFC_MDM;VITBRMETRIC10;MET0
CPU_MMAP;RFC_MDM;VITBRMETRIC32
CPU_MMAP;RFC_MDM;VITBRMETRIC32;RESERVED16
CPU_MMAP;RFC_MDM;VITBRMETRIC32;MET3
CPU_MMAP;RFC_MDM;VITBRMETRIC32;MET2
CPU_MMAP;RFC_MDM;VITBRMETRIC54
CPU_MMAP;RFC_MDM;VITBRMETRIC54;RESERVED16
CPU_MMAP;RFC_MDM;VITBRMETRIC54;MET5
CPU_MMAP;RFC_MDM;VITBRMETRIC54;MET4
CPU_MMAP;RFC_MDM;VITBRMETRIC76
CPU_MMAP;RFC_MDM;VITBRMETRIC76;RESERVED16
CPU_MMAP;RFC_MDM;VITBRMETRIC76;MET7
CPU_MMAP;RFC_MDM;VITBRMETRIC76;MET6
CPU_MMAP;RFC_MDM;VITBRSEL0
CPU_MMAP;RFC_MDM;VITBRSEL0;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL0;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL0;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL0;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL0;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL0
CPU_MMAP;RFC_MDM;VITAPMSEL0;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL0;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL0;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL0;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL0;APM0MUX
CPU_MMAP;RFC_MDM;VITBRSEL1
CPU_MMAP;RFC_MDM;VITBRSEL1;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL1;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL1;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL1;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL1;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL1
CPU_MMAP;RFC_MDM;VITAPMSEL1;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL1;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL1;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL1;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL1;APM0MUX
CPU_MMAP;RFC_MDM;VITBRSEL2
CPU_MMAP;RFC_MDM;VITBRSEL2;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL2;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL2;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL2;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL2;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL2
CPU_MMAP;RFC_MDM;VITAPMSEL2;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL2;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL2;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL2;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL2;APM0MUX
CPU_MMAP;RFC_MDM;VITBRSEL3
CPU_MMAP;RFC_MDM;VITBRSEL3;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL3;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL3;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL3;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL3;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL3
CPU_MMAP;RFC_MDM;VITAPMSEL3;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL3;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL3;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL3;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL3;APM0MUX
CPU_MMAP;RFC_MDM;VITBRSEL4
CPU_MMAP;RFC_MDM;VITBRSEL4;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL4;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL4;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL4;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL4;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL4
CPU_MMAP;RFC_MDM;VITAPMSEL4;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL4;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL4;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL4;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL4;APM0MUX
CPU_MMAP;RFC_MDM;VITBRSEL5
CPU_MMAP;RFC_MDM;VITBRSEL5;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL5;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL5;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL5;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL5;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL5
CPU_MMAP;RFC_MDM;VITAPMSEL5;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL5;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL5;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL5;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL5;APM0MUX
CPU_MMAP;RFC_MDM;VITBRSEL6
CPU_MMAP;RFC_MDM;VITBRSEL6;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL6;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL6;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL6;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL6;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL6
CPU_MMAP;RFC_MDM;VITAPMSEL6;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL6;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL6;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL6;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL6;APM0MUX
CPU_MMAP;RFC_MDM;VITBRSEL7
CPU_MMAP;RFC_MDM;VITBRSEL7;RESERVED12
CPU_MMAP;RFC_MDM;VITBRSEL7;BR3MUX
CPU_MMAP;RFC_MDM;VITBRSEL7;BR2MUX
CPU_MMAP;RFC_MDM;VITBRSEL7;BR1MUX
CPU_MMAP;RFC_MDM;VITBRSEL7;BR0MUX
CPU_MMAP;RFC_MDM;VITAPMSEL7
CPU_MMAP;RFC_MDM;VITAPMSEL7;RESERVED12
CPU_MMAP;RFC_MDM;VITAPMSEL7;APM3MUX
CPU_MMAP;RFC_MDM;VITAPMSEL7;APM2MUX
CPU_MMAP;RFC_MDM;VITAPMSEL7;APM1MUX
CPU_MMAP;RFC_MDM;VITAPMSEL7;APM0MUX
CPU_MMAP;RFC_MDM;LOCMULTA
CPU_MMAP;RFC_MDM;LOCMULTA;RESERVED16
CPU_MMAP;RFC_MDM;LOCMULTA;AVALUE
CPU_MMAP;RFC_MDM;LOCMULTB
CPU_MMAP;RFC_MDM;LOCMULTB;RESERVED16
CPU_MMAP;RFC_MDM;LOCMULTB;BVALUE
CPU_MMAP;RFC_MDM;LOCMULTC0
CPU_MMAP;RFC_MDM;LOCMULTC0;RESERVED16
CPU_MMAP;RFC_MDM;LOCMULTC0;C15C0
CPU_MMAP;RFC_MDM;LOCMULTC1
CPU_MMAP;RFC_MDM;LOCMULTC1;RESERVED16
CPU_MMAP;RFC_MDM;LOCMULTC1;C31C16
CPU_MMAP;RFC_MDM;TIMCTRL
CPU_MMAP;RFC_MDM;TIMCTRL;RESERVED14
CPU_MMAP;RFC_MDM;TIMCTRL;CAPTURESOURCE
CPU_MMAP;RFC_MDM;TIMCTRL;ENABLECAPTURE
CPU_MMAP;RFC_MDM;TIMCTRL;ENABLECAPTURE;DIS
CPU_MMAP;RFC_MDM;TIMCTRL;ENABLECAPTURE;EN
CPU_MMAP;RFC_MDM;TIMCTRL;COUNTERSOURCE
CPU_MMAP;RFC_MDM;TIMCTRL;COUNTERSOURCE;CLK
CPU_MMAP;RFC_MDM;TIMCTRL;COUNTERSOURCE;CLKBAUD
CPU_MMAP;RFC_MDM;TIMCTRL;COUNTERSOURCE;CLK4BAUD
CPU_MMAP;RFC_MDM;TIMCTRL;COUNTERSOURCE;CLK4BAUDF
CPU_MMAP;RFC_MDM;TIMCTRL;CLEARCOUNTER
CPU_MMAP;RFC_MDM;TIMCTRL;ENABLECOUNTER
CPU_MMAP;RFC_MDM;TIMCTRL;TIMERSOURCE
CPU_MMAP;RFC_MDM;TIMCTRL;TIMERSOURCE;CLK
CPU_MMAP;RFC_MDM;TIMCTRL;TIMERSOURCE;CLKBAUD
CPU_MMAP;RFC_MDM;TIMCTRL;TIMERSOURCE;CLK4BAUD
CPU_MMAP;RFC_MDM;TIMCTRL;TIMERSOURCE;CLK4BAUDF
CPU_MMAP;RFC_MDM;TIMCTRL;ENABLETIMER
CPU_MMAP;RFC_MDM;TIMCTRL;ENABLETIMER;DIS
CPU_MMAP;RFC_MDM;TIMCTRL;ENABLETIMER;EN
CPU_MMAP;RFC_MDM;TIMINC
CPU_MMAP;RFC_MDM;TIMINC;RESERVED16
CPU_MMAP;RFC_MDM;TIMINC;INCUNIT
CPU_MMAP;RFC_MDM;TIMPERIOD
CPU_MMAP;RFC_MDM;TIMPERIOD;RESERVED16
CPU_MMAP;RFC_MDM;TIMPERIOD;PERIOD
CPU_MMAP;RFC_MDM;TIMCOUNTER
CPU_MMAP;RFC_MDM;TIMCOUNTER;RESERVED16
CPU_MMAP;RFC_MDM;TIMCOUNTER;VALUE
CPU_MMAP;RFC_MDM;TIMCAPT
CPU_MMAP;RFC_MDM;TIMCAPT;RESERVED16
CPU_MMAP;RFC_MDM;TIMCAPT;VALUE
CPU_MMAP;RFC_MDM;TIMEBASE
CPU_MMAP;RFC_MDM;TIMEBASE;RESERVED1
CPU_MMAP;RFC_MDM;TIMEBASE;FLUSH
CPU_MMAP;RFC_MDM;COUNT1IN
CPU_MMAP;RFC_MDM;COUNT1IN;RESERVED16
CPU_MMAP;RFC_MDM;COUNT1IN;VAL
CPU_MMAP;RFC_MDM;COUNT1RES
CPU_MMAP;RFC_MDM;COUNT1RES;RESERVED5
CPU_MMAP;RFC_MDM;COUNT1RES;COUNT
CPU_MMAP;RFC_MDM;BRMACC0
CPU_MMAP;RFC_MDM;BRMACC0;RESERVED16
CPU_MMAP;RFC_MDM;BRMACC0;SYM1ST
CPU_MMAP;RFC_MDM;BRMACC0;SYM2ND
CPU_MMAP;RFC_MDM;BRMACC1
CPU_MMAP;RFC_MDM;BRMACC1;RESERVED16
CPU_MMAP;RFC_MDM;BRMACC1;METRIC01
CPU_MMAP;RFC_MDM;BRMACC1;METRIC00
CPU_MMAP;RFC_MDM;BRMACC2
CPU_MMAP;RFC_MDM;BRMACC2;RESERVED16
CPU_MMAP;RFC_MDM;BRMACC2;METRIC11
CPU_MMAP;RFC_MDM;BRMACC2;METRIC10
CPU_MMAP;RFC_MDM;VITACCCTRL
CPU_MMAP;RFC_MDM;VITACCCTRL;RESERVED16
CPU_MMAP;RFC_MDM;VITACCCTRL;POLYNOM1
CPU_MMAP;RFC_MDM;VITACCCTRL;POLYNOM0
CPU_MMAP;RFC_MDM;VITACCCTRL;CODELENGTH
CPU_MMAP;RFC_MDM;VITACCCTRL;CODELENGTH;K5
CPU_MMAP;RFC_MDM;VITACCCTRL;CODELENGTH;K6
CPU_MMAP;RFC_MDM;VITACCCTRL;CODELENGTH;K7
CPU_MMAP;RFC_MDM;VITACCRDBIT
CPU_MMAP;RFC_MDM;VITACCRDBIT;RESERVED1
CPU_MMAP;RFC_MDM;VITACCRDBIT;RXBIT
CPU_MMAP;RFC_MDM;MCETRCSEND
CPU_MMAP;RFC_MDM;MCETRCSEND;RESERVED1
CPU_MMAP;RFC_MDM;MCETRCSEND;SEND
CPU_MMAP;RFC_MDM;MCETRCBUSY
CPU_MMAP;RFC_MDM;MCETRCBUSY;RESERVED1
CPU_MMAP;RFC_MDM;MCETRCBUSY;BUSY
CPU_MMAP;RFC_MDM;MCETRCCMD
CPU_MMAP;RFC_MDM;MCETRCCMD;RESERVED10
CPU_MMAP;RFC_MDM;MCETRCCMD;PARCNT
CPU_MMAP;RFC_MDM;MCETRCCMD;PKTHDR
CPU_MMAP;RFC_MDM;MCETRCPAR0
CPU_MMAP;RFC_MDM;MCETRCPAR0;RESERVED16
CPU_MMAP;RFC_MDM;MCETRCPAR0;PAR0
CPU_MMAP;RFC_MDM;MCETRCPAR1
CPU_MMAP;RFC_MDM;MCETRCPAR1;RESERVED16
CPU_MMAP;RFC_MDM;MCETRCPAR1;PAR1
CPU_MMAP;RFC_MDM;RDCAPT0
CPU_MMAP;RFC_MDM;RDCAPT0;RESERVED16
CPU_MMAP;RFC_MDM;RDCAPT0;DEMDSBU1
CPU_MMAP;RFC_MDM;RDCAPT0;DEMC1BEX
CPU_MMAP;RFC_MDM;RDCAPT0;DEMSOFD0
CPU_MMAP;RFC_MDM;RDCAPT0;DEMLQIE0
CPU_MMAP;RFC_MDM;RDCAPT0;DEMSTIM1
CPU_MMAP;RFC_MDM;RDCAPT0;DEMSTIM0
CPU_MMAP;RFC_MDM;RDCAPT0;DEMFIFE2
CPU_MMAP;RFC_MDM;RDCAPT0;DEMPDIF0
CPU_MMAP;RFC_MDM;RDCAPT0;DEMCA2P0
CPU_MMAP;RFC_MDM;RDCAPT0;DEMFIDC4
CPU_MMAP;RFC_MDM;RDCAPT0;DEMFIDC3
CPU_MMAP;RFC_MDM;RDCAPT0;DEMMGEX2
CPU_MMAP;RFC_MDM;RDCAPT0;DEMMGEX1
CPU_MMAP;RFC_MDM;RDCAPT0;DEMDSBU0
CPU_MMAP;RFC_MDM;RDCAPT0;DEMCODC4
CPU_MMAP;RFC_MDM;RDCAPT0;DEMCODC3
CPU_MMAP;RFC_MDM;DEMCODC3
CPU_MMAP;RFC_MDM;DEMCODC3;RESERVED13
CPU_MMAP;RFC_MDM;DEMCODC3;ESTOUTI
CPU_MMAP;RFC_MDM;DEMCODC4
CPU_MMAP;RFC_MDM;DEMCODC4;RESERVED13
CPU_MMAP;RFC_MDM;DEMCODC4;ESTOUTQ
CPU_MMAP;RFC_MDM;DEMMGEX1
CPU_MMAP;RFC_MDM;DEMMGEX1;RESERVED13
CPU_MMAP;RFC_MDM;DEMMGEX1;MGE1ESTOUT
CPU_MMAP;RFC_MDM;DEMMGEX2
CPU_MMAP;RFC_MDM;DEMMGEX2;RESERVED13
CPU_MMAP;RFC_MDM;DEMMGEX2;MGE2ESTOUT
CPU_MMAP;RFC_MDM;DEMFIDC3
CPU_MMAP;RFC_MDM;DEMFIDC3;RESERVED13
CPU_MMAP;RFC_MDM;DEMFIDC3;ESTOUTI
CPU_MMAP;RFC_MDM;DEMFIDC4
CPU_MMAP;RFC_MDM;DEMFIDC4;RESERVED13
CPU_MMAP;RFC_MDM;DEMFIDC4;ESTOUTQ
CPU_MMAP;RFC_MDM;DEMCA2P0
CPU_MMAP;RFC_MDM;DEMCA2P0;RESERVED9
CPU_MMAP;RFC_MDM;DEMCA2P0;PHASE
CPU_MMAP;RFC_MDM;DEMPDIF0
CPU_MMAP;RFC_MDM;DEMPDIF0;RESERVED8
CPU_MMAP;RFC_MDM;DEMPDIF0;PDIFF
CPU_MMAP;RFC_MDM;DEMC1BE3
CPU_MMAP;RFC_MDM;DEMC1BE3;RESERVED16
CPU_MMAP;RFC_MDM;DEMC1BE3;CORRVALUEA
CPU_MMAP;RFC_MDM;DEMC1BE4
CPU_MMAP;RFC_MDM;DEMC1BE4;RESERVED16
CPU_MMAP;RFC_MDM;DEMC1BE4;CORRVALUEB
CPU_MMAP;RFC_MDM;DEMC1BE5
CPU_MMAP;RFC_MDM;DEMC1BE5;RESERVED16
CPU_MMAP;RFC_MDM;DEMC1BE5;CORRVALUEC
CPU_MMAP;RFC_MDM;DEMFIFE2
CPU_MMAP;RFC_MDM;DEMFIFE2;RESERVED8
CPU_MMAP;RFC_MDM;DEMFIFE2;FINEFOCEST
CPU_MMAP;RFC_MDM;DEMDSBU0
CPU_MMAP;RFC_MDM;DEMDSBU0;RESERVED16
CPU_MMAP;RFC_MDM;DEMDSBU0;WRPOUT
CPU_MMAP;RFC_MDM;DEMDSBU0;RDPOUT
CPU_MMAP;RFC_MDM;DEMDSBU1
CPU_MMAP;RFC_MDM;DEMDSBU1;RESERVED16
CPU_MMAP;RFC_MDM;DEMDSBU1;AVGVAL
CPU_MMAP;RFC_MDM;DEMSTIM0
CPU_MMAP;RFC_MDM;DEMSTIM0;RESERVED6
CPU_MMAP;RFC_MDM;DEMSTIM0;EVENTS
CPU_MMAP;RFC_MDM;DEMSTIM1
CPU_MMAP;RFC_MDM;DEMSTIM1;RESERVED14
CPU_MMAP;RFC_MDM;DEMSTIM1;GARDNERERROR
CPU_MMAP;RFC_MDM;DEMSTIM1;DELTA
CPU_MMAP;RFC_MDM;DEMSWQU1
CPU_MMAP;RFC_MDM;DEMSWQU1;RESERVED10
CPU_MMAP;RFC_MDM;DEMSWQU1;MAFCCOMPVAL
CPU_MMAP;RFC_MDM;DEMSWQU1;SWSEL
CPU_MMAP;RFC_MDM;DEMSWQU1;SWSEL;A
CPU_MMAP;RFC_MDM;DEMSWQU1;SWSEL;B
CPU_MMAP;RFC_MDM;DEMSWQU1;SYNCED
CPU_MMAP;RFC_MDM;DEMLQIE0
CPU_MMAP;RFC_MDM;DEMLQIE0;RESERVED8
CPU_MMAP;RFC_MDM;DEMLQIE0;LQI
CPU_MMAP;RFC_MDM;DEMSOFD0
CPU_MMAP;RFC_MDM;DEMSOFD0;RESERVED8
CPU_MMAP;RFC_MDM;DEMSOFD0;SOFTSYMBOL
CPU_MMAP;RFC_MDM;RDCAPT1
CPU_MMAP;RFC_MDM;RDCAPT1;RESERVED9
CPU_MMAP;RFC_MDM;RDCAPT1;DEMPNSOFT
CPU_MMAP;RFC_MDM;RDCAPT1;DEMMLSEBIT
CPU_MMAP;RFC_MDM;RDCAPT1;DEMTHRD4
CPU_MMAP;RFC_MDM;RDCAPT1;DEMBDEC0
CPU_MMAP;RFC_MDM;RDCAPT1;DEMBDEC1
CPU_MMAP;RFC_MDM;RDCAPT1;DEMCHFI0
CPU_MMAP;RFC_MDM;RDCAPT1;DEMCHFI1
CPU_MMAP;RFC_MDM;RDCAPT1;DEMFRAC4
CPU_MMAP;RFC_MDM;RDCAPT1;DEMFRAC5
CPU_MMAP;RFC_MDM;DEMTHRD4
CPU_MMAP;RFC_MDM;DEMTHRD4;RESERVED4
CPU_MMAP;RFC_MDM;DEMTHRD4;DECISION
CPU_MMAP;RFC_MDM;DEMMLSEBIT
CPU_MMAP;RFC_MDM;DEMMLSEBIT;RESERVED1
CPU_MMAP;RFC_MDM;DEMMLSEBIT;MLSEBIT
CPU_MMAP;RFC_MDM;DEMBDEC0
CPU_MMAP;RFC_MDM;DEMBDEC0;RESERVED13
CPU_MMAP;RFC_MDM;DEMBDEC0;IVAL
CPU_MMAP;RFC_MDM;DEMBDEC1
CPU_MMAP;RFC_MDM;DEMBDEC1;RESERVED13
CPU_MMAP;RFC_MDM;DEMBDEC1;QVAL
CPU_MMAP;RFC_MDM;DEMCHFI0
CPU_MMAP;RFC_MDM;DEMCHFI0;RESERVED13
CPU_MMAP;RFC_MDM;DEMCHFI0;IVAL
CPU_MMAP;RFC_MDM;DEMCHFI1
CPU_MMAP;RFC_MDM;DEMCHFI1;RESERVED13
CPU_MMAP;RFC_MDM;DEMCHFI1;QVAL
CPU_MMAP;RFC_MDM;DEMFRAC4
CPU_MMAP;RFC_MDM;DEMFRAC4;RESERVED13
CPU_MMAP;RFC_MDM;DEMFRAC4;IVAL
CPU_MMAP;RFC_MDM;DEMFRAC5
CPU_MMAP;RFC_MDM;DEMFRAC5;RESERVED13
CPU_MMAP;RFC_MDM;DEMFRAC5;QVAL
CPU_MMAP;RFC_MDM;DEMPNSOFT
CPU_MMAP;RFC_MDM;DEMPNSOFT;RESERVED8
CPU_MMAP;RFC_MDM;DEMPNSOFT;PNSOFT
CPU_MMAP;RFC_MDM;DEMC1BE6
CPU_MMAP;RFC_MDM;DEMC1BE6;RESERVED8
CPU_MMAP;RFC_MDM;DEMC1BE6;VAL
CPU_MMAP;RFC_MDM;DEMC1BE7
CPU_MMAP;RFC_MDM;DEMC1BE7;RESERVED8
CPU_MMAP;RFC_MDM;DEMC1BE7;VAL
CPU_MMAP;RFC_MDM;DEMC1BE8
CPU_MMAP;RFC_MDM;DEMC1BE8;RESERVED8
CPU_MMAP;RFC_MDM;DEMC1BE8;VAL
CPU_MMAP;RFC_MDM;DEMC1BE9
CPU_MMAP;RFC_MDM;DEMC1BE9;RESERVED8
CPU_MMAP;RFC_MDM;DEMC1BE9;VAL
CPU_MMAP;RFC_MDM;DEMC1BEA
CPU_MMAP;RFC_MDM;DEMC1BEA;RESERVED12
CPU_MMAP;RFC_MDM;DEMC1BEA;QUALB
CPU_MMAP;RFC_MDM;DEMC1BEA;QUALA
CPU_MMAP;RFC_MDM;MDMSPAR0
CPU_MMAP;RFC_MDM;MDMSPAR0;RESERVED16
CPU_MMAP;RFC_MDM;MDMSPAR0;VAL
CPU_MMAP;RFC_MDM;MDMSPAR1
CPU_MMAP;RFC_MDM;MDMSPAR1;RESERVED16
CPU_MMAP;RFC_MDM;MDMSPAR1;VAL
CPU_MMAP;RFC_MDM;MDMSPAR2
CPU_MMAP;RFC_MDM;MDMSPAR2;RESERVED16
CPU_MMAP;RFC_MDM;MDMSPAR2;VAL
CPU_MMAP;RFC_MDM;MDMSPAR3
CPU_MMAP;RFC_MDM;MDMSPAR3;RESERVED16
CPU_MMAP;RFC_MDM;MDMSPAR3;VAL
CPU_MMAP;RFC_MDM;DEMSOFD1
CPU_MMAP;RFC_MDM;DEMSOFD1;RESERVED8
CPU_MMAP;RFC_MDM;DEMSOFD1;SOFTX0
CPU_MMAP;RFC_MDM;DEMSOFD2
CPU_MMAP;RFC_MDM;DEMSOFD2;RESERVED8
CPU_MMAP;RFC_MDM;DEMSOFD2;SOFTX1
CPU_MMAP;RFC_MDM;DEMSOFD3
CPU_MMAP;RFC_MDM;DEMSOFD3;RESERVED8
CPU_MMAP;RFC_MDM;DEMSOFD3;SOFTX2
CPU_MMAP;RFC_MDM;DEMSOFD4
CPU_MMAP;RFC_MDM;DEMSOFD4;RESERVED8
CPU_MMAP;RFC_MDM;DEMSOFD4;SOFTX3
CPU_MMAP;RFC_RFE
CPU_MMAP;RFC_RFE;RFEENABLE
CPU_MMAP;RFC_RFE;RFEENABLE;RESERVED4
CPU_MMAP;RFC_RFE;RFEENABLE;ACC1
CPU_MMAP;RFC_RFE;RFEENABLE;ACC0
CPU_MMAP;RFC_RFE;RFEENABLE;LOC_TIM
CPU_MMAP;RFC_RFE;RFEENABLE;TOPSM
CPU_MMAP;RFC_RFE;RFEINIT
CPU_MMAP;RFC_RFE;RFEINIT;RESERVED4
CPU_MMAP;RFC_RFE;RFEINIT;ACC1
CPU_MMAP;RFC_RFE;RFEINIT;ACC0
CPU_MMAP;RFC_RFE;RFEINIT;LOC_TIM
CPU_MMAP;RFC_RFE;RFEINIT;TOPSM
CPU_MMAP;RFC_RFE;RFEPDREQ
CPU_MMAP;RFC_RFE;RFEPDREQ;RESERVED1
CPU_MMAP;RFC_RFE;RFEPDREQ;TOPSMPDREQ
CPU_MMAP;RFC_RFE;RFESTROBES0
CPU_MMAP;RFC_RFE;RFESTROBES0;RESERVED4
CPU_MMAP;RFC_RFE;RFESTROBES0;EVENT2
CPU_MMAP;RFC_RFE;RFESTROBES0;EVENT1
CPU_MMAP;RFC_RFE;RFESTROBES0;EVENT0
CPU_MMAP;RFC_RFE;RFESTROBES0;CMDDONE
CPU_MMAP;RFC_RFE;RFEEVENT0
CPU_MMAP;RFC_RFE;RFEEVENT0;RESERVED16
CPU_MMAP;RFC_RFE;RFEEVENT0;EVENT
CPU_MMAP;RFC_RFE;RFEEVENTMSK0
CPU_MMAP;RFC_RFE;RFEEVENTMSK0;RESERVED16
CPU_MMAP;RFC_RFE;RFEEVENTMSK0;EVENTMSK
CPU_MMAP;RFC_RFE;RFEEVENTCLR0
CPU_MMAP;RFC_RFE;RFEEVENTCLR0;RESERVED16
CPU_MMAP;RFC_RFE;RFEEVENTCLR0;EVENTCLR
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;RESERVED4
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;ROMBANK
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;ROMBANK;B0
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;ROMBANK;B1
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;ROMBANK;B2
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;ROMBANK;B3
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;ROMBANK;B4
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;ROMBANK;B5
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;RAMROM
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;RAMROM;ROM
CPU_MMAP;RFC_RFE;RFEPROGRAMSRC;RAMROM;RAM
CPU_MMAP;RFC_RFE;RFEAPI
CPU_MMAP;RFC_RFE;RFEAPI;RESERVED5
CPU_MMAP;RFC_RFE;RFEAPI;RFECMD
CPU_MMAP;RFC_RFE;RFECMDPAR0
CPU_MMAP;RFC_RFE;RFECMDPAR0;RESERVED16
CPU_MMAP;RFC_RFE;RFECMDPAR0;PAR0
CPU_MMAP;RFC_RFE;RFECMDPAR1
CPU_MMAP;RFC_RFE;RFECMDPAR1;RESERVED16
CPU_MMAP;RFC_RFE;RFECMDPAR1;PAR1
CPU_MMAP;RFC_RFE;RFEMSGBOX
CPU_MMAP;RFC_RFE;RFEMSGBOX;RESERVED16
CPU_MMAP;RFC_RFE;RFEMSGBOX;MSG
CPU_MMAP;RFC_RFE;RFECPEIRQ
CPU_MMAP;RFC_RFE;RFECPEIRQ;RESERVED2
CPU_MMAP;RFC_RFE;RFECPEIRQ;CMDSTACHG
CPU_MMAP;RFC_RFE;RFECPEIRQ;MSGBOX
CPU_MMAP;RFC_RFE;RFECPEIRQMSK
CPU_MMAP;RFC_RFE;RFECPEIRQMSK;RESERVED2
CPU_MMAP;RFC_RFE;RFECPEIRQMSK;CMDSTACHGMSK
CPU_MMAP;RFC_RFE;RFECPEIRQMSK;MSGBOXMSK
CPU_MMAP;RFC_RFE;MCESEND
CPU_MMAP;RFC_RFE;MCESEND;RESERVED16
CPU_MMAP;RFC_RFE;MCESEND;RFECMD
CPU_MMAP;RFC_RFE;MCERCEV
CPU_MMAP;RFC_RFE;MCERCEV;RESERVED16
CPU_MMAP;RFC_RFE;MCERCEV;MCECMD
CPU_MMAP;RFC_RFE;ADI0CTL
CPU_MMAP;RFC_RFE;ADI0CTL;RESERVED2
CPU_MMAP;RFC_RFE;ADI0CTL;WRSIZE
CPU_MMAP;RFC_RFE;ADI0CTL;WRSIZE;FULL
CPU_MMAP;RFC_RFE;ADI0CTL;WRSIZE;HALF
CPU_MMAP;RFC_RFE;ADI0CTL;WREN
CPU_MMAP;RFC_RFE;ADI0CTL;WREN;READ
CPU_MMAP;RFC_RFE;ADI0CTL;WREN;WRITE
CPU_MMAP;RFC_RFE;ADI0CLK
CPU_MMAP;RFC_RFE;ADI0CLK;RESERVED1
CPU_MMAP;RFC_RFE;ADI0CLK;CLK
CPU_MMAP;RFC_RFE;ADI0CLRREQ
CPU_MMAP;RFC_RFE;ADI0CLRREQ;RESERVED1
CPU_MMAP;RFC_RFE;ADI0CLRREQ;REQ0
CPU_MMAP;RFC_RFE;ADI0ADDRWRDATA
CPU_MMAP;RFC_RFE;ADI0ADDRWRDATA;RESERVED14
CPU_MMAP;RFC_RFE;ADI0ADDRWRDATA;ADDR
CPU_MMAP;RFC_RFE;ADI0ADDRWRDATA;WRDATA
CPU_MMAP;RFC_RFE;ADI0RD
CPU_MMAP;RFC_RFE;ADI0RD;RESERVED5
CPU_MMAP;RFC_RFE;ADI0RD;ACK
CPU_MMAP;RFC_RFE;ADI0RD;RDDATA
CPU_MMAP;RFC_RFE;RSSIOFFSET
CPU_MMAP;RFC_RFE;RSSIOFFSET;RESERVED8
CPU_MMAP;RFC_RFE;RSSIOFFSET;OFFSET
CPU_MMAP;RFC_RFE;RSSIVAL
CPU_MMAP;RFC_RFE;RSSIVAL;RESERVED8
CPU_MMAP;RFC_RFE;RSSIVAL;VALUE
CPU_MMAP;RFC_RFE;RSSIMAXVAL
CPU_MMAP;RFC_RFE;RSSIMAXVAL;RESERVED8
CPU_MMAP;RFC_RFE;RSSIMAXVAL;VALUE
CPU_MMAP;RFC_RFE;MAGNCTRL0
CPU_MMAP;RFC_RFE;MAGNCTRL0;RESERVED13
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0PERMODE
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0PERMODE;ONESHOT
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0PERMODE;PERIODIC
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV1
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV2
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV4
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV8
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV16
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV32
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV64
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV128
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0SCALE;DIV256
CPU_MMAP;RFC_RFE;MAGNCTRL0;ACC0PERIOD
CPU_MMAP;RFC_RFE;MAGNCTRL1
CPU_MMAP;RFC_RFE;MAGNCTRL1;RESERVED13
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1PERMODE
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1PERMODE;ONESHOT
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1PERMODE;PERIODIC
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV1
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV2
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV4
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV8
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV16
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV32
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV64
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV128
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1SCALE;DIV256
CPU_MMAP;RFC_RFE;MAGNCTRL1;ACC1PERIOD
CPU_MMAP;RFC_RFE;MAGNACC0
CPU_MMAP;RFC_RFE;MAGNACC0;RESERVED16
CPU_MMAP;RFC_RFE;MAGNACC0;ACCVAL
CPU_MMAP;RFC_RFE;MAGNACC1
CPU_MMAP;RFC_RFE;MAGNACC1;RESERVED16
CPU_MMAP;RFC_RFE;MAGNACC1;ACCVAL
CPU_MMAP;RFC_RFE;MATHACCELIN
CPU_MMAP;RFC_RFE;MATHACCELIN;RESERVED16
CPU_MMAP;RFC_RFE;MATHACCELIN;VAL
CPU_MMAP;RFC_RFE;LIN2LOGOUT
CPU_MMAP;RFC_RFE;LIN2LOGOUT;RESERVED7
CPU_MMAP;RFC_RFE;LIN2LOGOUT;LOGVAL
CPU_MMAP;RFC_RFE;DIVBY3OUT
CPU_MMAP;RFC_RFE;DIVBY3OUT;RESERVED4
CPU_MMAP;RFC_RFE;DIVBY3OUT;DIV3
CPU_MMAP;RFC_RFE;GAINCTRL
CPU_MMAP;RFC_RFE;GAINCTRL;RESERVED4
CPU_MMAP;RFC_RFE;GAINCTRL;BDE1DVGA
CPU_MMAP;RFC_RFE;GAINCTRL;BDE1DVGA;GAIN1
CPU_MMAP;RFC_RFE;GAINCTRL;BDE1DVGA;GAIN2
CPU_MMAP;RFC_RFE;GAINCTRL;BDE1DVGA;GAIN4
CPU_MMAP;RFC_RFE;GAINCTRL;BDE1DVGA;GAIN8
CPU_MMAP;RFC_RFE;GAINCTRL;BDE2DVGA
CPU_MMAP;RFC_RFE;GAINCTRL;BDE2DVGA;GAIN1
CPU_MMAP;RFC_RFE;GAINCTRL;BDE2DVGA;GAIN2
CPU_MMAP;RFC_RFE;GAINCTRL;BDE2DVGA;GAIN4
CPU_MMAP;RFC_RFE;GAINCTRL;BDE2DVGA;GAIN8
CPU_MMAP;RFC_RFE;RFGAIN
CPU_MMAP;RFC_RFE;RFGAIN;RESERVED8
CPU_MMAP;RFC_RFE;RFGAIN;DBGAIN
CPU_MMAP;RFC_RFE;SPARE0
CPU_MMAP;RFC_RFE;SPARE0;RESERVED16
CPU_MMAP;RFC_RFE;SPARE0;VAL
CPU_MMAP;RFC_RFE;SPARE1
CPU_MMAP;RFC_RFE;SPARE1;RESERVED16
CPU_MMAP;RFC_RFE;SPARE1;VAL
CPU_MMAP;RFC_RFE;SPARE2
CPU_MMAP;RFC_RFE;SPARE2;RESERVED16
CPU_MMAP;RFC_RFE;SPARE2;VAL
CPU_MMAP;RFC_RFE;SPARE3
CPU_MMAP;RFC_RFE;SPARE3;RESERVED16
CPU_MMAP;RFC_RFE;SPARE3;VAL
CPU_MMAP;RFC_RFE;SPARE4
CPU_MMAP;RFC_RFE;SPARE4;RESERVED16
CPU_MMAP;RFC_RFE;SPARE4;VAL
CPU_MMAP;RFC_RFE;SPARE5
CPU_MMAP;RFC_RFE;SPARE5;RESERVED16
CPU_MMAP;RFC_RFE;SPARE5;VAL
CPU_MMAP;RFC_RFE;RFETIMCTRL
CPU_MMAP;RFC_RFE;RFETIMCTRL;RESERVED14
CPU_MMAP;RFC_RFE;RFETIMCTRL;CAPTURESOURCE
CPU_MMAP;RFC_RFE;RFETIMCTRL;ENABLECAPTURE
CPU_MMAP;RFC_RFE;RFETIMCTRL;ENABLECAPTURE;DIS
CPU_MMAP;RFC_RFE;RFETIMCTRL;ENABLECAPTURE;EN
CPU_MMAP;RFC_RFE;RFETIMCTRL;COUNTERSOURCE
CPU_MMAP;RFC_RFE;RFETIMCTRL;COUNTERSOURCE;CLK
CPU_MMAP;RFC_RFE;RFETIMCTRL;COUNTERSOURCE;MAGN0
CPU_MMAP;RFC_RFE;RFETIMCTRL;COUNTERSOURCE;MAGN1
CPU_MMAP;RFC_RFE;RFETIMCTRL;COUNTERSOURCE;OFF
CPU_MMAP;RFC_RFE;RFETIMCTRL;CLEARCOUNTER
CPU_MMAP;RFC_RFE;RFETIMCTRL;ENABLECOUNTER
CPU_MMAP;RFC_RFE;RFETIMCTRL;TIMERSOURCE
CPU_MMAP;RFC_RFE;RFETIMCTRL;TIMERSOURCE;CLK
CPU_MMAP;RFC_RFE;RFETIMCTRL;TIMERSOURCE;MAGN0
CPU_MMAP;RFC_RFE;RFETIMCTRL;TIMERSOURCE;MAGN1
CPU_MMAP;RFC_RFE;RFETIMCTRL;TIMERSOURCE;OFF
CPU_MMAP;RFC_RFE;RFETIMCTRL;ENABLETIMER
CPU_MMAP;RFC_RFE;RFETIMCTRL;ENABLETIMER;DIS
CPU_MMAP;RFC_RFE;RFETIMCTRL;ENABLETIMER;EN
CPU_MMAP;RFC_RFE;RFETIMINC
CPU_MMAP;RFC_RFE;RFETIMINC;RESERVED16
CPU_MMAP;RFC_RFE;RFETIMINC;INCUNIT
CPU_MMAP;RFC_RFE;RFETIMPERIOD
CPU_MMAP;RFC_RFE;RFETIMPERIOD;RESERVED16
CPU_MMAP;RFC_RFE;RFETIMPERIOD;PERIOD
CPU_MMAP;RFC_RFE;RFETIMCOUNTER
CPU_MMAP;RFC_RFE;RFETIMCOUNTER;RESERVED16
CPU_MMAP;RFC_RFE;RFETIMCOUNTER;VALUE
CPU_MMAP;RFC_RFE;RFETIMCAPT
CPU_MMAP;RFC_RFE;RFETIMCAPT;RESERVED16
CPU_MMAP;RFC_RFE;RFETIMCAPT;VALUE
CPU_MMAP;RFC_RFE;RFETRCSEND
CPU_MMAP;RFC_RFE;RFETRCSEND;RESERVED1
CPU_MMAP;RFC_RFE;RFETRCSEND;SEND
CPU_MMAP;RFC_RFE;RFETRCBUSY
CPU_MMAP;RFC_RFE;RFETRCBUSY;RESERVED1
CPU_MMAP;RFC_RFE;RFETRCBUSY;BUSY
CPU_MMAP;RFC_RFE;RFETRCCMD
CPU_MMAP;RFC_RFE;RFETRCCMD;RESERVED10
CPU_MMAP;RFC_RFE;RFETRCCMD;PARCNT
CPU_MMAP;RFC_RFE;RFETRCCMD;PKTHDR
CPU_MMAP;RFC_RFE;RFETRCPAR0
CPU_MMAP;RFC_RFE;RFETRCPAR0;RESERVED16
CPU_MMAP;RFC_RFE;RFETRCPAR0;PAR0
CPU_MMAP;RFC_RFE;RFETRCPAR1
CPU_MMAP;RFC_RFE;RFETRCPAR1;RESERVED16
CPU_MMAP;RFC_RFE;RFETRCPAR1;PAR1
CPU_MMAP;RFC_TRC
CPU_MMAP;RFC_TRC;TRCCFG
CPU_MMAP;RFC_TRC;TRCCFG;RESERVED8
CPU_MMAP;RFC_TRC;TRCCFG;PRESCAL
CPU_MMAP;RFC_TRC;TRCCFG;PRESCAL;DIV1
CPU_MMAP;RFC_TRC;TRCCFG;PRESCAL;DIV2
CPU_MMAP;RFC_TRC;TRCCFG;PRESCAL;DIV3
CPU_MMAP;RFC_TRC;TRCCFG;PRESCAL;DIV4
CPU_MMAP;RFC_TRC;TRCCFG;TSCLR
CPU_MMAP;RFC_TRC;TRCCFG;TSEN
CPU_MMAP;RFC_TRC;TRCCFG;CH3EN
CPU_MMAP;RFC_TRC;TRCCFG;CH3EN;OFF
CPU_MMAP;RFC_TRC;TRCCFG;CH3EN;ENABLED
CPU_MMAP;RFC_TRC;TRCCFG;CH2EN
CPU_MMAP;RFC_TRC;TRCCFG;CH2EN;OFF
CPU_MMAP;RFC_TRC;TRCCFG;CH2EN;NORM
CPU_MMAP;RFC_TRC;TRCCFG;CH2EN;TOPSM
CPU_MMAP;RFC_TRC;TRCCFG;CH1EN
CPU_MMAP;RFC_TRC;TRCCFG;CH1EN;OFF
CPU_MMAP;RFC_TRC;TRCCFG;CH1EN;ENABLED
CPU_MMAP;RFC_TRC;TRCCH1CMD
CPU_MMAP;RFC_TRC;TRCCH1CMD;RESERVED16
CPU_MMAP;RFC_TRC;TRCCH1CMD;CH1PKTHDR
CPU_MMAP;RFC_TRC;TRCCH1CMD;RESERVED3
CPU_MMAP;RFC_TRC;TRCCH1CMD;CH1PARCNT
CPU_MMAP;RFC_TRC;TRCCH2CMD
CPU_MMAP;RFC_TRC;TRCCH2CMD;RESERVED16
CPU_MMAP;RFC_TRC;TRCCH2CMD;CH2PKTHDR
CPU_MMAP;RFC_TRC;TRCCH2CMD;RESERVED3
CPU_MMAP;RFC_TRC;TRCCH2CMD;CH2PARCNT
CPU_MMAP;RFC_TRC;TRCCH3CMD
CPU_MMAP;RFC_TRC;TRCCH3CMD;RESERVED16
CPU_MMAP;RFC_TRC;TRCCH3CMD;CH3PKTHDR
CPU_MMAP;RFC_TRC;TRCCH3CMD;RESERVED3
CPU_MMAP;RFC_TRC;TRCCH3CMD;CH3PARCNT
CPU_MMAP;RFC_TRC;TRCCH1PAR01
CPU_MMAP;RFC_TRC;TRCCH1PAR01;CH1PAR1
CPU_MMAP;RFC_TRC;TRCCH1PAR01;CH1PAR0
CPU_MMAP;RFC_TRC;TRCCH2PAR01
CPU_MMAP;RFC_TRC;TRCCH2PAR01;CH2PAR1
CPU_MMAP;RFC_TRC;TRCCH2PAR01;CH2PAR0
CPU_MMAP;RFC_TRC;TRCCH3PAR01
CPU_MMAP;RFC_TRC;TRCCH3PAR01;CH3PAR1
CPU_MMAP;RFC_TRC;TRCCH3PAR01;CH3PAR0
CPU_MMAP;RFC_TRC;TRCCH1PAR23
CPU_MMAP;RFC_TRC;TRCCH1PAR23;CH1PAR3
CPU_MMAP;RFC_TRC;TRCCH1PAR23;CH1PAR2
CPU_MMAP;RFC_TRC;TRCCH2PAR23
CPU_MMAP;RFC_TRC;TRCCH2PAR23;CH2PAR3
CPU_MMAP;RFC_TRC;TRCCH2PAR23;CH2PAR2
CPU_MMAP;RFC_TRC;TRCCH3PAR23
CPU_MMAP;RFC_TRC;TRCCH3PAR23;CH3PAR3
CPU_MMAP;RFC_TRC;TRCCH3PAR23;CH3PAR2
CPU_MMAP;RFC_S2R
CPU_MMAP;RFC_S2R;S2RCFG
CPU_MMAP;RFC_S2R;S2RCFG;RESERVED6
CPU_MMAP;RFC_S2R;S2RCFG;TRIGGER
CPU_MMAP;RFC_S2R;S2RCFG;TRIGGERMODE
CPU_MMAP;RFC_S2R;S2RCFG;TRIGGERMODE;ONESHOT
CPU_MMAP;RFC_S2R;S2RCFG;TRIGGERMODE;PERIODIC
CPU_MMAP;RFC_S2R;S2RCFG;TRIGGERMODE;ONEVENT
CPU_MMAP;RFC_S2R;S2RCFG;SELECT
CPU_MMAP;RFC_S2R;S2RCFG;SELECT;SYNTH
CPU_MMAP;RFC_S2R;S2RCFG;SELECT;ADCDIG
CPU_MMAP;RFC_S2R;S2RCFG;SELECT;FRONTEND
CPU_MMAP;RFC_S2R;S2RCFG;SELECT;DECSTAGE
CPU_MMAP;RFC_S2R;S2RCFG;ENABLED
CPU_MMAP;RFC_S2R;S2RSTART
CPU_MMAP;RFC_S2R;S2RSTART;RESERVED11
CPU_MMAP;RFC_S2R;S2RSTART;START
CPU_MMAP;RFC_S2R;S2RSTOP
CPU_MMAP;RFC_S2R;S2RSTOP;RESERVED11
CPU_MMAP;RFC_S2R;S2RSTOP;STOP
CPU_MMAP;RFC_S2R;S2RON
CPU_MMAP;RFC_S2R;S2RON;RESERVED27
CPU_MMAP;RFC_S2R;S2RON;ADDRCNT
CPU_MMAP;RFC_S2R;S2RON;RESERVED1
CPU_MMAP;RFC_S2R;S2RON;RUNNING
CPU_MMAP;WDT
CPU_MMAP;WDT;LOAD
CPU_MMAP;WDT;LOAD;WDTLOAD
CPU_MMAP;WDT;VALUE
CPU_MMAP;WDT;VALUE;WDTVALUE
CPU_MMAP;WDT;CTL
CPU_MMAP;WDT;CTL;RESERVED3
CPU_MMAP;WDT;CTL;INTTYPE
CPU_MMAP;WDT;CTL;INTTYPE;MASKABLE
CPU_MMAP;WDT;CTL;INTTYPE;NONMASKABLE
CPU_MMAP;WDT;CTL;RESEN
CPU_MMAP;WDT;CTL;RESEN;DIS
CPU_MMAP;WDT;CTL;RESEN;EN
CPU_MMAP;WDT;CTL;INTEN
CPU_MMAP;WDT;CTL;INTEN;DIS
CPU_MMAP;WDT;CTL;INTEN;EN
CPU_MMAP;WDT;ICR
CPU_MMAP;WDT;ICR;WDTICR
CPU_MMAP;WDT;RIS
CPU_MMAP;WDT;RIS;RESERVED1
CPU_MMAP;WDT;RIS;WDTRIS
CPU_MMAP;WDT;MIS
CPU_MMAP;WDT;MIS;RESERVED1
CPU_MMAP;WDT;MIS;WDTMIS
CPU_MMAP;WDT;TEST
CPU_MMAP;WDT;TEST;RESERVED9
CPU_MMAP;WDT;TEST;STALL
CPU_MMAP;WDT;TEST;STALL;DIS
CPU_MMAP;WDT;TEST;STALL;EN
CPU_MMAP;WDT;TEST;RESERVED1
CPU_MMAP;WDT;TEST;TEST_EN
CPU_MMAP;WDT;TEST;TEST_EN;DIS
CPU_MMAP;WDT;TEST;TEST_EN;EN
CPU_MMAP;WDT;INT_CAUS
CPU_MMAP;WDT;INT_CAUS;RESERVED2
CPU_MMAP;WDT;INT_CAUS;CAUSE_RESET
CPU_MMAP;WDT;INT_CAUS;CAUSE_INTR
CPU_MMAP;WDT;LOCK
CPU_MMAP;WDT;LOCK;WDTLOCK
CPU_MMAP;WDT;PERIPHID4
CPU_MMAP;WDT;PERIPHID4;RESERVED8
CPU_MMAP;WDT;PERIPHID4;PID4
CPU_MMAP;WDT;PERIPHID5
CPU_MMAP;WDT;PERIPHID5;RESERVED8
CPU_MMAP;WDT;PERIPHID5;PID5
CPU_MMAP;WDT;PERIPHID6
CPU_MMAP;WDT;PERIPHID6;RESERVED8
CPU_MMAP;WDT;PERIPHID6;PID6
CPU_MMAP;WDT;PERIPHID7
CPU_MMAP;WDT;PERIPHID7;RESERVED8
CPU_MMAP;WDT;PERIPHID7;PID7
CPU_MMAP;WDT;PERIPHID0
CPU_MMAP;WDT;PERIPHID0;RESERVED8
CPU_MMAP;WDT;PERIPHID0;PID0
CPU_MMAP;WDT;PERIPHID1
CPU_MMAP;WDT;PERIPHID1;RESERVED8
CPU_MMAP;WDT;PERIPHID1;PID1
CPU_MMAP;WDT;PERIPHID2
CPU_MMAP;WDT;PERIPHID2;RESERVED8
CPU_MMAP;WDT;PERIPHID2;PID2
CPU_MMAP;WDT;PERIPHID3
CPU_MMAP;WDT;PERIPHID3;RESERVED8
CPU_MMAP;WDT;PERIPHID3;PID3
CPU_MMAP;WDT;PCELLD0
CPU_MMAP;WDT;PCELLD0;RESERVED8
CPU_MMAP;WDT;PCELLD0;CID0
CPU_MMAP;WDT;PCELLD1
CPU_MMAP;WDT;PCELLD1;RESERVED8
CPU_MMAP;WDT;PCELLD1;CID1
CPU_MMAP;WDT;PCELLD2
CPU_MMAP;WDT;PCELLD2;RESERVED8
CPU_MMAP;WDT;PCELLD2;CID2
CPU_MMAP;WDT;PCELLD3
CPU_MMAP;WDT;PCELLD3;RESERVED8
CPU_MMAP;WDT;PCELLD3;CID3
CPU_MMAP;IOC
CPU_MMAP;IOC;IOCFG0
CPU_MMAP;IOC;IOCFG0;RESERVED31
CPU_MMAP;IOC;IOCFG0;HYST_EN
CPU_MMAP;IOC;IOCFG0;IE
CPU_MMAP;IOC;IOCFG0;WU_CFG
CPU_MMAP;IOC;IOCFG0;IOMODE
CPU_MMAP;IOC;IOCFG0;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG0;IOMODE;INV
CPU_MMAP;IOC;IOCFG0;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG0;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG0;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG0;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG0;RESERVED21
CPU_MMAP;IOC;IOCFG0;TDI
CPU_MMAP;IOC;IOCFG0;TDO
CPU_MMAP;IOC;IOCFG0;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG0;EDGE_DET
CPU_MMAP;IOC;IOCFG0;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG0;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG0;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG0;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG0;RESERVED15
CPU_MMAP;IOC;IOCFG0;PULL_CTL
CPU_MMAP;IOC;IOCFG0;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG0;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG0;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG0;SLEW_RED
CPU_MMAP;IOC;IOCFG0;IOCURR
CPU_MMAP;IOC;IOCFG0;IOCURR;2MA
CPU_MMAP;IOC;IOCFG0;IOCURR;4MA
CPU_MMAP;IOC;IOCFG0;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG0;IOSTR
CPU_MMAP;IOC;IOCFG0;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG0;IOSTR;MIN
CPU_MMAP;IOC;IOCFG0;IOSTR;MED
CPU_MMAP;IOC;IOCFG0;IOSTR;MAX
CPU_MMAP;IOC;IOCFG0;RESERVED6
CPU_MMAP;IOC;IOCFG0;PORT_ID
CPU_MMAP;IOC;IOCFG0;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG0;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG0;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG0;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG0;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG0;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG0;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG0;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG0;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG0;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG0;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG0;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG0;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG0;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG0;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG0;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG0;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG0;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG0;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG0;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG0;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG0;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG1
CPU_MMAP;IOC;IOCFG1;RESERVED31
CPU_MMAP;IOC;IOCFG1;HYST_EN
CPU_MMAP;IOC;IOCFG1;IE
CPU_MMAP;IOC;IOCFG1;WU_CFG
CPU_MMAP;IOC;IOCFG1;IOMODE
CPU_MMAP;IOC;IOCFG1;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG1;IOMODE;INV
CPU_MMAP;IOC;IOCFG1;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG1;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG1;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG1;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG1;RESERVED21
CPU_MMAP;IOC;IOCFG1;TDI
CPU_MMAP;IOC;IOCFG1;TDO
CPU_MMAP;IOC;IOCFG1;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG1;EDGE_DET
CPU_MMAP;IOC;IOCFG1;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG1;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG1;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG1;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG1;RESERVED15
CPU_MMAP;IOC;IOCFG1;PULL_CTL
CPU_MMAP;IOC;IOCFG1;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG1;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG1;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG1;SLEW_RED
CPU_MMAP;IOC;IOCFG1;IOCURR
CPU_MMAP;IOC;IOCFG1;IOCURR;2MA
CPU_MMAP;IOC;IOCFG1;IOCURR;4MA
CPU_MMAP;IOC;IOCFG1;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG1;IOSTR
CPU_MMAP;IOC;IOCFG1;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG1;IOSTR;MIN
CPU_MMAP;IOC;IOCFG1;IOSTR;MED
CPU_MMAP;IOC;IOCFG1;IOSTR;MAX
CPU_MMAP;IOC;IOCFG1;RESERVED6
CPU_MMAP;IOC;IOCFG1;PORT_ID
CPU_MMAP;IOC;IOCFG1;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG1;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG1;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG1;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG1;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG1;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG1;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG1;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG1;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG1;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG1;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG1;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG1;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG1;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG1;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG1;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG1;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG1;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG1;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG1;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG1;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG1;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG2
CPU_MMAP;IOC;IOCFG2;RESERVED31
CPU_MMAP;IOC;IOCFG2;HYST_EN
CPU_MMAP;IOC;IOCFG2;IE
CPU_MMAP;IOC;IOCFG2;WU_CFG
CPU_MMAP;IOC;IOCFG2;IOMODE
CPU_MMAP;IOC;IOCFG2;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG2;IOMODE;INV
CPU_MMAP;IOC;IOCFG2;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG2;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG2;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG2;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG2;RESERVED21
CPU_MMAP;IOC;IOCFG2;TDI
CPU_MMAP;IOC;IOCFG2;TDO
CPU_MMAP;IOC;IOCFG2;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG2;EDGE_DET
CPU_MMAP;IOC;IOCFG2;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG2;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG2;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG2;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG2;RESERVED15
CPU_MMAP;IOC;IOCFG2;PULL_CTL
CPU_MMAP;IOC;IOCFG2;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG2;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG2;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG2;SLEW_RED
CPU_MMAP;IOC;IOCFG2;IOCURR
CPU_MMAP;IOC;IOCFG2;IOCURR;2MA
CPU_MMAP;IOC;IOCFG2;IOCURR;4MA
CPU_MMAP;IOC;IOCFG2;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG2;IOSTR
CPU_MMAP;IOC;IOCFG2;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG2;IOSTR;MIN
CPU_MMAP;IOC;IOCFG2;IOSTR;MED
CPU_MMAP;IOC;IOCFG2;IOSTR;MAX
CPU_MMAP;IOC;IOCFG2;RESERVED6
CPU_MMAP;IOC;IOCFG2;PORT_ID
CPU_MMAP;IOC;IOCFG2;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG2;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG2;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG2;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG2;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG2;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG2;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG2;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG2;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG2;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG2;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG2;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG2;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG2;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG2;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG2;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG2;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG2;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG2;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG2;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG2;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG2;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG3
CPU_MMAP;IOC;IOCFG3;RESERVED31
CPU_MMAP;IOC;IOCFG3;HYST_EN
CPU_MMAP;IOC;IOCFG3;IE
CPU_MMAP;IOC;IOCFG3;WU_CFG
CPU_MMAP;IOC;IOCFG3;IOMODE
CPU_MMAP;IOC;IOCFG3;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG3;IOMODE;INV
CPU_MMAP;IOC;IOCFG3;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG3;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG3;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG3;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG3;RESERVED21
CPU_MMAP;IOC;IOCFG3;TDI
CPU_MMAP;IOC;IOCFG3;TDO
CPU_MMAP;IOC;IOCFG3;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG3;EDGE_DET
CPU_MMAP;IOC;IOCFG3;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG3;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG3;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG3;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG3;RESERVED15
CPU_MMAP;IOC;IOCFG3;PULL_CTL
CPU_MMAP;IOC;IOCFG3;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG3;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG3;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG3;SLEW_RED
CPU_MMAP;IOC;IOCFG3;IOCURR
CPU_MMAP;IOC;IOCFG3;IOCURR;2MA
CPU_MMAP;IOC;IOCFG3;IOCURR;4MA
CPU_MMAP;IOC;IOCFG3;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG3;IOSTR
CPU_MMAP;IOC;IOCFG3;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG3;IOSTR;MIN
CPU_MMAP;IOC;IOCFG3;IOSTR;MED
CPU_MMAP;IOC;IOCFG3;IOSTR;MAX
CPU_MMAP;IOC;IOCFG3;RESERVED6
CPU_MMAP;IOC;IOCFG3;PORT_ID
CPU_MMAP;IOC;IOCFG3;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG3;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG3;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG3;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG3;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG3;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG3;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG3;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG3;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG3;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG3;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG3;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG3;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG3;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG3;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG3;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG3;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG3;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG3;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG3;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG3;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG3;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG4
CPU_MMAP;IOC;IOCFG4;RESERVED31
CPU_MMAP;IOC;IOCFG4;HYST_EN
CPU_MMAP;IOC;IOCFG4;IE
CPU_MMAP;IOC;IOCFG4;WU_CFG
CPU_MMAP;IOC;IOCFG4;IOMODE
CPU_MMAP;IOC;IOCFG4;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG4;IOMODE;INV
CPU_MMAP;IOC;IOCFG4;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG4;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG4;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG4;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG4;RESERVED21
CPU_MMAP;IOC;IOCFG4;TDI
CPU_MMAP;IOC;IOCFG4;TDO
CPU_MMAP;IOC;IOCFG4;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG4;EDGE_DET
CPU_MMAP;IOC;IOCFG4;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG4;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG4;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG4;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG4;RESERVED15
CPU_MMAP;IOC;IOCFG4;PULL_CTL
CPU_MMAP;IOC;IOCFG4;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG4;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG4;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG4;SLEW_RED
CPU_MMAP;IOC;IOCFG4;IOCURR
CPU_MMAP;IOC;IOCFG4;IOCURR;2MA
CPU_MMAP;IOC;IOCFG4;IOCURR;4MA
CPU_MMAP;IOC;IOCFG4;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG4;IOSTR
CPU_MMAP;IOC;IOCFG4;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG4;IOSTR;MIN
CPU_MMAP;IOC;IOCFG4;IOSTR;MED
CPU_MMAP;IOC;IOCFG4;IOSTR;MAX
CPU_MMAP;IOC;IOCFG4;RESERVED6
CPU_MMAP;IOC;IOCFG4;PORT_ID
CPU_MMAP;IOC;IOCFG4;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG4;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG4;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG4;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG4;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG4;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG4;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG4;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG4;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG4;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG4;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG4;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG4;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG4;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG4;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG4;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG4;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG4;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG4;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG4;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG4;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG4;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG5
CPU_MMAP;IOC;IOCFG5;RESERVED31
CPU_MMAP;IOC;IOCFG5;HYST_EN
CPU_MMAP;IOC;IOCFG5;IE
CPU_MMAP;IOC;IOCFG5;WU_CFG
CPU_MMAP;IOC;IOCFG5;IOMODE
CPU_MMAP;IOC;IOCFG5;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG5;IOMODE;INV
CPU_MMAP;IOC;IOCFG5;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG5;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG5;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG5;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG5;RESERVED21
CPU_MMAP;IOC;IOCFG5;TDI
CPU_MMAP;IOC;IOCFG5;TDO
CPU_MMAP;IOC;IOCFG5;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG5;EDGE_DET
CPU_MMAP;IOC;IOCFG5;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG5;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG5;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG5;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG5;RESERVED15
CPU_MMAP;IOC;IOCFG5;PULL_CTL
CPU_MMAP;IOC;IOCFG5;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG5;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG5;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG5;SLEW_RED
CPU_MMAP;IOC;IOCFG5;IOCURR
CPU_MMAP;IOC;IOCFG5;IOCURR;2MA
CPU_MMAP;IOC;IOCFG5;IOCURR;4MA
CPU_MMAP;IOC;IOCFG5;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG5;IOSTR
CPU_MMAP;IOC;IOCFG5;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG5;IOSTR;MIN
CPU_MMAP;IOC;IOCFG5;IOSTR;MED
CPU_MMAP;IOC;IOCFG5;IOSTR;MAX
CPU_MMAP;IOC;IOCFG5;RESERVED6
CPU_MMAP;IOC;IOCFG5;PORT_ID
CPU_MMAP;IOC;IOCFG5;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG5;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG5;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG5;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG5;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG5;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG5;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG5;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG5;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG5;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG5;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG5;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG5;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG5;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG5;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG5;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG5;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG5;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG5;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG5;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG5;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG5;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG6
CPU_MMAP;IOC;IOCFG6;RESERVED31
CPU_MMAP;IOC;IOCFG6;HYST_EN
CPU_MMAP;IOC;IOCFG6;IE
CPU_MMAP;IOC;IOCFG6;WU_CFG
CPU_MMAP;IOC;IOCFG6;IOMODE
CPU_MMAP;IOC;IOCFG6;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG6;IOMODE;INV
CPU_MMAP;IOC;IOCFG6;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG6;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG6;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG6;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG6;RESERVED21
CPU_MMAP;IOC;IOCFG6;TDI
CPU_MMAP;IOC;IOCFG6;TDO
CPU_MMAP;IOC;IOCFG6;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG6;EDGE_DET
CPU_MMAP;IOC;IOCFG6;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG6;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG6;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG6;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG6;RESERVED15
CPU_MMAP;IOC;IOCFG6;PULL_CTL
CPU_MMAP;IOC;IOCFG6;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG6;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG6;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG6;SLEW_RED
CPU_MMAP;IOC;IOCFG6;IOCURR
CPU_MMAP;IOC;IOCFG6;IOCURR;2MA
CPU_MMAP;IOC;IOCFG6;IOCURR;4MA
CPU_MMAP;IOC;IOCFG6;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG6;IOSTR
CPU_MMAP;IOC;IOCFG6;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG6;IOSTR;MIN
CPU_MMAP;IOC;IOCFG6;IOSTR;MED
CPU_MMAP;IOC;IOCFG6;IOSTR;MAX
CPU_MMAP;IOC;IOCFG6;RESERVED6
CPU_MMAP;IOC;IOCFG6;PORT_ID
CPU_MMAP;IOC;IOCFG6;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG6;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG6;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG6;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG6;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG6;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG6;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG6;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG6;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG6;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG6;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG6;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG6;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG6;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG6;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG6;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG6;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG6;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG6;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG6;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG6;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG6;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG7
CPU_MMAP;IOC;IOCFG7;RESERVED31
CPU_MMAP;IOC;IOCFG7;HYST_EN
CPU_MMAP;IOC;IOCFG7;IE
CPU_MMAP;IOC;IOCFG7;WU_CFG
CPU_MMAP;IOC;IOCFG7;IOMODE
CPU_MMAP;IOC;IOCFG7;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG7;IOMODE;INV
CPU_MMAP;IOC;IOCFG7;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG7;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG7;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG7;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG7;RESERVED21
CPU_MMAP;IOC;IOCFG7;TDI
CPU_MMAP;IOC;IOCFG7;TDO
CPU_MMAP;IOC;IOCFG7;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG7;EDGE_DET
CPU_MMAP;IOC;IOCFG7;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG7;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG7;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG7;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG7;RESERVED15
CPU_MMAP;IOC;IOCFG7;PULL_CTL
CPU_MMAP;IOC;IOCFG7;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG7;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG7;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG7;SLEW_RED
CPU_MMAP;IOC;IOCFG7;IOCURR
CPU_MMAP;IOC;IOCFG7;IOCURR;2MA
CPU_MMAP;IOC;IOCFG7;IOCURR;4MA
CPU_MMAP;IOC;IOCFG7;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG7;IOSTR
CPU_MMAP;IOC;IOCFG7;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG7;IOSTR;MIN
CPU_MMAP;IOC;IOCFG7;IOSTR;MED
CPU_MMAP;IOC;IOCFG7;IOSTR;MAX
CPU_MMAP;IOC;IOCFG7;RESERVED6
CPU_MMAP;IOC;IOCFG7;PORT_ID
CPU_MMAP;IOC;IOCFG7;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG7;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG7;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG7;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG7;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG7;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG7;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG7;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG7;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG7;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG7;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG7;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG7;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG7;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG7;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG7;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG7;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG7;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG7;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG7;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG7;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG7;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG8
CPU_MMAP;IOC;IOCFG8;RESERVED31
CPU_MMAP;IOC;IOCFG8;HYST_EN
CPU_MMAP;IOC;IOCFG8;IE
CPU_MMAP;IOC;IOCFG8;WU_CFG
CPU_MMAP;IOC;IOCFG8;IOMODE
CPU_MMAP;IOC;IOCFG8;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG8;IOMODE;INV
CPU_MMAP;IOC;IOCFG8;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG8;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG8;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG8;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG8;RESERVED21
CPU_MMAP;IOC;IOCFG8;TDI
CPU_MMAP;IOC;IOCFG8;TDO
CPU_MMAP;IOC;IOCFG8;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG8;EDGE_DET
CPU_MMAP;IOC;IOCFG8;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG8;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG8;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG8;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG8;RESERVED15
CPU_MMAP;IOC;IOCFG8;PULL_CTL
CPU_MMAP;IOC;IOCFG8;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG8;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG8;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG8;SLEW_RED
CPU_MMAP;IOC;IOCFG8;IOCURR
CPU_MMAP;IOC;IOCFG8;IOCURR;2MA
CPU_MMAP;IOC;IOCFG8;IOCURR;4MA
CPU_MMAP;IOC;IOCFG8;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG8;IOSTR
CPU_MMAP;IOC;IOCFG8;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG8;IOSTR;MIN
CPU_MMAP;IOC;IOCFG8;IOSTR;MED
CPU_MMAP;IOC;IOCFG8;IOSTR;MAX
CPU_MMAP;IOC;IOCFG8;RESERVED6
CPU_MMAP;IOC;IOCFG8;PORT_ID
CPU_MMAP;IOC;IOCFG8;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG8;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG8;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG8;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG8;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG8;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG8;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG8;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG8;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG8;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG8;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG8;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG8;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG8;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG8;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG8;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG8;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG8;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG8;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG8;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG8;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG8;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG9
CPU_MMAP;IOC;IOCFG9;RESERVED31
CPU_MMAP;IOC;IOCFG9;HYST_EN
CPU_MMAP;IOC;IOCFG9;IE
CPU_MMAP;IOC;IOCFG9;WU_CFG
CPU_MMAP;IOC;IOCFG9;IOMODE
CPU_MMAP;IOC;IOCFG9;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG9;IOMODE;INV
CPU_MMAP;IOC;IOCFG9;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG9;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG9;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG9;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG9;RESERVED21
CPU_MMAP;IOC;IOCFG9;TDI
CPU_MMAP;IOC;IOCFG9;TDO
CPU_MMAP;IOC;IOCFG9;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG9;EDGE_DET
CPU_MMAP;IOC;IOCFG9;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG9;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG9;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG9;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG9;RESERVED15
CPU_MMAP;IOC;IOCFG9;PULL_CTL
CPU_MMAP;IOC;IOCFG9;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG9;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG9;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG9;SLEW_RED
CPU_MMAP;IOC;IOCFG9;IOCURR
CPU_MMAP;IOC;IOCFG9;IOCURR;2MA
CPU_MMAP;IOC;IOCFG9;IOCURR;4MA
CPU_MMAP;IOC;IOCFG9;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG9;IOSTR
CPU_MMAP;IOC;IOCFG9;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG9;IOSTR;MIN
CPU_MMAP;IOC;IOCFG9;IOSTR;MED
CPU_MMAP;IOC;IOCFG9;IOSTR;MAX
CPU_MMAP;IOC;IOCFG9;RESERVED6
CPU_MMAP;IOC;IOCFG9;PORT_ID
CPU_MMAP;IOC;IOCFG9;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG9;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG9;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG9;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG9;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG9;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG9;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG9;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG9;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG9;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG9;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG9;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG9;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG9;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG9;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG9;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG9;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG9;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG9;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG9;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG9;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG9;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG10
CPU_MMAP;IOC;IOCFG10;RESERVED31
CPU_MMAP;IOC;IOCFG10;HYST_EN
CPU_MMAP;IOC;IOCFG10;IE
CPU_MMAP;IOC;IOCFG10;WU_CFG
CPU_MMAP;IOC;IOCFG10;IOMODE
CPU_MMAP;IOC;IOCFG10;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG10;IOMODE;INV
CPU_MMAP;IOC;IOCFG10;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG10;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG10;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG10;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG10;RESERVED21
CPU_MMAP;IOC;IOCFG10;TDI
CPU_MMAP;IOC;IOCFG10;TDO
CPU_MMAP;IOC;IOCFG10;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG10;EDGE_DET
CPU_MMAP;IOC;IOCFG10;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG10;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG10;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG10;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG10;RESERVED15
CPU_MMAP;IOC;IOCFG10;PULL_CTL
CPU_MMAP;IOC;IOCFG10;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG10;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG10;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG10;SLEW_RED
CPU_MMAP;IOC;IOCFG10;IOCURR
CPU_MMAP;IOC;IOCFG10;IOCURR;2MA
CPU_MMAP;IOC;IOCFG10;IOCURR;4MA
CPU_MMAP;IOC;IOCFG10;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG10;IOSTR
CPU_MMAP;IOC;IOCFG10;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG10;IOSTR;MIN
CPU_MMAP;IOC;IOCFG10;IOSTR;MED
CPU_MMAP;IOC;IOCFG10;IOSTR;MAX
CPU_MMAP;IOC;IOCFG10;RESERVED6
CPU_MMAP;IOC;IOCFG10;PORT_ID
CPU_MMAP;IOC;IOCFG10;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG10;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG10;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG10;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG10;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG10;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG10;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG10;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG10;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG10;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG10;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG10;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG10;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG10;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG10;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG10;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG10;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG10;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG10;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG10;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG10;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG10;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG11
CPU_MMAP;IOC;IOCFG11;RESERVED31
CPU_MMAP;IOC;IOCFG11;HYST_EN
CPU_MMAP;IOC;IOCFG11;IE
CPU_MMAP;IOC;IOCFG11;WU_CFG
CPU_MMAP;IOC;IOCFG11;IOMODE
CPU_MMAP;IOC;IOCFG11;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG11;IOMODE;INV
CPU_MMAP;IOC;IOCFG11;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG11;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG11;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG11;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG11;RESERVED21
CPU_MMAP;IOC;IOCFG11;TDI
CPU_MMAP;IOC;IOCFG11;TDO
CPU_MMAP;IOC;IOCFG11;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG11;EDGE_DET
CPU_MMAP;IOC;IOCFG11;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG11;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG11;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG11;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG11;RESERVED15
CPU_MMAP;IOC;IOCFG11;PULL_CTL
CPU_MMAP;IOC;IOCFG11;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG11;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG11;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG11;SLEW_RED
CPU_MMAP;IOC;IOCFG11;IOCURR
CPU_MMAP;IOC;IOCFG11;IOCURR;2MA
CPU_MMAP;IOC;IOCFG11;IOCURR;4MA
CPU_MMAP;IOC;IOCFG11;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG11;IOSTR
CPU_MMAP;IOC;IOCFG11;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG11;IOSTR;MIN
CPU_MMAP;IOC;IOCFG11;IOSTR;MED
CPU_MMAP;IOC;IOCFG11;IOSTR;MAX
CPU_MMAP;IOC;IOCFG11;RESERVED6
CPU_MMAP;IOC;IOCFG11;PORT_ID
CPU_MMAP;IOC;IOCFG11;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG11;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG11;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG11;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG11;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG11;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG11;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG11;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG11;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG11;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG11;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG11;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG11;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG11;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG11;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG11;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG11;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG11;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG11;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG11;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG11;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG11;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG12
CPU_MMAP;IOC;IOCFG12;RESERVED31
CPU_MMAP;IOC;IOCFG12;HYST_EN
CPU_MMAP;IOC;IOCFG12;IE
CPU_MMAP;IOC;IOCFG12;WU_CFG
CPU_MMAP;IOC;IOCFG12;IOMODE
CPU_MMAP;IOC;IOCFG12;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG12;IOMODE;INV
CPU_MMAP;IOC;IOCFG12;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG12;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG12;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG12;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG12;RESERVED21
CPU_MMAP;IOC;IOCFG12;TDI
CPU_MMAP;IOC;IOCFG12;TDO
CPU_MMAP;IOC;IOCFG12;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG12;EDGE_DET
CPU_MMAP;IOC;IOCFG12;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG12;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG12;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG12;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG12;RESERVED15
CPU_MMAP;IOC;IOCFG12;PULL_CTL
CPU_MMAP;IOC;IOCFG12;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG12;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG12;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG12;SLEW_RED
CPU_MMAP;IOC;IOCFG12;IOCURR
CPU_MMAP;IOC;IOCFG12;IOCURR;2MA
CPU_MMAP;IOC;IOCFG12;IOCURR;4MA
CPU_MMAP;IOC;IOCFG12;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG12;IOSTR
CPU_MMAP;IOC;IOCFG12;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG12;IOSTR;MIN
CPU_MMAP;IOC;IOCFG12;IOSTR;MED
CPU_MMAP;IOC;IOCFG12;IOSTR;MAX
CPU_MMAP;IOC;IOCFG12;RESERVED6
CPU_MMAP;IOC;IOCFG12;PORT_ID
CPU_MMAP;IOC;IOCFG12;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG12;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG12;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG12;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG12;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG12;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG12;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG12;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG12;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG12;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG12;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG12;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG12;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG12;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG12;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG12;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG12;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG12;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG12;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG12;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG12;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG12;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG13
CPU_MMAP;IOC;IOCFG13;RESERVED31
CPU_MMAP;IOC;IOCFG13;HYST_EN
CPU_MMAP;IOC;IOCFG13;IE
CPU_MMAP;IOC;IOCFG13;WU_CFG
CPU_MMAP;IOC;IOCFG13;IOMODE
CPU_MMAP;IOC;IOCFG13;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG13;IOMODE;INV
CPU_MMAP;IOC;IOCFG13;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG13;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG13;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG13;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG13;RESERVED21
CPU_MMAP;IOC;IOCFG13;TDI
CPU_MMAP;IOC;IOCFG13;TDO
CPU_MMAP;IOC;IOCFG13;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG13;EDGE_DET
CPU_MMAP;IOC;IOCFG13;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG13;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG13;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG13;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG13;RESERVED15
CPU_MMAP;IOC;IOCFG13;PULL_CTL
CPU_MMAP;IOC;IOCFG13;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG13;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG13;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG13;SLEW_RED
CPU_MMAP;IOC;IOCFG13;IOCURR
CPU_MMAP;IOC;IOCFG13;IOCURR;2MA
CPU_MMAP;IOC;IOCFG13;IOCURR;4MA
CPU_MMAP;IOC;IOCFG13;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG13;IOSTR
CPU_MMAP;IOC;IOCFG13;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG13;IOSTR;MIN
CPU_MMAP;IOC;IOCFG13;IOSTR;MED
CPU_MMAP;IOC;IOCFG13;IOSTR;MAX
CPU_MMAP;IOC;IOCFG13;RESERVED6
CPU_MMAP;IOC;IOCFG13;PORT_ID
CPU_MMAP;IOC;IOCFG13;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG13;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG13;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG13;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG13;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG13;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG13;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG13;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG13;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG13;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG13;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG13;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG13;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG13;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG13;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG13;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG13;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG13;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG13;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG13;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG13;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG13;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG14
CPU_MMAP;IOC;IOCFG14;RESERVED31
CPU_MMAP;IOC;IOCFG14;HYST_EN
CPU_MMAP;IOC;IOCFG14;IE
CPU_MMAP;IOC;IOCFG14;WU_CFG
CPU_MMAP;IOC;IOCFG14;IOMODE
CPU_MMAP;IOC;IOCFG14;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG14;IOMODE;INV
CPU_MMAP;IOC;IOCFG14;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG14;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG14;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG14;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG14;RESERVED21
CPU_MMAP;IOC;IOCFG14;TDI
CPU_MMAP;IOC;IOCFG14;TDO
CPU_MMAP;IOC;IOCFG14;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG14;EDGE_DET
CPU_MMAP;IOC;IOCFG14;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG14;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG14;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG14;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG14;RESERVED15
CPU_MMAP;IOC;IOCFG14;PULL_CTL
CPU_MMAP;IOC;IOCFG14;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG14;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG14;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG14;SLEW_RED
CPU_MMAP;IOC;IOCFG14;IOCURR
CPU_MMAP;IOC;IOCFG14;IOCURR;2MA
CPU_MMAP;IOC;IOCFG14;IOCURR;4MA
CPU_MMAP;IOC;IOCFG14;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG14;IOSTR
CPU_MMAP;IOC;IOCFG14;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG14;IOSTR;MIN
CPU_MMAP;IOC;IOCFG14;IOSTR;MED
CPU_MMAP;IOC;IOCFG14;IOSTR;MAX
CPU_MMAP;IOC;IOCFG14;RESERVED6
CPU_MMAP;IOC;IOCFG14;PORT_ID
CPU_MMAP;IOC;IOCFG14;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG14;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG14;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG14;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG14;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG14;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG14;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG14;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG14;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG14;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG14;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG14;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG14;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG14;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG14;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG14;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG14;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG14;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG14;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG14;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG14;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG14;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG15
CPU_MMAP;IOC;IOCFG15;RESERVED31
CPU_MMAP;IOC;IOCFG15;HYST_EN
CPU_MMAP;IOC;IOCFG15;IE
CPU_MMAP;IOC;IOCFG15;WU_CFG
CPU_MMAP;IOC;IOCFG15;IOMODE
CPU_MMAP;IOC;IOCFG15;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG15;IOMODE;INV
CPU_MMAP;IOC;IOCFG15;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG15;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG15;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG15;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG15;RESERVED21
CPU_MMAP;IOC;IOCFG15;TDI
CPU_MMAP;IOC;IOCFG15;TDO
CPU_MMAP;IOC;IOCFG15;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG15;EDGE_DET
CPU_MMAP;IOC;IOCFG15;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG15;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG15;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG15;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG15;RESERVED15
CPU_MMAP;IOC;IOCFG15;PULL_CTL
CPU_MMAP;IOC;IOCFG15;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG15;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG15;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG15;SLEW_RED
CPU_MMAP;IOC;IOCFG15;IOCURR
CPU_MMAP;IOC;IOCFG15;IOCURR;2MA
CPU_MMAP;IOC;IOCFG15;IOCURR;4MA
CPU_MMAP;IOC;IOCFG15;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG15;IOSTR
CPU_MMAP;IOC;IOCFG15;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG15;IOSTR;MIN
CPU_MMAP;IOC;IOCFG15;IOSTR;MED
CPU_MMAP;IOC;IOCFG15;IOSTR;MAX
CPU_MMAP;IOC;IOCFG15;RESERVED6
CPU_MMAP;IOC;IOCFG15;PORT_ID
CPU_MMAP;IOC;IOCFG15;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG15;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG15;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG15;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG15;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG15;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG15;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG15;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG15;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG15;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG15;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG15;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG15;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG15;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG15;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG15;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG15;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG15;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG15;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG15;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG15;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG15;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG16
CPU_MMAP;IOC;IOCFG16;RESERVED31
CPU_MMAP;IOC;IOCFG16;HYST_EN
CPU_MMAP;IOC;IOCFG16;IE
CPU_MMAP;IOC;IOCFG16;WU_CFG
CPU_MMAP;IOC;IOCFG16;IOMODE
CPU_MMAP;IOC;IOCFG16;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG16;IOMODE;INV
CPU_MMAP;IOC;IOCFG16;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG16;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG16;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG16;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG16;RESERVED21
CPU_MMAP;IOC;IOCFG16;TDI
CPU_MMAP;IOC;IOCFG16;TDO
CPU_MMAP;IOC;IOCFG16;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG16;EDGE_DET
CPU_MMAP;IOC;IOCFG16;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG16;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG16;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG16;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG16;RESERVED15
CPU_MMAP;IOC;IOCFG16;PULL_CTL
CPU_MMAP;IOC;IOCFG16;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG16;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG16;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG16;SLEW_RED
CPU_MMAP;IOC;IOCFG16;IOCURR
CPU_MMAP;IOC;IOCFG16;IOCURR;2MA
CPU_MMAP;IOC;IOCFG16;IOCURR;4MA
CPU_MMAP;IOC;IOCFG16;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG16;IOSTR
CPU_MMAP;IOC;IOCFG16;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG16;IOSTR;MIN
CPU_MMAP;IOC;IOCFG16;IOSTR;MED
CPU_MMAP;IOC;IOCFG16;IOSTR;MAX
CPU_MMAP;IOC;IOCFG16;RESERVED6
CPU_MMAP;IOC;IOCFG16;PORT_ID
CPU_MMAP;IOC;IOCFG16;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG16;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG16;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG16;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG16;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG16;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG16;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG16;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG16;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG16;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG16;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG16;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG16;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG16;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG16;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG16;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG16;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG16;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG16;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG16;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG16;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG16;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG17
CPU_MMAP;IOC;IOCFG17;RESERVED31
CPU_MMAP;IOC;IOCFG17;HYST_EN
CPU_MMAP;IOC;IOCFG17;IE
CPU_MMAP;IOC;IOCFG17;WU_CFG
CPU_MMAP;IOC;IOCFG17;IOMODE
CPU_MMAP;IOC;IOCFG17;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG17;IOMODE;INV
CPU_MMAP;IOC;IOCFG17;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG17;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG17;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG17;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG17;RESERVED21
CPU_MMAP;IOC;IOCFG17;TDI
CPU_MMAP;IOC;IOCFG17;TDO
CPU_MMAP;IOC;IOCFG17;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG17;EDGE_DET
CPU_MMAP;IOC;IOCFG17;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG17;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG17;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG17;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG17;RESERVED15
CPU_MMAP;IOC;IOCFG17;PULL_CTL
CPU_MMAP;IOC;IOCFG17;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG17;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG17;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG17;SLEW_RED
CPU_MMAP;IOC;IOCFG17;IOCURR
CPU_MMAP;IOC;IOCFG17;IOCURR;2MA
CPU_MMAP;IOC;IOCFG17;IOCURR;4MA
CPU_MMAP;IOC;IOCFG17;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG17;IOSTR
CPU_MMAP;IOC;IOCFG17;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG17;IOSTR;MIN
CPU_MMAP;IOC;IOCFG17;IOSTR;MED
CPU_MMAP;IOC;IOCFG17;IOSTR;MAX
CPU_MMAP;IOC;IOCFG17;RESERVED6
CPU_MMAP;IOC;IOCFG17;PORT_ID
CPU_MMAP;IOC;IOCFG17;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG17;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG17;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG17;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG17;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG17;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG17;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG17;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG17;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG17;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG17;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG17;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG17;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG17;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG17;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG17;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG17;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG17;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG17;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG17;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG17;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG17;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG18
CPU_MMAP;IOC;IOCFG18;RESERVED31
CPU_MMAP;IOC;IOCFG18;HYST_EN
CPU_MMAP;IOC;IOCFG18;IE
CPU_MMAP;IOC;IOCFG18;WU_CFG
CPU_MMAP;IOC;IOCFG18;IOMODE
CPU_MMAP;IOC;IOCFG18;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG18;IOMODE;INV
CPU_MMAP;IOC;IOCFG18;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG18;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG18;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG18;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG18;RESERVED21
CPU_MMAP;IOC;IOCFG18;TDI
CPU_MMAP;IOC;IOCFG18;TDO
CPU_MMAP;IOC;IOCFG18;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG18;EDGE_DET
CPU_MMAP;IOC;IOCFG18;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG18;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG18;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG18;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG18;RESERVED15
CPU_MMAP;IOC;IOCFG18;PULL_CTL
CPU_MMAP;IOC;IOCFG18;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG18;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG18;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG18;SLEW_RED
CPU_MMAP;IOC;IOCFG18;IOCURR
CPU_MMAP;IOC;IOCFG18;IOCURR;2MA
CPU_MMAP;IOC;IOCFG18;IOCURR;4MA
CPU_MMAP;IOC;IOCFG18;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG18;IOSTR
CPU_MMAP;IOC;IOCFG18;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG18;IOSTR;MIN
CPU_MMAP;IOC;IOCFG18;IOSTR;MED
CPU_MMAP;IOC;IOCFG18;IOSTR;MAX
CPU_MMAP;IOC;IOCFG18;RESERVED6
CPU_MMAP;IOC;IOCFG18;PORT_ID
CPU_MMAP;IOC;IOCFG18;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG18;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG18;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG18;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG18;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG18;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG18;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG18;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG18;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG18;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG18;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG18;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG18;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG18;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG18;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG18;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG18;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG18;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG18;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG18;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG18;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG18;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG19
CPU_MMAP;IOC;IOCFG19;RESERVED31
CPU_MMAP;IOC;IOCFG19;HYST_EN
CPU_MMAP;IOC;IOCFG19;IE
CPU_MMAP;IOC;IOCFG19;WU_CFG
CPU_MMAP;IOC;IOCFG19;IOMODE
CPU_MMAP;IOC;IOCFG19;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG19;IOMODE;INV
CPU_MMAP;IOC;IOCFG19;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG19;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG19;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG19;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG19;RESERVED21
CPU_MMAP;IOC;IOCFG19;TDI
CPU_MMAP;IOC;IOCFG19;TDO
CPU_MMAP;IOC;IOCFG19;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG19;EDGE_DET
CPU_MMAP;IOC;IOCFG19;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG19;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG19;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG19;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG19;RESERVED15
CPU_MMAP;IOC;IOCFG19;PULL_CTL
CPU_MMAP;IOC;IOCFG19;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG19;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG19;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG19;SLEW_RED
CPU_MMAP;IOC;IOCFG19;IOCURR
CPU_MMAP;IOC;IOCFG19;IOCURR;2MA
CPU_MMAP;IOC;IOCFG19;IOCURR;4MA
CPU_MMAP;IOC;IOCFG19;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG19;IOSTR
CPU_MMAP;IOC;IOCFG19;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG19;IOSTR;MIN
CPU_MMAP;IOC;IOCFG19;IOSTR;MED
CPU_MMAP;IOC;IOCFG19;IOSTR;MAX
CPU_MMAP;IOC;IOCFG19;RESERVED6
CPU_MMAP;IOC;IOCFG19;PORT_ID
CPU_MMAP;IOC;IOCFG19;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG19;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG19;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG19;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG19;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG19;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG19;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG19;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG19;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG19;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG19;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG19;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG19;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG19;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG19;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG19;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG19;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG19;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG19;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG19;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG19;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG19;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG20
CPU_MMAP;IOC;IOCFG20;RESERVED31
CPU_MMAP;IOC;IOCFG20;HYST_EN
CPU_MMAP;IOC;IOCFG20;IE
CPU_MMAP;IOC;IOCFG20;WU_CFG
CPU_MMAP;IOC;IOCFG20;IOMODE
CPU_MMAP;IOC;IOCFG20;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG20;IOMODE;INV
CPU_MMAP;IOC;IOCFG20;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG20;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG20;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG20;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG20;RESERVED21
CPU_MMAP;IOC;IOCFG20;TDI
CPU_MMAP;IOC;IOCFG20;TDO
CPU_MMAP;IOC;IOCFG20;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG20;EDGE_DET
CPU_MMAP;IOC;IOCFG20;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG20;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG20;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG20;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG20;RESERVED15
CPU_MMAP;IOC;IOCFG20;PULL_CTL
CPU_MMAP;IOC;IOCFG20;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG20;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG20;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG20;SLEW_RED
CPU_MMAP;IOC;IOCFG20;IOCURR
CPU_MMAP;IOC;IOCFG20;IOCURR;2MA
CPU_MMAP;IOC;IOCFG20;IOCURR;4MA
CPU_MMAP;IOC;IOCFG20;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG20;IOSTR
CPU_MMAP;IOC;IOCFG20;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG20;IOSTR;MIN
CPU_MMAP;IOC;IOCFG20;IOSTR;MED
CPU_MMAP;IOC;IOCFG20;IOSTR;MAX
CPU_MMAP;IOC;IOCFG20;RESERVED6
CPU_MMAP;IOC;IOCFG20;PORT_ID
CPU_MMAP;IOC;IOCFG20;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG20;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG20;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG20;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG20;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG20;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG20;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG20;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG20;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG20;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG20;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG20;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG20;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG20;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG20;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG20;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG20;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG20;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG20;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG20;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG20;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG20;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG21
CPU_MMAP;IOC;IOCFG21;RESERVED31
CPU_MMAP;IOC;IOCFG21;HYST_EN
CPU_MMAP;IOC;IOCFG21;IE
CPU_MMAP;IOC;IOCFG21;WU_CFG
CPU_MMAP;IOC;IOCFG21;IOMODE
CPU_MMAP;IOC;IOCFG21;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG21;IOMODE;INV
CPU_MMAP;IOC;IOCFG21;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG21;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG21;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG21;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG21;RESERVED21
CPU_MMAP;IOC;IOCFG21;TDI
CPU_MMAP;IOC;IOCFG21;TDO
CPU_MMAP;IOC;IOCFG21;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG21;EDGE_DET
CPU_MMAP;IOC;IOCFG21;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG21;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG21;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG21;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG21;RESERVED15
CPU_MMAP;IOC;IOCFG21;PULL_CTL
CPU_MMAP;IOC;IOCFG21;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG21;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG21;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG21;SLEW_RED
CPU_MMAP;IOC;IOCFG21;IOCURR
CPU_MMAP;IOC;IOCFG21;IOCURR;2MA
CPU_MMAP;IOC;IOCFG21;IOCURR;4MA
CPU_MMAP;IOC;IOCFG21;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG21;IOSTR
CPU_MMAP;IOC;IOCFG21;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG21;IOSTR;MIN
CPU_MMAP;IOC;IOCFG21;IOSTR;MED
CPU_MMAP;IOC;IOCFG21;IOSTR;MAX
CPU_MMAP;IOC;IOCFG21;RESERVED6
CPU_MMAP;IOC;IOCFG21;PORT_ID
CPU_MMAP;IOC;IOCFG21;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG21;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG21;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG21;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG21;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG21;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG21;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG21;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG21;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG21;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG21;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG21;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG21;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG21;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG21;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG21;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG21;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG21;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG21;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG21;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG21;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG21;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG22
CPU_MMAP;IOC;IOCFG22;RESERVED31
CPU_MMAP;IOC;IOCFG22;HYST_EN
CPU_MMAP;IOC;IOCFG22;IE
CPU_MMAP;IOC;IOCFG22;WU_CFG
CPU_MMAP;IOC;IOCFG22;IOMODE
CPU_MMAP;IOC;IOCFG22;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG22;IOMODE;INV
CPU_MMAP;IOC;IOCFG22;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG22;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG22;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG22;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG22;RESERVED21
CPU_MMAP;IOC;IOCFG22;TDI
CPU_MMAP;IOC;IOCFG22;TDO
CPU_MMAP;IOC;IOCFG22;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG22;EDGE_DET
CPU_MMAP;IOC;IOCFG22;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG22;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG22;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG22;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG22;RESERVED15
CPU_MMAP;IOC;IOCFG22;PULL_CTL
CPU_MMAP;IOC;IOCFG22;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG22;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG22;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG22;SLEW_RED
CPU_MMAP;IOC;IOCFG22;IOCURR
CPU_MMAP;IOC;IOCFG22;IOCURR;2MA
CPU_MMAP;IOC;IOCFG22;IOCURR;4MA
CPU_MMAP;IOC;IOCFG22;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG22;IOSTR
CPU_MMAP;IOC;IOCFG22;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG22;IOSTR;MIN
CPU_MMAP;IOC;IOCFG22;IOSTR;MED
CPU_MMAP;IOC;IOCFG22;IOSTR;MAX
CPU_MMAP;IOC;IOCFG22;RESERVED6
CPU_MMAP;IOC;IOCFG22;PORT_ID
CPU_MMAP;IOC;IOCFG22;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG22;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG22;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG22;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG22;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG22;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG22;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG22;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG22;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG22;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG22;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG22;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG22;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG22;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG22;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG22;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG22;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG22;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG22;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG22;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG22;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG22;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG23
CPU_MMAP;IOC;IOCFG23;RESERVED31
CPU_MMAP;IOC;IOCFG23;HYST_EN
CPU_MMAP;IOC;IOCFG23;IE
CPU_MMAP;IOC;IOCFG23;WU_CFG
CPU_MMAP;IOC;IOCFG23;IOMODE
CPU_MMAP;IOC;IOCFG23;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG23;IOMODE;INV
CPU_MMAP;IOC;IOCFG23;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG23;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG23;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG23;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG23;RESERVED21
CPU_MMAP;IOC;IOCFG23;TDI
CPU_MMAP;IOC;IOCFG23;TDO
CPU_MMAP;IOC;IOCFG23;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG23;EDGE_DET
CPU_MMAP;IOC;IOCFG23;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG23;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG23;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG23;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG23;RESERVED15
CPU_MMAP;IOC;IOCFG23;PULL_CTL
CPU_MMAP;IOC;IOCFG23;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG23;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG23;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG23;SLEW_RED
CPU_MMAP;IOC;IOCFG23;IOCURR
CPU_MMAP;IOC;IOCFG23;IOCURR;2MA
CPU_MMAP;IOC;IOCFG23;IOCURR;4MA
CPU_MMAP;IOC;IOCFG23;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG23;IOSTR
CPU_MMAP;IOC;IOCFG23;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG23;IOSTR;MIN
CPU_MMAP;IOC;IOCFG23;IOSTR;MED
CPU_MMAP;IOC;IOCFG23;IOSTR;MAX
CPU_MMAP;IOC;IOCFG23;RESERVED6
CPU_MMAP;IOC;IOCFG23;PORT_ID
CPU_MMAP;IOC;IOCFG23;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG23;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG23;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG23;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG23;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG23;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG23;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG23;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG23;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG23;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG23;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG23;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG23;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG23;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG23;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG23;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG23;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG23;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG23;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG23;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG23;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG23;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG24
CPU_MMAP;IOC;IOCFG24;RESERVED31
CPU_MMAP;IOC;IOCFG24;HYST_EN
CPU_MMAP;IOC;IOCFG24;IE
CPU_MMAP;IOC;IOCFG24;WU_CFG
CPU_MMAP;IOC;IOCFG24;IOMODE
CPU_MMAP;IOC;IOCFG24;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG24;IOMODE;INV
CPU_MMAP;IOC;IOCFG24;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG24;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG24;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG24;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG24;RESERVED21
CPU_MMAP;IOC;IOCFG24;TDI
CPU_MMAP;IOC;IOCFG24;TDO
CPU_MMAP;IOC;IOCFG24;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG24;EDGE_DET
CPU_MMAP;IOC;IOCFG24;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG24;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG24;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG24;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG24;RESERVED15
CPU_MMAP;IOC;IOCFG24;PULL_CTL
CPU_MMAP;IOC;IOCFG24;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG24;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG24;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG24;SLEW_RED
CPU_MMAP;IOC;IOCFG24;IOCURR
CPU_MMAP;IOC;IOCFG24;IOCURR;2MA
CPU_MMAP;IOC;IOCFG24;IOCURR;4MA
CPU_MMAP;IOC;IOCFG24;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG24;IOSTR
CPU_MMAP;IOC;IOCFG24;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG24;IOSTR;MIN
CPU_MMAP;IOC;IOCFG24;IOSTR;MED
CPU_MMAP;IOC;IOCFG24;IOSTR;MAX
CPU_MMAP;IOC;IOCFG24;RESERVED6
CPU_MMAP;IOC;IOCFG24;PORT_ID
CPU_MMAP;IOC;IOCFG24;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG24;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG24;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG24;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG24;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG24;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG24;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG24;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG24;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG24;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG24;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG24;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG24;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG24;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG24;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG24;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG24;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG24;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG24;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG24;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG24;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG24;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG25
CPU_MMAP;IOC;IOCFG25;RESERVED31
CPU_MMAP;IOC;IOCFG25;HYST_EN
CPU_MMAP;IOC;IOCFG25;IE
CPU_MMAP;IOC;IOCFG25;WU_CFG
CPU_MMAP;IOC;IOCFG25;IOMODE
CPU_MMAP;IOC;IOCFG25;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG25;IOMODE;INV
CPU_MMAP;IOC;IOCFG25;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG25;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG25;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG25;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG25;RESERVED21
CPU_MMAP;IOC;IOCFG25;TDI
CPU_MMAP;IOC;IOCFG25;TDO
CPU_MMAP;IOC;IOCFG25;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG25;EDGE_DET
CPU_MMAP;IOC;IOCFG25;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG25;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG25;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG25;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG25;RESERVED15
CPU_MMAP;IOC;IOCFG25;PULL_CTL
CPU_MMAP;IOC;IOCFG25;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG25;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG25;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG25;SLEW_RED
CPU_MMAP;IOC;IOCFG25;IOCURR
CPU_MMAP;IOC;IOCFG25;IOCURR;2MA
CPU_MMAP;IOC;IOCFG25;IOCURR;4MA
CPU_MMAP;IOC;IOCFG25;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG25;IOSTR
CPU_MMAP;IOC;IOCFG25;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG25;IOSTR;MIN
CPU_MMAP;IOC;IOCFG25;IOSTR;MED
CPU_MMAP;IOC;IOCFG25;IOSTR;MAX
CPU_MMAP;IOC;IOCFG25;RESERVED6
CPU_MMAP;IOC;IOCFG25;PORT_ID
CPU_MMAP;IOC;IOCFG25;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG25;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG25;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG25;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG25;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG25;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG25;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG25;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG25;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG25;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG25;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG25;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG25;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG25;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG25;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG25;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG25;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG25;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG25;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG25;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG25;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG25;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG26
CPU_MMAP;IOC;IOCFG26;RESERVED31
CPU_MMAP;IOC;IOCFG26;HYST_EN
CPU_MMAP;IOC;IOCFG26;IE
CPU_MMAP;IOC;IOCFG26;WU_CFG
CPU_MMAP;IOC;IOCFG26;IOMODE
CPU_MMAP;IOC;IOCFG26;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG26;IOMODE;INV
CPU_MMAP;IOC;IOCFG26;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG26;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG26;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG26;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG26;RESERVED21
CPU_MMAP;IOC;IOCFG26;TDI
CPU_MMAP;IOC;IOCFG26;TDO
CPU_MMAP;IOC;IOCFG26;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG26;EDGE_DET
CPU_MMAP;IOC;IOCFG26;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG26;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG26;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG26;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG26;RESERVED15
CPU_MMAP;IOC;IOCFG26;PULL_CTL
CPU_MMAP;IOC;IOCFG26;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG26;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG26;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG26;SLEW_RED
CPU_MMAP;IOC;IOCFG26;IOCURR
CPU_MMAP;IOC;IOCFG26;IOCURR;2MA
CPU_MMAP;IOC;IOCFG26;IOCURR;4MA
CPU_MMAP;IOC;IOCFG26;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG26;IOSTR
CPU_MMAP;IOC;IOCFG26;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG26;IOSTR;MIN
CPU_MMAP;IOC;IOCFG26;IOSTR;MED
CPU_MMAP;IOC;IOCFG26;IOSTR;MAX
CPU_MMAP;IOC;IOCFG26;RESERVED6
CPU_MMAP;IOC;IOCFG26;PORT_ID
CPU_MMAP;IOC;IOCFG26;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG26;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG26;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG26;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG26;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG26;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG26;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG26;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG26;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG26;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG26;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG26;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG26;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG26;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG26;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG26;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG26;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG26;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG26;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG26;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG26;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG26;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG27
CPU_MMAP;IOC;IOCFG27;RESERVED31
CPU_MMAP;IOC;IOCFG27;HYST_EN
CPU_MMAP;IOC;IOCFG27;IE
CPU_MMAP;IOC;IOCFG27;WU_CFG
CPU_MMAP;IOC;IOCFG27;IOMODE
CPU_MMAP;IOC;IOCFG27;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG27;IOMODE;INV
CPU_MMAP;IOC;IOCFG27;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG27;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG27;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG27;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG27;RESERVED21
CPU_MMAP;IOC;IOCFG27;TDI
CPU_MMAP;IOC;IOCFG27;TDO
CPU_MMAP;IOC;IOCFG27;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG27;EDGE_DET
CPU_MMAP;IOC;IOCFG27;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG27;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG27;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG27;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG27;RESERVED15
CPU_MMAP;IOC;IOCFG27;PULL_CTL
CPU_MMAP;IOC;IOCFG27;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG27;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG27;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG27;SLEW_RED
CPU_MMAP;IOC;IOCFG27;IOCURR
CPU_MMAP;IOC;IOCFG27;IOCURR;2MA
CPU_MMAP;IOC;IOCFG27;IOCURR;4MA
CPU_MMAP;IOC;IOCFG27;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG27;IOSTR
CPU_MMAP;IOC;IOCFG27;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG27;IOSTR;MIN
CPU_MMAP;IOC;IOCFG27;IOSTR;MED
CPU_MMAP;IOC;IOCFG27;IOSTR;MAX
CPU_MMAP;IOC;IOCFG27;RESERVED6
CPU_MMAP;IOC;IOCFG27;PORT_ID
CPU_MMAP;IOC;IOCFG27;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG27;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG27;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG27;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG27;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG27;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG27;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG27;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG27;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG27;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG27;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG27;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG27;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG27;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG27;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG27;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG27;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG27;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG27;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG27;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG27;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG27;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG28
CPU_MMAP;IOC;IOCFG28;RESERVED31
CPU_MMAP;IOC;IOCFG28;HYST_EN
CPU_MMAP;IOC;IOCFG28;IE
CPU_MMAP;IOC;IOCFG28;WU_CFG
CPU_MMAP;IOC;IOCFG28;IOMODE
CPU_MMAP;IOC;IOCFG28;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG28;IOMODE;INV
CPU_MMAP;IOC;IOCFG28;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG28;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG28;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG28;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG28;RESERVED21
CPU_MMAP;IOC;IOCFG28;TDI
CPU_MMAP;IOC;IOCFG28;TDO
CPU_MMAP;IOC;IOCFG28;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG28;EDGE_DET
CPU_MMAP;IOC;IOCFG28;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG28;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG28;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG28;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG28;RESERVED15
CPU_MMAP;IOC;IOCFG28;PULL_CTL
CPU_MMAP;IOC;IOCFG28;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG28;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG28;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG28;SLEW_RED
CPU_MMAP;IOC;IOCFG28;IOCURR
CPU_MMAP;IOC;IOCFG28;IOCURR;2MA
CPU_MMAP;IOC;IOCFG28;IOCURR;4MA
CPU_MMAP;IOC;IOCFG28;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG28;IOSTR
CPU_MMAP;IOC;IOCFG28;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG28;IOSTR;MIN
CPU_MMAP;IOC;IOCFG28;IOSTR;MED
CPU_MMAP;IOC;IOCFG28;IOSTR;MAX
CPU_MMAP;IOC;IOCFG28;RESERVED6
CPU_MMAP;IOC;IOCFG28;PORT_ID
CPU_MMAP;IOC;IOCFG28;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG28;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG28;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG28;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG28;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG28;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG28;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG28;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG28;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG28;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG28;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG28;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG28;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG28;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG28;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG28;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG28;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG28;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG28;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG28;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG28;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG28;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG29
CPU_MMAP;IOC;IOCFG29;RESERVED31
CPU_MMAP;IOC;IOCFG29;HYST_EN
CPU_MMAP;IOC;IOCFG29;IE
CPU_MMAP;IOC;IOCFG29;WU_CFG
CPU_MMAP;IOC;IOCFG29;IOMODE
CPU_MMAP;IOC;IOCFG29;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG29;IOMODE;INV
CPU_MMAP;IOC;IOCFG29;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG29;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG29;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG29;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG29;RESERVED21
CPU_MMAP;IOC;IOCFG29;TDI
CPU_MMAP;IOC;IOCFG29;TDO
CPU_MMAP;IOC;IOCFG29;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG29;EDGE_DET
CPU_MMAP;IOC;IOCFG29;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG29;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG29;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG29;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG29;RESERVED15
CPU_MMAP;IOC;IOCFG29;PULL_CTL
CPU_MMAP;IOC;IOCFG29;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG29;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG29;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG29;SLEW_RED
CPU_MMAP;IOC;IOCFG29;IOCURR
CPU_MMAP;IOC;IOCFG29;IOCURR;2MA
CPU_MMAP;IOC;IOCFG29;IOCURR;4MA
CPU_MMAP;IOC;IOCFG29;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG29;IOSTR
CPU_MMAP;IOC;IOCFG29;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG29;IOSTR;MIN
CPU_MMAP;IOC;IOCFG29;IOSTR;MED
CPU_MMAP;IOC;IOCFG29;IOSTR;MAX
CPU_MMAP;IOC;IOCFG29;RESERVED6
CPU_MMAP;IOC;IOCFG29;PORT_ID
CPU_MMAP;IOC;IOCFG29;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG29;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG29;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG29;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG29;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG29;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG29;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG29;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG29;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG29;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG29;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG29;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG29;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG29;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG29;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG29;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG29;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG29;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG29;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG29;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG29;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG29;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG30
CPU_MMAP;IOC;IOCFG30;RESERVED31
CPU_MMAP;IOC;IOCFG30;HYST_EN
CPU_MMAP;IOC;IOCFG30;IE
CPU_MMAP;IOC;IOCFG30;WU_CFG
CPU_MMAP;IOC;IOCFG30;IOMODE
CPU_MMAP;IOC;IOCFG30;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG30;IOMODE;INV
CPU_MMAP;IOC;IOCFG30;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG30;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG30;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG30;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG30;RESERVED21
CPU_MMAP;IOC;IOCFG30;TDI
CPU_MMAP;IOC;IOCFG30;TDO
CPU_MMAP;IOC;IOCFG30;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG30;EDGE_DET
CPU_MMAP;IOC;IOCFG30;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG30;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG30;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG30;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG30;RESERVED15
CPU_MMAP;IOC;IOCFG30;PULL_CTL
CPU_MMAP;IOC;IOCFG30;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG30;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG30;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG30;SLEW_RED
CPU_MMAP;IOC;IOCFG30;IOCURR
CPU_MMAP;IOC;IOCFG30;IOCURR;2MA
CPU_MMAP;IOC;IOCFG30;IOCURR;4MA
CPU_MMAP;IOC;IOCFG30;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG30;IOSTR
CPU_MMAP;IOC;IOCFG30;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG30;IOSTR;MIN
CPU_MMAP;IOC;IOCFG30;IOSTR;MED
CPU_MMAP;IOC;IOCFG30;IOSTR;MAX
CPU_MMAP;IOC;IOCFG30;RESERVED6
CPU_MMAP;IOC;IOCFG30;PORT_ID
CPU_MMAP;IOC;IOCFG30;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG30;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG30;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG30;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG30;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG30;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG30;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG30;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG30;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG30;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG30;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG30;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG30;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG30;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG30;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG30;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG30;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG30;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG30;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG30;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG30;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG30;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;IOC;IOCFG31
CPU_MMAP;IOC;IOCFG31;RESERVED31
CPU_MMAP;IOC;IOCFG31;HYST_EN
CPU_MMAP;IOC;IOCFG31;IE
CPU_MMAP;IOC;IOCFG31;WU_CFG
CPU_MMAP;IOC;IOCFG31;IOMODE
CPU_MMAP;IOC;IOCFG31;IOMODE;NORMAL
CPU_MMAP;IOC;IOCFG31;IOMODE;INV
CPU_MMAP;IOC;IOCFG31;IOMODE;OPENDR
CPU_MMAP;IOC;IOCFG31;IOMODE;OPENDR_INV
CPU_MMAP;IOC;IOCFG31;IOMODE;OPENSRC
CPU_MMAP;IOC;IOCFG31;IOMODE;OPENSRC_INV
CPU_MMAP;IOC;IOCFG31;RESERVED21
CPU_MMAP;IOC;IOCFG31;TDI
CPU_MMAP;IOC;IOCFG31;TDO
CPU_MMAP;IOC;IOCFG31;EDGE_IRQ_EN
CPU_MMAP;IOC;IOCFG31;EDGE_DET
CPU_MMAP;IOC;IOCFG31;EDGE_DET;NONE
CPU_MMAP;IOC;IOCFG31;EDGE_DET;NEG
CPU_MMAP;IOC;IOCFG31;EDGE_DET;POS
CPU_MMAP;IOC;IOCFG31;EDGE_DET;BOTH
CPU_MMAP;IOC;IOCFG31;RESERVED15
CPU_MMAP;IOC;IOCFG31;PULL_CTL
CPU_MMAP;IOC;IOCFG31;PULL_CTL;DWN
CPU_MMAP;IOC;IOCFG31;PULL_CTL;UP
CPU_MMAP;IOC;IOCFG31;PULL_CTL;DIS
CPU_MMAP;IOC;IOCFG31;SLEW_RED
CPU_MMAP;IOC;IOCFG31;IOCURR
CPU_MMAP;IOC;IOCFG31;IOCURR;2MA
CPU_MMAP;IOC;IOCFG31;IOCURR;4MA
CPU_MMAP;IOC;IOCFG31;IOCURR;4_8MA
CPU_MMAP;IOC;IOCFG31;IOSTR
CPU_MMAP;IOC;IOCFG31;IOSTR;AUTO
CPU_MMAP;IOC;IOCFG31;IOSTR;MIN
CPU_MMAP;IOC;IOCFG31;IOSTR;MED
CPU_MMAP;IOC;IOCFG31;IOSTR;MAX
CPU_MMAP;IOC;IOCFG31;RESERVED6
CPU_MMAP;IOC;IOCFG31;PORT_ID
CPU_MMAP;IOC;IOCFG31;PORT_ID;GPIO
CPU_MMAP;IOC;IOCFG31;PORT_ID;AON_SCS
CPU_MMAP;IOC;IOCFG31;PORT_ID;AON_SCK
CPU_MMAP;IOC;IOCFG31;PORT_ID;AON_SDI
CPU_MMAP;IOC;IOCFG31;PORT_ID;AON_SDO
CPU_MMAP;IOC;IOCFG31;PORT_ID;AON_CLK32K
CPU_MMAP;IOC;IOCFG31;PORT_ID;AUX_IO
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI0_RX
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI0_TX
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI0_FSS
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI0_CLK
CPU_MMAP;IOC;IOCFG31;PORT_ID;I2C_MSSDA
CPU_MMAP;IOC;IOCFG31;PORT_ID;I2C_MSSCL
CPU_MMAP;IOC;IOCFG31;PORT_ID;UART0_RX
CPU_MMAP;IOC;IOCFG31;PORT_ID;UART0_TX
CPU_MMAP;IOC;IOCFG31;PORT_ID;UART0_CTS
CPU_MMAP;IOC;IOCFG31;PORT_ID;UART0_RTS
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT0
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT1
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT2
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT3
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT4
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT5
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT6
CPU_MMAP;IOC;IOCFG31;PORT_ID;PORT_EVENT7
CPU_MMAP;IOC;IOCFG31;PORT_ID;CPU_SWV
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI1_RX
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI1_TX
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI1_FSS
CPU_MMAP;IOC;IOCFG31;PORT_ID;SSI1_CLK
CPU_MMAP;IOC;IOCFG31;PORT_ID;I2S_AD0
CPU_MMAP;IOC;IOCFG31;PORT_ID;I2S_AD1
CPU_MMAP;IOC;IOCFG31;PORT_ID;I2S_WCLK
CPU_MMAP;IOC;IOCFG31;PORT_ID;I2S_BCLK
CPU_MMAP;IOC;IOCFG31;PORT_ID;I2S_MCLK
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_TRC
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_GPO0
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_GPO1
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_GPO2
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_GPO3
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_GPI0
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_GPI1
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_SMI_DL_OUT
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_SMI_DL_IN
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_SMI_CL_OUT
CPU_MMAP;IOC;IOCFG31;PORT_ID;RFC_SMI_CL_IN
CPU_MMAP;PRCM
CPU_MMAP;PRCM;INFRCLKDIVR
CPU_MMAP;PRCM;INFRCLKDIVR;RESERVED2
CPU_MMAP;PRCM;INFRCLKDIVR;RATIO
CPU_MMAP;PRCM;INFRCLKDIVR;RATIO;DIV1
CPU_MMAP;PRCM;INFRCLKDIVR;RATIO;DIV2
CPU_MMAP;PRCM;INFRCLKDIVR;RATIO;DIV8
CPU_MMAP;PRCM;INFRCLKDIVR;RATIO;DIV32
CPU_MMAP;PRCM;INFRCLKDIVS
CPU_MMAP;PRCM;INFRCLKDIVS;RESERVED2
CPU_MMAP;PRCM;INFRCLKDIVS;RATIO
CPU_MMAP;PRCM;INFRCLKDIVS;RATIO;DIV1
CPU_MMAP;PRCM;INFRCLKDIVS;RATIO;DIV2
CPU_MMAP;PRCM;INFRCLKDIVS;RATIO;DIV8
CPU_MMAP;PRCM;INFRCLKDIVS;RATIO;DIV32
CPU_MMAP;PRCM;INFRCLKDIVDS
CPU_MMAP;PRCM;INFRCLKDIVDS;RESERVED2
CPU_MMAP;PRCM;INFRCLKDIVDS;RATIO
CPU_MMAP;PRCM;INFRCLKDIVDS;RATIO;DIV1
CPU_MMAP;PRCM;INFRCLKDIVDS;RATIO;DIV2
CPU_MMAP;PRCM;INFRCLKDIVDS;RATIO;DIV8
CPU_MMAP;PRCM;INFRCLKDIVDS;RATIO;DIV32
CPU_MMAP;PRCM;VDCTL
CPU_MMAP;PRCM;VDCTL;RESERVED4
CPU_MMAP;PRCM;VDCTL;RESERVED3
CPU_MMAP;PRCM;VDCTL;MCU_VD
CPU_MMAP;PRCM;VDCTL;RESERVED1
CPU_MMAP;PRCM;VDCTL;ULDO
CPU_MMAP;PRCM;CLKLOADCTL
CPU_MMAP;PRCM;CLKLOADCTL;RESERVED2
CPU_MMAP;PRCM;CLKLOADCTL;LOAD_DONE
CPU_MMAP;PRCM;CLKLOADCTL;LOAD
CPU_MMAP;PRCM;RFCCLKG
CPU_MMAP;PRCM;RFCCLKG;RESERVED1
CPU_MMAP;PRCM;RFCCLKG;CLK_EN
CPU_MMAP;PRCM;VIMSCLKG
CPU_MMAP;PRCM;VIMSCLKG;RESERVED2
CPU_MMAP;PRCM;VIMSCLKG;CLK_EN
CPU_MMAP;PRCM;SECDMACLKGR
CPU_MMAP;PRCM;SECDMACLKGR;RESERVED9
CPU_MMAP;PRCM;SECDMACLKGR;DMA_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGR;RESERVED2
CPU_MMAP;PRCM;SECDMACLKGR;TRNG_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGR;CRYPTO_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGS
CPU_MMAP;PRCM;SECDMACLKGS;RESERVED9
CPU_MMAP;PRCM;SECDMACLKGS;DMA_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGS;RESERVED2
CPU_MMAP;PRCM;SECDMACLKGS;TRNG_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGS;CRYPTO_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGDS
CPU_MMAP;PRCM;SECDMACLKGDS;RESERVED9
CPU_MMAP;PRCM;SECDMACLKGDS;DMA_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGDS;RESERVED2
CPU_MMAP;PRCM;SECDMACLKGDS;TRNG_CLK_EN
CPU_MMAP;PRCM;SECDMACLKGDS;CRYPTO_CLK_EN
CPU_MMAP;PRCM;GPIOCLKGR
CPU_MMAP;PRCM;GPIOCLKGR;RESERVED1
CPU_MMAP;PRCM;GPIOCLKGR;CLK_EN
CPU_MMAP;PRCM;GPIOCLKGS
CPU_MMAP;PRCM;GPIOCLKGS;RESERVED1
CPU_MMAP;PRCM;GPIOCLKGS;CLK_EN
CPU_MMAP;PRCM;GPIOCLKGDS
CPU_MMAP;PRCM;GPIOCLKGDS;RESERVED1
CPU_MMAP;PRCM;GPIOCLKGDS;CLK_EN
CPU_MMAP;PRCM;GPTCLKGR
CPU_MMAP;PRCM;GPTCLKGR;RESERVED4
CPU_MMAP;PRCM;GPTCLKGR;CLK_EN
CPU_MMAP;PRCM;GPTCLKGR;CLK_EN;GPT0
CPU_MMAP;PRCM;GPTCLKGR;CLK_EN;GPT1
CPU_MMAP;PRCM;GPTCLKGR;CLK_EN;GPT2
CPU_MMAP;PRCM;GPTCLKGR;CLK_EN;GPT3
CPU_MMAP;PRCM;GPTCLKGS
CPU_MMAP;PRCM;GPTCLKGS;RESERVED4
CPU_MMAP;PRCM;GPTCLKGS;CLK_EN
CPU_MMAP;PRCM;GPTCLKGS;CLK_EN;GPT0
CPU_MMAP;PRCM;GPTCLKGS;CLK_EN;GPT1
CPU_MMAP;PRCM;GPTCLKGS;CLK_EN;GPT2
CPU_MMAP;PRCM;GPTCLKGS;CLK_EN;GPT3
CPU_MMAP;PRCM;GPTCLKGDS
CPU_MMAP;PRCM;GPTCLKGDS;RESERVED4
CPU_MMAP;PRCM;GPTCLKGDS;CLK_EN
CPU_MMAP;PRCM;GPTCLKGDS;CLK_EN;GPT0
CPU_MMAP;PRCM;GPTCLKGDS;CLK_EN;GPT1
CPU_MMAP;PRCM;GPTCLKGDS;CLK_EN;GPT2
CPU_MMAP;PRCM;GPTCLKGDS;CLK_EN;GPT3
CPU_MMAP;PRCM;I2CCLKGR
CPU_MMAP;PRCM;I2CCLKGR;RESERVED2
CPU_MMAP;PRCM;I2CCLKGR;RESERVED1
CPU_MMAP;PRCM;I2CCLKGR;CLK_EN
CPU_MMAP;PRCM;I2CCLKGS
CPU_MMAP;PRCM;I2CCLKGS;RESERVED2
CPU_MMAP;PRCM;I2CCLKGS;RESERVED1
CPU_MMAP;PRCM;I2CCLKGS;CLK_EN
CPU_MMAP;PRCM;I2CCLKGDS
CPU_MMAP;PRCM;I2CCLKGDS;RESERVED2
CPU_MMAP;PRCM;I2CCLKGDS;RESERVED1
CPU_MMAP;PRCM;I2CCLKGDS;CLK_EN
CPU_MMAP;PRCM;UARTCLKGR
CPU_MMAP;PRCM;UARTCLKGR;RESERVED2
CPU_MMAP;PRCM;UARTCLKGR;RESERVED1
CPU_MMAP;PRCM;UARTCLKGR;CLK_EN
CPU_MMAP;PRCM;UARTCLKGS
CPU_MMAP;PRCM;UARTCLKGS;RESERVED2
CPU_MMAP;PRCM;UARTCLKGS;RESERVED1
CPU_MMAP;PRCM;UARTCLKGS;CLK_EN
CPU_MMAP;PRCM;UARTCLKGDS
CPU_MMAP;PRCM;UARTCLKGDS;RESERVED2
CPU_MMAP;PRCM;UARTCLKGDS;RESERVED1
CPU_MMAP;PRCM;UARTCLKGDS;CLK_EN
CPU_MMAP;PRCM;SSICLKGR
CPU_MMAP;PRCM;SSICLKGR;RESERVED2
CPU_MMAP;PRCM;SSICLKGR;CLK_EN
CPU_MMAP;PRCM;SSICLKGR;CLK_EN;SSI0
CPU_MMAP;PRCM;SSICLKGR;CLK_EN;SSI1
CPU_MMAP;PRCM;SSICLKGS
CPU_MMAP;PRCM;SSICLKGS;RESERVED2
CPU_MMAP;PRCM;SSICLKGS;CLK_EN
CPU_MMAP;PRCM;SSICLKGS;CLK_EN;SSI0
CPU_MMAP;PRCM;SSICLKGS;CLK_EN;SSI1
CPU_MMAP;PRCM;SSICLKGDS
CPU_MMAP;PRCM;SSICLKGDS;RESERVED2
CPU_MMAP;PRCM;SSICLKGDS;CLK_EN
CPU_MMAP;PRCM;SSICLKGDS;CLK_EN;SSI0
CPU_MMAP;PRCM;SSICLKGDS;CLK_EN;SSI1
CPU_MMAP;PRCM;I2SCLKGR
CPU_MMAP;PRCM;I2SCLKGR;RESERVED
CPU_MMAP;PRCM;I2SCLKGR;CLK_EN
CPU_MMAP;PRCM;I2SCLKGS
CPU_MMAP;PRCM;I2SCLKGS;RESERVED
CPU_MMAP;PRCM;I2SCLKGS;CLK_EN
CPU_MMAP;PRCM;I2SCLKGDS
CPU_MMAP;PRCM;I2SCLKGDS;RESERVED
CPU_MMAP;PRCM;I2SCLKGDS;CLK_EN
CPU_MMAP;PRCM;SYSBUSCLKDIV
CPU_MMAP;PRCM;SYSBUSCLKDIV;RESERVED
CPU_MMAP;PRCM;SYSBUSCLKDIV;RATIO
CPU_MMAP;PRCM;SYSBUSCLKDIV;RATIO;DIV1
CPU_MMAP;PRCM;SYSBUSCLKDIV;RATIO;DIV2
CPU_MMAP;PRCM;SYSBUSCLKDIV;RATIO;DIV4
CPU_MMAP;PRCM;SYSBUSCLKDIV;RATIO;DIV8
CPU_MMAP;PRCM;SYSBUSCLKDIV;RATIO;DIV16
CPU_MMAP;PRCM;SYSBUSCLKDIV;RATIO;DIV32
CPU_MMAP;PRCM;CPUCLKDIV
CPU_MMAP;PRCM;CPUCLKDIV;RESERVED1
CPU_MMAP;PRCM;CPUCLKDIV;RATIO
CPU_MMAP;PRCM;CPUCLKDIV;RATIO;DIV1
CPU_MMAP;PRCM;CPUCLKDIV;RATIO;DIV2
CPU_MMAP;PRCM;PERBUSCPUCLKDIV
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RESERVED4
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV1
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV2
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV4
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV8
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV16
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV32
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV64
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV128
CPU_MMAP;PRCM;PERBUSCPUCLKDIV;RATIO;DIV256
CPU_MMAP;PRCM;PERDMACLKDIV
CPU_MMAP;PRCM;PERDMACLKDIV;RESERVED4
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV1
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV2
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV4
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV8
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV16
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV32
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV64
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV128
CPU_MMAP;PRCM;PERDMACLKDIV;RATIO;DIV256
CPU_MMAP;PRCM;I2SBCLKSEL
CPU_MMAP;PRCM;I2SBCLKSEL;RESERVED3
CPU_MMAP;PRCM;I2SBCLKSEL;SPARE
CPU_MMAP;PRCM;I2SBCLKSEL;SRC
CPU_MMAP;PRCM;GPTCLKDIV
CPU_MMAP;PRCM;GPTCLKDIV;RESERVED4
CPU_MMAP;PRCM;GPTCLKDIV;RATIO
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV1
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV2
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV4
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV8
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV16
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV32
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV64
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV128
CPU_MMAP;PRCM;GPTCLKDIV;RATIO;DIV256
CPU_MMAP;PRCM;I2SCLKCTL
CPU_MMAP;PRCM;I2SCLKCTL;RESERVED4
CPU_MMAP;PRCM;I2SCLKCTL;SMPL_ON_POSEDGE
CPU_MMAP;PRCM;I2SCLKCTL;WCLK_PHASE
CPU_MMAP;PRCM;I2SCLKCTL;EN
CPU_MMAP;PRCM;I2SMCLKDIV
CPU_MMAP;PRCM;I2SMCLKDIV;RESERVED10
CPU_MMAP;PRCM;I2SMCLKDIV;MDIV
CPU_MMAP;PRCM;I2SBCLKDIV
CPU_MMAP;PRCM;I2SBCLKDIV;RESERVED10
CPU_MMAP;PRCM;I2SBCLKDIV;BDIV
CPU_MMAP;PRCM;I2SWCLKDIV
CPU_MMAP;PRCM;I2SWCLKDIV;RESERVED16
CPU_MMAP;PRCM;I2SWCLKDIV;WDIV
CPU_MMAP;PRCM;RESETSECDMA
CPU_MMAP;PRCM;RESETSECDMA;RESERVED9
CPU_MMAP;PRCM;RESETSECDMA;DMA
CPU_MMAP;PRCM;RESETSECDMA;RESERVED2
CPU_MMAP;PRCM;RESETSECDMA;TRNG
CPU_MMAP;PRCM;RESETSECDMA;CRYPTO
CPU_MMAP;PRCM;RESETGPIO
CPU_MMAP;PRCM;RESETGPIO;RESERVED1
CPU_MMAP;PRCM;RESETGPIO;GPIO
CPU_MMAP;PRCM;RESETGPT
CPU_MMAP;PRCM;RESETGPT;RESERVED4
CPU_MMAP;PRCM;RESETGPT;GPT
CPU_MMAP;PRCM;RESETGPT;GPT;GPT0
CPU_MMAP;PRCM;RESETGPT;GPT;GPT1
CPU_MMAP;PRCM;RESETGPT;GPT;GPT2
CPU_MMAP;PRCM;RESETGPT;GPT;GPT3
CPU_MMAP;PRCM;RESETI2C
CPU_MMAP;PRCM;RESETI2C;RESERVED2
CPU_MMAP;PRCM;RESETI2C;SPARE
CPU_MMAP;PRCM;RESETI2C;I2C
CPU_MMAP;PRCM;RESETUART
CPU_MMAP;PRCM;RESETUART;RESERVED2
CPU_MMAP;PRCM;RESETUART;SPARE
CPU_MMAP;PRCM;RESETUART;UART
CPU_MMAP;PRCM;RESETSSI
CPU_MMAP;PRCM;RESETSSI;RESERVED
CPU_MMAP;PRCM;RESETSSI;SSI
CPU_MMAP;PRCM;RESETI2S
CPU_MMAP;PRCM;RESETI2S;RESERVED
CPU_MMAP;PRCM;RESETI2S;I2S
CPU_MMAP;PRCM;SWRESET
CPU_MMAP;PRCM;SWRESET;RESERVED3
CPU_MMAP;PRCM;SWRESET;MCU
CPU_MMAP;PRCM;SWRESET;RFC
CPU_MMAP;PRCM;SWRESET;CPU
CPU_MMAP;PRCM;WARMRESET
CPU_MMAP;PRCM;WARMRESET;RESERVED3
CPU_MMAP;PRCM;WARMRESET;WR_TO_PINRESET
CPU_MMAP;PRCM;WARMRESET;LOCKUP_STAT
CPU_MMAP;PRCM;WARMRESET;WDT_STAT
CPU_MMAP;PRCM;PDCTL0
CPU_MMAP;PRCM;PDCTL0;RESERVED3
CPU_MMAP;PRCM;PDCTL0;PERIPH_ON
CPU_MMAP;PRCM;PDCTL0;SERIAL_ON
CPU_MMAP;PRCM;PDCTL0;RFC_ON
CPU_MMAP;PRCM;PDCTL0RFC
CPU_MMAP;PRCM;PDCTL0RFC;RESERVED1
CPU_MMAP;PRCM;PDCTL0RFC;ON
CPU_MMAP;PRCM;PDCTL0SERIAL
CPU_MMAP;PRCM;PDCTL0SERIAL;RESERVED1
CPU_MMAP;PRCM;PDCTL0SERIAL;ON
CPU_MMAP;PRCM;PDCTL0PERIPH
CPU_MMAP;PRCM;PDCTL0PERIPH;RESERVED1
CPU_MMAP;PRCM;PDCTL0PERIPH;ON
CPU_MMAP;PRCM;PDSTAT0
CPU_MMAP;PRCM;PDSTAT0;RESERVED3
CPU_MMAP;PRCM;PDSTAT0;PERIPH_ON
CPU_MMAP;PRCM;PDSTAT0;SERIAL_ON
CPU_MMAP;PRCM;PDSTAT0;RFC_ON
CPU_MMAP;PRCM;PDSTAT0RFC
CPU_MMAP;PRCM;PDSTAT0RFC;RESERVED1
CPU_MMAP;PRCM;PDSTAT0RFC;ON
CPU_MMAP;PRCM;PDSTAT0SERIAL
CPU_MMAP;PRCM;PDSTAT0SERIAL;RESERVED1
CPU_MMAP;PRCM;PDSTAT0SERIAL;ON
CPU_MMAP;PRCM;PDSTAT0PERIPH
CPU_MMAP;PRCM;PDSTAT0PERIPH;RESERVED1
CPU_MMAP;PRCM;PDSTAT0PERIPH;ON
CPU_MMAP;PRCM;PDCTL1
CPU_MMAP;PRCM;PDCTL1;RESERVED5
CPU_MMAP;PRCM;PDCTL1;RESERVED4
CPU_MMAP;PRCM;PDCTL1;VIMS_MODE
CPU_MMAP;PRCM;PDCTL1;RFC_ON
CPU_MMAP;PRCM;PDCTL1;CPU_ON
CPU_MMAP;PRCM;PDCTL1;RESERVED0
CPU_MMAP;PRCM;PDCTL1CPU
CPU_MMAP;PRCM;PDCTL1CPU;RESERVED1
CPU_MMAP;PRCM;PDCTL1CPU;ON
CPU_MMAP;PRCM;PDCTL1RFC
CPU_MMAP;PRCM;PDCTL1RFC;RESERVED1
CPU_MMAP;PRCM;PDCTL1RFC;ON
CPU_MMAP;PRCM;PDCTL1VIMS
CPU_MMAP;PRCM;PDCTL1VIMS;RESERVED1
CPU_MMAP;PRCM;PDCTL1VIMS;ON
CPU_MMAP;PRCM;PDSTAT1
CPU_MMAP;PRCM;PDSTAT1;RESERVED5
CPU_MMAP;PRCM;PDSTAT1;BUS_ON
CPU_MMAP;PRCM;PDSTAT1;VIMS_MODE
CPU_MMAP;PRCM;PDSTAT1;RFC_ON
CPU_MMAP;PRCM;PDSTAT1;CPU_ON
CPU_MMAP;PRCM;PDSTAT1;RESERVED0
CPU_MMAP;PRCM;PDSTAT1BUS
CPU_MMAP;PRCM;PDSTAT1BUS;RESERVED1
CPU_MMAP;PRCM;PDSTAT1BUS;ON
CPU_MMAP;PRCM;PDSTAT1RFC
CPU_MMAP;PRCM;PDSTAT1RFC;RESERVED1
CPU_MMAP;PRCM;PDSTAT1RFC;ON
CPU_MMAP;PRCM;PDSTAT1CPU
CPU_MMAP;PRCM;PDSTAT1CPU;RESERVED1
CPU_MMAP;PRCM;PDSTAT1CPU;ON
CPU_MMAP;PRCM;PDSTAT1VIMS
CPU_MMAP;PRCM;PDSTAT1VIMS;RESERVED1
CPU_MMAP;PRCM;PDSTAT1VIMS;ON
CPU_MMAP;PRCM;RFCMODESEL
CPU_MMAP;PRCM;RFCMODESEL;RESERVED3
CPU_MMAP;PRCM;RFCMODESEL;CURR
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE0
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE1
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE2
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE3
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE4
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE5
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE6
CPU_MMAP;PRCM;RFCMODESEL;CURR;MODE7
CPU_MMAP;PRCM;RAMRETEN
CPU_MMAP;PRCM;RAMRETEN;RESERVED3
CPU_MMAP;PRCM;RAMRETEN;RFC
CPU_MMAP;PRCM;RAMRETEN;VIMS
CPU_MMAP;PRCM;PDRETEN
CPU_MMAP;PRCM;PDRETEN;RESERVED8
CPU_MMAP;PRCM;PDRETEN;SPARE
CPU_MMAP;PRCM;PDRETEN;PERIPH
CPU_MMAP;PRCM;PDRETEN;SERIAL
CPU_MMAP;PRCM;PDRETEN;RFC
CPU_MMAP;PRCM;PDRETEN;BUS
CPU_MMAP;PRCM;PDRETEN;VIMS
CPU_MMAP;PRCM;PDRETEN;CPU
CPU_MMAP;PRCM;PDRETEN;CLKCTL
CPU_MMAP;PRCM;RAMHWOPT
CPU_MMAP;PRCM;RAMHWOPT;RESERVED2
CPU_MMAP;PRCM;RAMHWOPT;SIZE
CPU_MMAP;PRCM;RAMHWOPT;SIZE;4K
CPU_MMAP;PRCM;RAMHWOPT;SIZE;10K
CPU_MMAP;PRCM;RAMHWOPT;SIZE;16K
CPU_MMAP;PRCM;RAMHWOPT;SIZE;20K
CPU_MMAP;EVENT
CPU_MMAP;EVENT;CPUIRQSEL0
CPU_MMAP;EVENT;CPUIRQSEL0;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL0;EV
CPU_MMAP;EVENT;CPUIRQSEL0;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;CPUIRQSEL1
CPU_MMAP;EVENT;CPUIRQSEL1;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL1;EV
CPU_MMAP;EVENT;CPUIRQSEL1;EV;I2C_IRQ
CPU_MMAP;EVENT;CPUIRQSEL2
CPU_MMAP;EVENT;CPUIRQSEL2;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL2;EV
CPU_MMAP;EVENT;CPUIRQSEL2;EV;RFC_CPE_1
CPU_MMAP;EVENT;CPUIRQSEL3
CPU_MMAP;EVENT;CPUIRQSEL3;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL3;EV
CPU_MMAP;EVENT;CPUIRQSEL3;EV;SPIS_COMB
CPU_MMAP;EVENT;CPUIRQSEL4
CPU_MMAP;EVENT;CPUIRQSEL4;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL4;EV
CPU_MMAP;EVENT;CPUIRQSEL4;EV;AON_RTC_COMB
CPU_MMAP;EVENT;CPUIRQSEL5
CPU_MMAP;EVENT;CPUIRQSEL5;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL5;EV
CPU_MMAP;EVENT;CPUIRQSEL5;EV;UART0_COMB
CPU_MMAP;EVENT;CPUIRQSEL6
CPU_MMAP;EVENT;CPUIRQSEL6;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL6;EV
CPU_MMAP;EVENT;CPUIRQSEL6;EV;AUX_SWEV0
CPU_MMAP;EVENT;CPUIRQSEL7
CPU_MMAP;EVENT;CPUIRQSEL7;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL7;EV
CPU_MMAP;EVENT;CPUIRQSEL7;EV;SSI0_COMB
CPU_MMAP;EVENT;CPUIRQSEL8
CPU_MMAP;EVENT;CPUIRQSEL8;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL8;EV
CPU_MMAP;EVENT;CPUIRQSEL8;EV;SSI1_COMB
CPU_MMAP;EVENT;CPUIRQSEL9
CPU_MMAP;EVENT;CPUIRQSEL9;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL9;EV
CPU_MMAP;EVENT;CPUIRQSEL9;EV;RFC_CPE_0
CPU_MMAP;EVENT;CPUIRQSEL10
CPU_MMAP;EVENT;CPUIRQSEL10;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL10;EV
CPU_MMAP;EVENT;CPUIRQSEL10;EV;RFC_HW_COMB
CPU_MMAP;EVENT;CPUIRQSEL11
CPU_MMAP;EVENT;CPUIRQSEL11;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL11;EV
CPU_MMAP;EVENT;CPUIRQSEL11;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;CPUIRQSEL12
CPU_MMAP;EVENT;CPUIRQSEL12;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL12;EV
CPU_MMAP;EVENT;CPUIRQSEL12;EV;I2S_IRQ
CPU_MMAP;EVENT;CPUIRQSEL13
CPU_MMAP;EVENT;CPUIRQSEL13;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL13;EV
CPU_MMAP;EVENT;CPUIRQSEL13;EV;AUX_SWEV1
CPU_MMAP;EVENT;CPUIRQSEL14
CPU_MMAP;EVENT;CPUIRQSEL14;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL14;EV
CPU_MMAP;EVENT;CPUIRQSEL14;EV;WDT_IRQ
CPU_MMAP;EVENT;CPUIRQSEL15
CPU_MMAP;EVENT;CPUIRQSEL15;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL15;EV
CPU_MMAP;EVENT;CPUIRQSEL15;EV;GPT0A
CPU_MMAP;EVENT;CPUIRQSEL16
CPU_MMAP;EVENT;CPUIRQSEL16;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL16;EV
CPU_MMAP;EVENT;CPUIRQSEL16;EV;GPT0B
CPU_MMAP;EVENT;CPUIRQSEL17
CPU_MMAP;EVENT;CPUIRQSEL17;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL17;EV
CPU_MMAP;EVENT;CPUIRQSEL17;EV;GPT1A
CPU_MMAP;EVENT;CPUIRQSEL18
CPU_MMAP;EVENT;CPUIRQSEL18;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL18;EV
CPU_MMAP;EVENT;CPUIRQSEL18;EV;GPT1B
CPU_MMAP;EVENT;CPUIRQSEL19
CPU_MMAP;EVENT;CPUIRQSEL19;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL19;EV
CPU_MMAP;EVENT;CPUIRQSEL19;EV;GPT2A
CPU_MMAP;EVENT;CPUIRQSEL20
CPU_MMAP;EVENT;CPUIRQSEL20;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL20;EV
CPU_MMAP;EVENT;CPUIRQSEL20;EV;GPT2B
CPU_MMAP;EVENT;CPUIRQSEL21
CPU_MMAP;EVENT;CPUIRQSEL21;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL21;EV
CPU_MMAP;EVENT;CPUIRQSEL21;EV;GPT3A
CPU_MMAP;EVENT;CPUIRQSEL22
CPU_MMAP;EVENT;CPUIRQSEL22;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL22;EV
CPU_MMAP;EVENT;CPUIRQSEL22;EV;GPT3B
CPU_MMAP;EVENT;CPUIRQSEL23
CPU_MMAP;EVENT;CPUIRQSEL23;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL23;EV
CPU_MMAP;EVENT;CPUIRQSEL23;EV;CRYPTO_RESULT_AVAIL_IRQ
CPU_MMAP;EVENT;CPUIRQSEL24
CPU_MMAP;EVENT;CPUIRQSEL24;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL24;EV
CPU_MMAP;EVENT;CPUIRQSEL24;EV;DMA_DONE_COMB
CPU_MMAP;EVENT;CPUIRQSEL25
CPU_MMAP;EVENT;CPUIRQSEL25;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL25;EV
CPU_MMAP;EVENT;CPUIRQSEL25;EV;DMA_ERR
CPU_MMAP;EVENT;CPUIRQSEL26
CPU_MMAP;EVENT;CPUIRQSEL26;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL26;EV
CPU_MMAP;EVENT;CPUIRQSEL26;EV;FLASH
CPU_MMAP;EVENT;CPUIRQSEL27
CPU_MMAP;EVENT;CPUIRQSEL27;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL27;EV
CPU_MMAP;EVENT;CPUIRQSEL27;EV;SWEV0
CPU_MMAP;EVENT;CPUIRQSEL28
CPU_MMAP;EVENT;CPUIRQSEL28;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL28;EV
CPU_MMAP;EVENT;CPUIRQSEL28;EV;AUX_COMB
CPU_MMAP;EVENT;CPUIRQSEL29
CPU_MMAP;EVENT;CPUIRQSEL29;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL29;EV
CPU_MMAP;EVENT;CPUIRQSEL29;EV;AON_PROG0
CPU_MMAP;EVENT;CPUIRQSEL30
CPU_MMAP;EVENT;CPUIRQSEL30;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL30;EV
CPU_MMAP;EVENT;CPUIRQSEL30;EV;NONE
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AON_PROG1
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AON_PROG2
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AON_SPIS_CS
CPU_MMAP;EVENT;CPUIRQSEL30;EV;I2S_IRQ
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AON_AUX_SWEV0
CPU_MMAP;EVENT;CPUIRQSEL30;EV;DMA_CH0_DONE
CPU_MMAP;EVENT;CPUIRQSEL30;EV;DMA_CH18_DONE
CPU_MMAP;EVENT;CPUIRQSEL30;EV;CRYPTO_DMA_DONE_IRQ
CPU_MMAP;EVENT;CPUIRQSEL30;EV;RFC_IN_EV4
CPU_MMAP;EVENT;CPUIRQSEL30;EV;RFC_IN_EV5
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_COMPB
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;CPUIRQSEL30;EV;AON_RTC_UPD
CPU_MMAP;EVENT;CPUIRQSEL30;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;CPUIRQSEL31
CPU_MMAP;EVENT;CPUIRQSEL31;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL31;EV
CPU_MMAP;EVENT;CPUIRQSEL31;EV;AUX_COMPA
CPU_MMAP;EVENT;CPUIRQSEL32
CPU_MMAP;EVENT;CPUIRQSEL32;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL32;EV
CPU_MMAP;EVENT;CPUIRQSEL32;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;CPUIRQSEL33
CPU_MMAP;EVENT;CPUIRQSEL33;RESERVED
CPU_MMAP;EVENT;CPUIRQSEL33;EV
CPU_MMAP;EVENT;CPUIRQSEL33;EV;TRNG_IRQ
CPU_MMAP;EVENT;RFCSEL0
CPU_MMAP;EVENT;RFCSEL0;RESERVED
CPU_MMAP;EVENT;RFCSEL0;EV
CPU_MMAP;EVENT;RFCSEL0;EV;GPT0A_CMP
CPU_MMAP;EVENT;RFCSEL1
CPU_MMAP;EVENT;RFCSEL1;RESERVED
CPU_MMAP;EVENT;RFCSEL1;EV
CPU_MMAP;EVENT;RFCSEL1;EV;GPT0B_CMP
CPU_MMAP;EVENT;RFCSEL2
CPU_MMAP;EVENT;RFCSEL2;RESERVED
CPU_MMAP;EVENT;RFCSEL2;EV
CPU_MMAP;EVENT;RFCSEL2;EV;GPT1A_CMP
CPU_MMAP;EVENT;RFCSEL3
CPU_MMAP;EVENT;RFCSEL3;RESERVED
CPU_MMAP;EVENT;RFCSEL3;EV
CPU_MMAP;EVENT;RFCSEL3;EV;GPT1B_CMP
CPU_MMAP;EVENT;RFCSEL4
CPU_MMAP;EVENT;RFCSEL4;RESERVED
CPU_MMAP;EVENT;RFCSEL4;EV
CPU_MMAP;EVENT;RFCSEL4;EV;GPT2A_CMP
CPU_MMAP;EVENT;RFCSEL5
CPU_MMAP;EVENT;RFCSEL5;RESERVED
CPU_MMAP;EVENT;RFCSEL5;EV
CPU_MMAP;EVENT;RFCSEL5;EV;GPT2B_CMP
CPU_MMAP;EVENT;RFCSEL6
CPU_MMAP;EVENT;RFCSEL6;RESERVED
CPU_MMAP;EVENT;RFCSEL6;EV
CPU_MMAP;EVENT;RFCSEL6;EV;GPT3A_CMP
CPU_MMAP;EVENT;RFCSEL7
CPU_MMAP;EVENT;RFCSEL7;RESERVED
CPU_MMAP;EVENT;RFCSEL7;EV
CPU_MMAP;EVENT;RFCSEL7;EV;GPT3B_CMP
CPU_MMAP;EVENT;RFCSEL8
CPU_MMAP;EVENT;RFCSEL8;RESERVED
CPU_MMAP;EVENT;RFCSEL8;EV
CPU_MMAP;EVENT;RFCSEL8;EV;AON_RTC_UPD
CPU_MMAP;EVENT;RFCSEL9
CPU_MMAP;EVENT;RFCSEL9;RESERVED
CPU_MMAP;EVENT;RFCSEL9;EV
CPU_MMAP;EVENT;RFCSEL9;EV;NONE
CPU_MMAP;EVENT;RFCSEL9;EV;AON_PROG0
CPU_MMAP;EVENT;RFCSEL9;EV;AON_PROG1
CPU_MMAP;EVENT;RFCSEL9;EV;I2S_IRQ
CPU_MMAP;EVENT;RFCSEL9;EV;AON_AUX_SWEV0
CPU_MMAP;EVENT;RFCSEL9;EV;WDT_IRQ
CPU_MMAP;EVENT;RFCSEL9;EV;SSI0_COMB
CPU_MMAP;EVENT;RFCSEL9;EV;SSI1_COMB
CPU_MMAP;EVENT;RFCSEL9;EV;UART0_COMB
CPU_MMAP;EVENT;RFCSEL9;EV;DMA_DONE_COMB
CPU_MMAP;EVENT;RFCSEL9;EV;CRYPTO_RESULT_AVAIL_IRQ
CPU_MMAP;EVENT;RFCSEL9;EV;SWEV0
CPU_MMAP;EVENT;RFCSEL9;EV;SWEV1
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_COMPA
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_COMPB
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;RFCSEL9;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;RFCSEL9;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;GPT0ACAPTSEL
CPU_MMAP;EVENT;GPT0ACAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;I2C_IRQ
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;PORT_EVENT0
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;PORT_EVENT1
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;RFC_IN_EV4
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;RFC_IN_EV5
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT0ACAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;GPT0BCAPTSEL
CPU_MMAP;EVENT;GPT0BCAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;I2C_IRQ
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;PORT_EVENT0
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;PORT_EVENT1
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;RFC_IN_EV4
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;RFC_IN_EV5
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT0BCAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;GPT1ACAPTSEL
CPU_MMAP;EVENT;GPT1ACAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;I2C_IRQ
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;PORT_EVENT2
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;PORT_EVENT3
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;RFC_IN_EV4
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;RFC_IN_EV5
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT1ACAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;GPT1BCAPTSEL
CPU_MMAP;EVENT;GPT1BCAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;I2C_IRQ
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;PORT_EVENT2
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;PORT_EVENT3
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;RFC_IN_EV4
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;RFC_IN_EV5
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT1BCAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;GPT2ACAPTSEL
CPU_MMAP;EVENT;GPT2ACAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;I2C_IRQ
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;PORT_EVENT4
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;PORT_EVENT5
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;RFC_IN_EV6
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;RFC_IN_EV7
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT2ACAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;GPT2BCAPTSEL
CPU_MMAP;EVENT;GPT2BCAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;I2C_IRQ
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;PORT_EVENT4
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;PORT_EVENT5
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;RFC_IN_EV6
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;RFC_IN_EV7
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT2BCAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;UDMACH1SSEL
CPU_MMAP;EVENT;UDMACH1SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH1SSEL;EV
CPU_MMAP;EVENT;UDMACH1SSEL;EV;UART0_RX_DMASREQ
CPU_MMAP;EVENT;UDMACH1BSEL
CPU_MMAP;EVENT;UDMACH1BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH1BSEL;EV
CPU_MMAP;EVENT;UDMACH1BSEL;EV;UART0_RX_DMABREQ
CPU_MMAP;EVENT;UDMACH2SSEL
CPU_MMAP;EVENT;UDMACH2SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH2SSEL;EV
CPU_MMAP;EVENT;UDMACH2SSEL;EV;UART0_TX_DMASREQ
CPU_MMAP;EVENT;UDMACH2BSEL
CPU_MMAP;EVENT;UDMACH2BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH2BSEL;EV
CPU_MMAP;EVENT;UDMACH2BSEL;EV;UART0_TX_DMABREQ
CPU_MMAP;EVENT;UDMACH3SSEL
CPU_MMAP;EVENT;UDMACH3SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH3SSEL;EV
CPU_MMAP;EVENT;UDMACH3SSEL;EV;SSI0_RX_DMASREQ
CPU_MMAP;EVENT;UDMACH3BSEL
CPU_MMAP;EVENT;UDMACH3BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH3BSEL;EV
CPU_MMAP;EVENT;UDMACH3BSEL;EV;SSI0_RX_DMABREQ
CPU_MMAP;EVENT;UDMACH4SSEL
CPU_MMAP;EVENT;UDMACH4SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH4SSEL;EV
CPU_MMAP;EVENT;UDMACH4SSEL;EV;SSI0_TX_DMASREQ
CPU_MMAP;EVENT;UDMACH4BSEL
CPU_MMAP;EVENT;UDMACH4BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH4BSEL;EV
CPU_MMAP;EVENT;UDMACH4BSEL;EV;SSI0_TX_DMABREQ
CPU_MMAP;EVENT;UDMACH5SSEL
CPU_MMAP;EVENT;UDMACH5SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH5SSEL;EV
CPU_MMAP;EVENT;UDMACH5SSEL;EV;SPIS_RXF_DMASREQ
CPU_MMAP;EVENT;UDMACH5BSEL
CPU_MMAP;EVENT;UDMACH5BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH5BSEL;EV
CPU_MMAP;EVENT;UDMACH5BSEL;EV;SPIS_RXF_DMABREQ
CPU_MMAP;EVENT;UDMACH6SSEL
CPU_MMAP;EVENT;UDMACH6SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH6SSEL;EV
CPU_MMAP;EVENT;UDMACH6SSEL;EV;SPIS_TXF_DMASREQ
CPU_MMAP;EVENT;UDMACH6BSEL
CPU_MMAP;EVENT;UDMACH6BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH6BSEL;EV
CPU_MMAP;EVENT;UDMACH6BSEL;EV;SPIS_TXF_DMABREQ
CPU_MMAP;EVENT;UDMACH7SSEL
CPU_MMAP;EVENT;UDMACH7SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH7SSEL;EV
CPU_MMAP;EVENT;UDMACH7SSEL;EV;AUX_DMASREQ
CPU_MMAP;EVENT;UDMACH7BSEL
CPU_MMAP;EVENT;UDMACH7BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH7BSEL;EV
CPU_MMAP;EVENT;UDMACH7BSEL;EV;AUX_DMABREQ
CPU_MMAP;EVENT;UDMACH8SSEL
CPU_MMAP;EVENT;UDMACH8SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH8SSEL;EV
CPU_MMAP;EVENT;UDMACH8SSEL;EV;AUX_SW_DMABREQ
CPU_MMAP;EVENT;UDMACH8BSEL
CPU_MMAP;EVENT;UDMACH8BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH8BSEL;EV
CPU_MMAP;EVENT;UDMACH8BSEL;EV;AUX_SW_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL
CPU_MMAP;EVENT;UDMACH9SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH9SSEL;EV
CPU_MMAP;EVENT;UDMACH9SSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH9SSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL
CPU_MMAP;EVENT;UDMACH9BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH9BSEL;EV
CPU_MMAP;EVENT;UDMACH9BSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH9BSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL
CPU_MMAP;EVENT;UDMACH10SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH10SSEL;EV
CPU_MMAP;EVENT;UDMACH10SSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH10SSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL
CPU_MMAP;EVENT;UDMACH10BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH10BSEL;EV
CPU_MMAP;EVENT;UDMACH10BSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH10BSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL
CPU_MMAP;EVENT;UDMACH11SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH11SSEL;EV
CPU_MMAP;EVENT;UDMACH11SSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH11SSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL
CPU_MMAP;EVENT;UDMACH11BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH11BSEL;EV
CPU_MMAP;EVENT;UDMACH11BSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH11BSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL
CPU_MMAP;EVENT;UDMACH12SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH12SSEL;EV
CPU_MMAP;EVENT;UDMACH12SSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH12SSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL
CPU_MMAP;EVENT;UDMACH12BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH12BSEL;EV
CPU_MMAP;EVENT;UDMACH12BSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH12BSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH13BSEL
CPU_MMAP;EVENT;UDMACH13BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH13BSEL;EV
CPU_MMAP;EVENT;UDMACH13BSEL;EV;AON_PROG2
CPU_MMAP;EVENT;UDMACH14BSEL
CPU_MMAP;EVENT;UDMACH14BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH14BSEL;EV
CPU_MMAP;EVENT;UDMACH14BSEL;EV;NONE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_PROG0
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_PROG1
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_PROG2
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;I2S_IRQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;I2C_IRQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_AUX_SWEV0
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT2A
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT2B
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT3A
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT3B
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT0A
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT0B
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT1A
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT1B
CPU_MMAP;EVENT;UDMACH14BSEL;EV;DMA_CH0_DONE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;FLASH
CPU_MMAP;EVENT;UDMACH14BSEL;EV;DMA_CH18_DONE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;WDT_IRQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_SWEV1
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;UART0_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;DMA_ERR
CPU_MMAP;EVENT;UDMACH14BSEL;EV;DMA_DONE_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI0_RX_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI0_RX_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI0_TX_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI0_TX_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI1_RX_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI1_RX_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI1_TX_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SSI1_TX_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;UART0_RX_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;UART0_RX_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;UART0_TX_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;UART0_TX_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SPIS_COMB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SPIS_RXF_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SPIS_RXF_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SPIS_TXF_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SPIS_TXF_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT0A_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT0B_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT1A_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT1B_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT2A_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT2B_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT3A_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;GPT3B_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT0
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT1
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT2
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT3
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT4
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT5
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT6
CPU_MMAP;EVENT;UDMACH14BSEL;EV;PORT_EVENT7
CPU_MMAP;EVENT;UDMACH14BSEL;EV;CRYPTO_RESULT_AVAIL_IRQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;CRYPTO_DMA_DONE_IRQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_IN_EV4
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_IN_EV5
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_IN_EV6
CPU_MMAP;EVENT;UDMACH14BSEL;EV;RFC_IN_EV7
CPU_MMAP;EVENT;UDMACH14BSEL;EV;WDT_NMI
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SWEV0
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SWEV1
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SWEV2
CPU_MMAP;EVENT;UDMACH14BSEL;EV;SWEV3
CPU_MMAP;EVENT;UDMACH14BSEL;EV;TRNG_IRQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_SW_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_DMASREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AUX_DMABREQ
CPU_MMAP;EVENT;UDMACH14BSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;UDMACH14BSEL;EV;CPU_HALTED
CPU_MMAP;EVENT;UDMACH14BSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;UDMACH15BSEL
CPU_MMAP;EVENT;UDMACH15BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH15BSEL;EV
CPU_MMAP;EVENT;UDMACH15BSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;UDMACH16SSEL
CPU_MMAP;EVENT;UDMACH16SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH16SSEL;EV
CPU_MMAP;EVENT;UDMACH16SSEL;EV;SSI1_RX_DMASREQ
CPU_MMAP;EVENT;UDMACH16BSEL
CPU_MMAP;EVENT;UDMACH16BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH16BSEL;EV
CPU_MMAP;EVENT;UDMACH16BSEL;EV;SSI1_RX_DMABREQ
CPU_MMAP;EVENT;UDMACH17SSEL
CPU_MMAP;EVENT;UDMACH17SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH17SSEL;EV
CPU_MMAP;EVENT;UDMACH17SSEL;EV;SSI1_TX_DMASREQ
CPU_MMAP;EVENT;UDMACH17BSEL
CPU_MMAP;EVENT;UDMACH17BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH17BSEL;EV
CPU_MMAP;EVENT;UDMACH17BSEL;EV;SSI1_TX_DMABREQ
CPU_MMAP;EVENT;UDMACH21SSEL
CPU_MMAP;EVENT;UDMACH21SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH21SSEL;EV
CPU_MMAP;EVENT;UDMACH21SSEL;EV;SWEV0
CPU_MMAP;EVENT;UDMACH21BSEL
CPU_MMAP;EVENT;UDMACH21BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH21BSEL;EV
CPU_MMAP;EVENT;UDMACH21BSEL;EV;SWEV0
CPU_MMAP;EVENT;UDMACH22SSEL
CPU_MMAP;EVENT;UDMACH22SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH22SSEL;EV
CPU_MMAP;EVENT;UDMACH22SSEL;EV;SWEV1
CPU_MMAP;EVENT;UDMACH22BSEL
CPU_MMAP;EVENT;UDMACH22BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH22BSEL;EV
CPU_MMAP;EVENT;UDMACH22BSEL;EV;SWEV1
CPU_MMAP;EVENT;UDMACH23SSEL
CPU_MMAP;EVENT;UDMACH23SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH23SSEL;EV
CPU_MMAP;EVENT;UDMACH23SSEL;EV;SWEV2
CPU_MMAP;EVENT;UDMACH23BSEL
CPU_MMAP;EVENT;UDMACH23BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH23BSEL;EV
CPU_MMAP;EVENT;UDMACH23BSEL;EV;SWEV2
CPU_MMAP;EVENT;UDMACH24SSEL
CPU_MMAP;EVENT;UDMACH24SSEL;RESERVED
CPU_MMAP;EVENT;UDMACH24SSEL;EV
CPU_MMAP;EVENT;UDMACH24SSEL;EV;SWEV3
CPU_MMAP;EVENT;UDMACH24BSEL
CPU_MMAP;EVENT;UDMACH24BSEL;RESERVED
CPU_MMAP;EVENT;UDMACH24BSEL;EV
CPU_MMAP;EVENT;UDMACH24BSEL;EV;SWEV3
CPU_MMAP;EVENT;GPT3ACAPTSEL
CPU_MMAP;EVENT;GPT3ACAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;PORT_EVENT6
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;PORT_EVENT7
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;RFC_IN_EV6
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;RFC_IN_EV7
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT3ACAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;GPT3BCAPTSEL
CPU_MMAP;EVENT;GPT3BCAPTSEL;RESERVED
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;NONE
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AON_GPIO_EDGE
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AON_SPIS_BYTE_DONE
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AON_SPIS_CS
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AON_RTC_COMB
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_COMB
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;FLASH
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;RFC_CMD_ACK
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;RFC_HW_COMB
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;RFC_CPE_0
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;RFC_CPE_1
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;SSI0_COMB
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;SSI1_COMB
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;UART0_COMB
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT0A_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT0B_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT1A_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT1B_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT2A_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT2B_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT3A_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;GPT3B_CMP
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;PORT_EVENT6
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;PORT_EVENT7
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;RFC_IN_EV6
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;RFC_IN_EV7
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_AON_WU_EV
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_COMPA
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_COMPB
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_TDC_DONE
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_TIMER0_EV
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_TIMER1_EV
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_SMPH_AUTOTAKE_DONE
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_ADC_DONE
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_ADC_FIFO_ALMOST_FULL
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_OBSMUX0
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AUX_ADC_IRQ
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;AON_RTC_UPD
CPU_MMAP;EVENT;GPT3BCAPTSEL;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;AUXSEL0
CPU_MMAP;EVENT;AUXSEL0;RESERVED
CPU_MMAP;EVENT;AUXSEL0;EV
CPU_MMAP;EVENT;AUXSEL0;EV;NONE
CPU_MMAP;EVENT;AUXSEL0;EV;GPT2A
CPU_MMAP;EVENT;AUXSEL0;EV;GPT2B
CPU_MMAP;EVENT;AUXSEL0;EV;GPT3A
CPU_MMAP;EVENT;AUXSEL0;EV;GPT3B
CPU_MMAP;EVENT;AUXSEL0;EV;GPT0A
CPU_MMAP;EVENT;AUXSEL0;EV;GPT0B
CPU_MMAP;EVENT;AUXSEL0;EV;GPT1A
CPU_MMAP;EVENT;AUXSEL0;EV;GPT1B
CPU_MMAP;EVENT;AUXSEL0;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;CM3NMISEL0
CPU_MMAP;EVENT;CM3NMISEL0;RESERVED
CPU_MMAP;EVENT;CM3NMISEL0;EV
CPU_MMAP;EVENT;CM3NMISEL0;EV;WDT_NMI
CPU_MMAP;EVENT;I2SSTMPSEL0
CPU_MMAP;EVENT;I2SSTMPSEL0;RESERVED
CPU_MMAP;EVENT;I2SSTMPSEL0;EV
CPU_MMAP;EVENT;I2SSTMPSEL0;EV;NONE
CPU_MMAP;EVENT;I2SSTMPSEL0;EV;RFC_IN_EV4
CPU_MMAP;EVENT;I2SSTMPSEL0;EV;RFC_IN_EV5
CPU_MMAP;EVENT;I2SSTMPSEL0;EV;RFC_IN_EV6
CPU_MMAP;EVENT;I2SSTMPSEL0;EV;RFC_IN_EV7
CPU_MMAP;EVENT;I2SSTMPSEL0;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;FRZSEL0
CPU_MMAP;EVENT;FRZSEL0;RESERVED
CPU_MMAP;EVENT;FRZSEL0;EV
CPU_MMAP;EVENT;FRZSEL0;EV;NONE
CPU_MMAP;EVENT;FRZSEL0;EV;CPU_HALTED
CPU_MMAP;EVENT;FRZSEL0;EV;ALWAYS_ACTIVE
CPU_MMAP;EVENT;SWEV
CPU_MMAP;EVENT;SWEV;RESERVED3
CPU_MMAP;EVENT;SWEV;SWEV3
CPU_MMAP;EVENT;SWEV;RESERVED2
CPU_MMAP;EVENT;SWEV;SWEV2
CPU_MMAP;EVENT;SWEV;RESERVED1
CPU_MMAP;EVENT;SWEV;SWEV1
CPU_MMAP;EVENT;SWEV;RESERVED0
CPU_MMAP;EVENT;SWEV;SWEV0
CPU_MMAP;SMPH
CPU_MMAP;SMPH;SMPH0
CPU_MMAP;SMPH;SMPH0;RESERVED1
CPU_MMAP;SMPH;SMPH0;STAT
CPU_MMAP;SMPH;SMPH1
CPU_MMAP;SMPH;SMPH1;RESERVED1
CPU_MMAP;SMPH;SMPH1;STAT
CPU_MMAP;SMPH;SMPH2
CPU_MMAP;SMPH;SMPH2;RESERVED1
CPU_MMAP;SMPH;SMPH2;STAT
CPU_MMAP;SMPH;SMPH3
CPU_MMAP;SMPH;SMPH3;RESERVED1
CPU_MMAP;SMPH;SMPH3;STAT
CPU_MMAP;SMPH;SMPH4
CPU_MMAP;SMPH;SMPH4;RESERVED1
CPU_MMAP;SMPH;SMPH4;STAT
CPU_MMAP;SMPH;SMPH5
CPU_MMAP;SMPH;SMPH5;RESERVED1
CPU_MMAP;SMPH;SMPH5;STAT
CPU_MMAP;SMPH;SMPH6
CPU_MMAP;SMPH;SMPH6;RESERVED1
CPU_MMAP;SMPH;SMPH6;STAT
CPU_MMAP;SMPH;SMPH7
CPU_MMAP;SMPH;SMPH7;RESERVED1
CPU_MMAP;SMPH;SMPH7;STAT
CPU_MMAP;SMPH;SMPH8
CPU_MMAP;SMPH;SMPH8;RESERVED1
CPU_MMAP;SMPH;SMPH8;STAT
CPU_MMAP;SMPH;SMPH9
CPU_MMAP;SMPH;SMPH9;RESERVED1
CPU_MMAP;SMPH;SMPH9;STAT
CPU_MMAP;SMPH;SMPH10
CPU_MMAP;SMPH;SMPH10;RESERVED1
CPU_MMAP;SMPH;SMPH10;STAT
CPU_MMAP;SMPH;SMPH11
CPU_MMAP;SMPH;SMPH11;RESERVED1
CPU_MMAP;SMPH;SMPH11;STAT
CPU_MMAP;SMPH;SMPH12
CPU_MMAP;SMPH;SMPH12;RESERVED1
CPU_MMAP;SMPH;SMPH12;STAT
CPU_MMAP;SMPH;SMPH13
CPU_MMAP;SMPH;SMPH13;RESERVED1
CPU_MMAP;SMPH;SMPH13;STAT
CPU_MMAP;SMPH;SMPH14
CPU_MMAP;SMPH;SMPH14;RESERVED1
CPU_MMAP;SMPH;SMPH14;STAT
CPU_MMAP;SMPH;SMPH15
CPU_MMAP;SMPH;SMPH15;RESERVED1
CPU_MMAP;SMPH;SMPH15;STAT
CPU_MMAP;SMPH;SMPH16
CPU_MMAP;SMPH;SMPH16;RESERVED1
CPU_MMAP;SMPH;SMPH16;STAT
CPU_MMAP;SMPH;SMPH17
CPU_MMAP;SMPH;SMPH17;RESERVED1
CPU_MMAP;SMPH;SMPH17;STAT
CPU_MMAP;SMPH;SMPH18
CPU_MMAP;SMPH;SMPH18;RESERVED1
CPU_MMAP;SMPH;SMPH18;STAT
CPU_MMAP;SMPH;SMPH19
CPU_MMAP;SMPH;SMPH19;RESERVED1
CPU_MMAP;SMPH;SMPH19;STAT
CPU_MMAP;SMPH;SMPH20
CPU_MMAP;SMPH;SMPH20;RESERVED1
CPU_MMAP;SMPH;SMPH20;STAT
CPU_MMAP;SMPH;SMPH21
CPU_MMAP;SMPH;SMPH21;RESERVED1
CPU_MMAP;SMPH;SMPH21;STAT
CPU_MMAP;SMPH;SMPH22
CPU_MMAP;SMPH;SMPH22;RESERVED1
CPU_MMAP;SMPH;SMPH22;STAT
CPU_MMAP;SMPH;SMPH23
CPU_MMAP;SMPH;SMPH23;RESERVED1
CPU_MMAP;SMPH;SMPH23;STAT
CPU_MMAP;SMPH;SMPH24
CPU_MMAP;SMPH;SMPH24;RESERVED1
CPU_MMAP;SMPH;SMPH24;STAT
CPU_MMAP;SMPH;SMPH25
CPU_MMAP;SMPH;SMPH25;RESERVED1
CPU_MMAP;SMPH;SMPH25;STAT
CPU_MMAP;SMPH;SMPH26
CPU_MMAP;SMPH;SMPH26;RESERVED1
CPU_MMAP;SMPH;SMPH26;STAT
CPU_MMAP;SMPH;SMPH27
CPU_MMAP;SMPH;SMPH27;RESERVED1
CPU_MMAP;SMPH;SMPH27;STAT
CPU_MMAP;SMPH;SMPH28
CPU_MMAP;SMPH;SMPH28;RESERVED1
CPU_MMAP;SMPH;SMPH28;STAT
CPU_MMAP;SMPH;SMPH29
CPU_MMAP;SMPH;SMPH29;RESERVED1
CPU_MMAP;SMPH;SMPH29;STAT
CPU_MMAP;SMPH;SMPH30
CPU_MMAP;SMPH;SMPH30;RESERVED1
CPU_MMAP;SMPH;SMPH30;STAT
CPU_MMAP;SMPH;SMPH31
CPU_MMAP;SMPH;SMPH31;RESERVED1
CPU_MMAP;SMPH;SMPH31;STAT
CPU_MMAP;SMPH;PEEK0
CPU_MMAP;SMPH;PEEK0;RESERVED1
CPU_MMAP;SMPH;PEEK0;STAT
CPU_MMAP;SMPH;PEEK1
CPU_MMAP;SMPH;PEEK1;RESERVED1
CPU_MMAP;SMPH;PEEK1;STAT
CPU_MMAP;SMPH;PEEK2
CPU_MMAP;SMPH;PEEK2;RESERVED1
CPU_MMAP;SMPH;PEEK2;STAT
CPU_MMAP;SMPH;PEEK3
CPU_MMAP;SMPH;PEEK3;RESERVED1
CPU_MMAP;SMPH;PEEK3;STAT
CPU_MMAP;SMPH;PEEK4
CPU_MMAP;SMPH;PEEK4;RESERVED1
CPU_MMAP;SMPH;PEEK4;STAT
CPU_MMAP;SMPH;PEEK5
CPU_MMAP;SMPH;PEEK5;RESERVED1
CPU_MMAP;SMPH;PEEK5;STAT
CPU_MMAP;SMPH;PEEK6
CPU_MMAP;SMPH;PEEK6;RESERVED1
CPU_MMAP;SMPH;PEEK6;STAT
CPU_MMAP;SMPH;PEEK7
CPU_MMAP;SMPH;PEEK7;RESERVED1
CPU_MMAP;SMPH;PEEK7;STAT
CPU_MMAP;SMPH;PEEK8
CPU_MMAP;SMPH;PEEK8;RESERVED1
CPU_MMAP;SMPH;PEEK8;STAT
CPU_MMAP;SMPH;PEEK9
CPU_MMAP;SMPH;PEEK9;RESERVED1
CPU_MMAP;SMPH;PEEK9;STAT
CPU_MMAP;SMPH;PEEK10
CPU_MMAP;SMPH;PEEK10;RESERVED1
CPU_MMAP;SMPH;PEEK10;STAT
CPU_MMAP;SMPH;PEEK11
CPU_MMAP;SMPH;PEEK11;RESERVED1
CPU_MMAP;SMPH;PEEK11;STAT
CPU_MMAP;SMPH;PEEK12
CPU_MMAP;SMPH;PEEK12;RESERVED1
CPU_MMAP;SMPH;PEEK12;STAT
CPU_MMAP;SMPH;PEEK13
CPU_MMAP;SMPH;PEEK13;RESERVED1
CPU_MMAP;SMPH;PEEK13;STAT
CPU_MMAP;SMPH;PEEK14
CPU_MMAP;SMPH;PEEK14;RESERVED1
CPU_MMAP;SMPH;PEEK14;STAT
CPU_MMAP;SMPH;PEEK15
CPU_MMAP;SMPH;PEEK15;RESERVED1
CPU_MMAP;SMPH;PEEK15;STAT
CPU_MMAP;SMPH;PEEK16
CPU_MMAP;SMPH;PEEK16;RESERVED1
CPU_MMAP;SMPH;PEEK16;STAT
CPU_MMAP;SMPH;PEEK17
CPU_MMAP;SMPH;PEEK17;RESERVED1
CPU_MMAP;SMPH;PEEK17;STAT
CPU_MMAP;SMPH;PEEK18
CPU_MMAP;SMPH;PEEK18;RESERVED1
CPU_MMAP;SMPH;PEEK18;STAT
CPU_MMAP;SMPH;PEEK19
CPU_MMAP;SMPH;PEEK19;RESERVED1
CPU_MMAP;SMPH;PEEK19;STAT
CPU_MMAP;SMPH;PEEK20
CPU_MMAP;SMPH;PEEK20;RESERVED1
CPU_MMAP;SMPH;PEEK20;STAT
CPU_MMAP;SMPH;PEEK21
CPU_MMAP;SMPH;PEEK21;RESERVED1
CPU_MMAP;SMPH;PEEK21;STAT
CPU_MMAP;SMPH;PEEK22
CPU_MMAP;SMPH;PEEK22;RESERVED1
CPU_MMAP;SMPH;PEEK22;STAT
CPU_MMAP;SMPH;PEEK23
CPU_MMAP;SMPH;PEEK23;RESERVED1
CPU_MMAP;SMPH;PEEK23;STAT
CPU_MMAP;SMPH;PEEK24
CPU_MMAP;SMPH;PEEK24;RESERVED1
CPU_MMAP;SMPH;PEEK24;STAT
CPU_MMAP;SMPH;PEEK25
CPU_MMAP;SMPH;PEEK25;RESERVED1
CPU_MMAP;SMPH;PEEK25;STAT
CPU_MMAP;SMPH;PEEK26
CPU_MMAP;SMPH;PEEK26;RESERVED1
CPU_MMAP;SMPH;PEEK26;STAT
CPU_MMAP;SMPH;PEEK27
CPU_MMAP;SMPH;PEEK27;RESERVED1
CPU_MMAP;SMPH;PEEK27;STAT
CPU_MMAP;SMPH;PEEK28
CPU_MMAP;SMPH;PEEK28;RESERVED1
CPU_MMAP;SMPH;PEEK28;STAT
CPU_MMAP;SMPH;PEEK29
CPU_MMAP;SMPH;PEEK29;RESERVED1
CPU_MMAP;SMPH;PEEK29;STAT
CPU_MMAP;SMPH;PEEK30
CPU_MMAP;SMPH;PEEK30;RESERVED1
CPU_MMAP;SMPH;PEEK30;STAT
CPU_MMAP;SMPH;PEEK31
CPU_MMAP;SMPH;PEEK31;RESERVED1
CPU_MMAP;SMPH;PEEK31;STAT
CPU_MMAP;SPIS
CPU_MMAP;SPIS;GPFLAGS
CPU_MMAP;SPIS;GPFLAGS;RESERVED4
CPU_MMAP;SPIS;GPFLAGS;BYTE_DONE
CPU_MMAP;SPIS;GPFLAGS;BYTE_RX_OVF
CPU_MMAP;SPIS;GPFLAGS;BYTE_ABORT
CPU_MMAP;SPIS;GPFLAGS;CS
CPU_MMAP;SPIS;GPFLAGSSET
CPU_MMAP;SPIS;GPFLAGSSET;RESERVED4
CPU_MMAP;SPIS;GPFLAGSSET;BYTE_DONE
CPU_MMAP;SPIS;GPFLAGSSET;BYTE_RX_OVF
CPU_MMAP;SPIS;GPFLAGSSET;BYTE_ABORT
CPU_MMAP;SPIS;GPFLAGSSET;CS
CPU_MMAP;SPIS;GPFLAGSMASK
CPU_MMAP;SPIS;GPFLAGSMASK;RESERVED6
CPU_MMAP;SPIS;GPFLAGSMASK;RX_DMA_DONE
CPU_MMAP;SPIS;GPFLAGSMASK;TX_DMA_DONE
CPU_MMAP;SPIS;GPFLAGSMASK;BYTE_DONE
CPU_MMAP;SPIS;GPFLAGSMASK;BYTE_RX_OVF
CPU_MMAP;SPIS;GPFLAGSMASK;BYTE_ABORT
CPU_MMAP;SPIS;GPFLAGSMASK;CS
CPU_MMAP;SPIS;CFG
CPU_MMAP;SPIS;CFG;RESERVED5
CPU_MMAP;SPIS;CFG;RX_DMA_REQ_TYPE
CPU_MMAP;SPIS;CFG;TX_DMA_REQ_TYPE
CPU_MMAP;SPIS;CFG;RX_BIT_ORDER
CPU_MMAP;SPIS;CFG;TX_BIT_ORDER
CPU_MMAP;SPIS;CFG;POL
CPU_MMAP;SPIS;TXFFLAGSCLRN
CPU_MMAP;SPIS;TXFFLAGSCLRN;RESERVED7
CPU_MMAP;SPIS;TXFFLAGSCLRN;OVF
CPU_MMAP;SPIS;TXFFLAGSCLRN;UNF
CPU_MMAP;SPIS;TXFFLAGSCLRN;NOT_EMPTY
CPU_MMAP;SPIS;TXFFLAGSCLRN;LE_THR
CPU_MMAP;SPIS;TXFFLAGSCLRN;GE_THR
CPU_MMAP;SPIS;TXFFLAGSCLRN;EMPTY
CPU_MMAP;SPIS;TXFFLAGSCLRN;FULL
CPU_MMAP;SPIS;TXFFLAGSSET
CPU_MMAP;SPIS;TXFFLAGSSET;RESERVED7
CPU_MMAP;SPIS;TXFFLAGSSET;OVF
CPU_MMAP;SPIS;TXFFLAGSSET;UNF
CPU_MMAP;SPIS;TXFFLAGSSET;NOT_EMPTY
CPU_MMAP;SPIS;TXFFLAGSSET;LE_THR
CPU_MMAP;SPIS;TXFFLAGSSET;GE_THR
CPU_MMAP;SPIS;TXFFLAGSSET;EMPTY
CPU_MMAP;SPIS;TXFFLAGSSET;FULL
CPU_MMAP;SPIS;TXFFLAGSMASK
CPU_MMAP;SPIS;TXFFLAGSMASK;RESERVED7
CPU_MMAP;SPIS;TXFFLAGSMASK;OVF
CPU_MMAP;SPIS;TXFFLAGSMASK;UNF
CPU_MMAP;SPIS;TXFFLAGSMASK;NOT_EMPTY
CPU_MMAP;SPIS;TXFFLAGSMASK;LE_THR
CPU_MMAP;SPIS;TXFFLAGSMASK;GE_THR
CPU_MMAP;SPIS;TXFFLAGSMASK;EMPTY
CPU_MMAP;SPIS;TXFFLAGSMASK;FULL
CPU_MMAP;SPIS;TXSTAT
CPU_MMAP;SPIS;TXSTAT;RESERVED5
CPU_MMAP;SPIS;TXSTAT;NOT_EMPTY
CPU_MMAP;SPIS;TXSTAT;LE_THR
CPU_MMAP;SPIS;TXSTAT;GE_THR
CPU_MMAP;SPIS;TXSTAT;EMPTY
CPU_MMAP;SPIS;TXSTAT;FULL
CPU_MMAP;SPIS;TXFEVSRC
CPU_MMAP;SPIS;TXFEVSRC;RESERVED3
CPU_MMAP;SPIS;TXFEVSRC;SEL
CPU_MMAP;SPIS;TXFEVSRC;SEL;FULL
CPU_MMAP;SPIS;TXFEVSRC;SEL;EMPTY
CPU_MMAP;SPIS;TXFEVSRC;SEL;GE_THR
CPU_MMAP;SPIS;TXFEVSRC;SEL;LE_THR
CPU_MMAP;SPIS;TXFEVSRC;SEL;NOT_EMPTY
CPU_MMAP;SPIS;TXFEVSRC;SEL;ONE
CPU_MMAP;SPIS;TXFEVSRC;SEL;RESERVED
CPU_MMAP;SPIS;TXFEVSRC;SEL;ZERO
CPU_MMAP;SPIS;TXFTHR
CPU_MMAP;SPIS;TXFTHR;RESERVED4
CPU_MMAP;SPIS;TXFTHR;CNT
CPU_MMAP;SPIS;TXFPUSH
CPU_MMAP;SPIS;TXFPUSH;RESERVED8
CPU_MMAP;SPIS;TXFPUSH;DATA
CPU_MMAP;SPIS;TXFFLUSH
CPU_MMAP;SPIS;TXFFLUSH;RESERVED1
CPU_MMAP;SPIS;TXFFLUSH;FLUSH
CPU_MMAP;SPIS;TXFMEMRDPOS
CPU_MMAP;SPIS;TXFMEMRDPOS;RESERVED4
CPU_MMAP;SPIS;TXFMEMRDPOS;POS
CPU_MMAP;SPIS;TXMEMWRPOS
CPU_MMAP;SPIS;TXMEMWRPOS;RESERVED4
CPU_MMAP;SPIS;TXMEMWRPOS;POS
CPU_MMAP;SPIS;TXFCNT
CPU_MMAP;SPIS;TXFCNT;RESERVED5
CPU_MMAP;SPIS;TXFCNT;CNT
CPU_MMAP;SPIS;RXFFLAGSCLRN
CPU_MMAP;SPIS;RXFFLAGSCLRN;RESERVED7
CPU_MMAP;SPIS;RXFFLAGSCLRN;OVF
CPU_MMAP;SPIS;RXFFLAGSCLRN;UNF
CPU_MMAP;SPIS;RXFFLAGSCLRN;NOT_EMPTY
CPU_MMAP;SPIS;RXFFLAGSCLRN;LE_THR
CPU_MMAP;SPIS;RXFFLAGSCLRN;GE_THR
CPU_MMAP;SPIS;RXFFLAGSCLRN;EMPTY
CPU_MMAP;SPIS;RXFFLAGSCLRN;FULL
CPU_MMAP;SPIS;RXFFLAGSSET
CPU_MMAP;SPIS;RXFFLAGSSET;RESERVED7
CPU_MMAP;SPIS;RXFFLAGSSET;OVF
CPU_MMAP;SPIS;RXFFLAGSSET;UNF
CPU_MMAP;SPIS;RXFFLAGSSET;NOT_EMPTY
CPU_MMAP;SPIS;RXFFLAGSSET;LE_THR
CPU_MMAP;SPIS;RXFFLAGSSET;GE_THR
CPU_MMAP;SPIS;RXFFLAGSSET;EMPTY
CPU_MMAP;SPIS;RXFFLAGSSET;FULL
CPU_MMAP;SPIS;RXFFLAGSMASK
CPU_MMAP;SPIS;RXFFLAGSMASK;RESERVED7
CPU_MMAP;SPIS;RXFFLAGSMASK;OVF
CPU_MMAP;SPIS;RXFFLAGSMASK;UNF
CPU_MMAP;SPIS;RXFFLAGSMASK;NOT_EMPTY
CPU_MMAP;SPIS;RXFFLAGSMASK;LE_THR
CPU_MMAP;SPIS;RXFFLAGSMASK;GE_THR
CPU_MMAP;SPIS;RXFFLAGSMASK;EMPTY
CPU_MMAP;SPIS;RXFFLAGSMASK;FULL
CPU_MMAP;SPIS;RXFSTAT
CPU_MMAP;SPIS;RXFSTAT;RESERVED5
CPU_MMAP;SPIS;RXFSTAT;NOT_EMPTY
CPU_MMAP;SPIS;RXFSTAT;LE_THR
CPU_MMAP;SPIS;RXFSTAT;GE_THR
CPU_MMAP;SPIS;RXFSTAT;EMPTY
CPU_MMAP;SPIS;RXFSTAT;FULL
CPU_MMAP;SPIS;RXFEVSRC
CPU_MMAP;SPIS;RXFEVSRC;RESERVED3
CPU_MMAP;SPIS;RXFEVSRC;SEL
CPU_MMAP;SPIS;RXFEVSRC;SEL;FULL
CPU_MMAP;SPIS;RXFEVSRC;SEL;EMPTY
CPU_MMAP;SPIS;RXFEVSRC;SEL;GE_THR
CPU_MMAP;SPIS;RXFEVSRC;SEL;LE_THR
CPU_MMAP;SPIS;RXFEVSRC;SEL;NOT_EMPTY
CPU_MMAP;SPIS;RXFEVSRC;SEL;ONE
CPU_MMAP;SPIS;RXFEVSRC;SEL;RESERVED
CPU_MMAP;SPIS;RXFEVSRC;SEL;ZERO
CPU_MMAP;SPIS;RXFTHR
CPU_MMAP;SPIS;RXFTHR;RESERVED4
CPU_MMAP;SPIS;RXFTHR;CNT
CPU_MMAP;SPIS;RXFPOP
CPU_MMAP;SPIS;RXFPOP;RESERVED8
CPU_MMAP;SPIS;RXFPOP;DATA
CPU_MMAP;SPIS;RXFFLUSH
CPU_MMAP;SPIS;RXFFLUSH;RESERVED1
CPU_MMAP;SPIS;RXFFLUSH;FLUSH
CPU_MMAP;SPIS;RXFMEMRDPOS
CPU_MMAP;SPIS;RXFMEMRDPOS;RESERVED4
CPU_MMAP;SPIS;RXFMEMRDPOS;POS
CPU_MMAP;SPIS;RXFMEMWRPOS
CPU_MMAP;SPIS;RXFMEMWRPOS;RESERVED4
CPU_MMAP;SPIS;RXFMEMWRPOS;POS
CPU_MMAP;SPIS;RXCNT
CPU_MMAP;SPIS;RXCNT;RESERVED5
CPU_MMAP;SPIS;RXCNT;CNT
CPU_MMAP;SPIS;TXFMEM
CPU_MMAP;SPIS;TXFMEM;RESERVED8
CPU_MMAP;SPIS;TXFMEM;DATA
CPU_MMAP;SPIS;RXFMEM
CPU_MMAP;SPIS;RXFMEM;RESERVED8
CPU_MMAP;SPIS;RXFMEM;DATA
CPU_MMAP;ADI2
CPU_MMAP;ADI2;DIR03
CPU_MMAP;ADI2;DIR03;B3
CPU_MMAP;ADI2;DIR03;B2
CPU_MMAP;ADI2;DIR03;B1
CPU_MMAP;ADI2;DIR03;B0
CPU_MMAP;ADI2;DIR47
CPU_MMAP;ADI2;DIR47;B3
CPU_MMAP;ADI2;DIR47;B2
CPU_MMAP;ADI2;DIR47;B1
CPU_MMAP;ADI2;DIR47;B0
CPU_MMAP;ADI2;DIR811
CPU_MMAP;ADI2;DIR811;B3
CPU_MMAP;ADI2;DIR811;B2
CPU_MMAP;ADI2;DIR811;B1
CPU_MMAP;ADI2;DIR811;B0
CPU_MMAP;ADI2;DIR1215
CPU_MMAP;ADI2;DIR1215;B3
CPU_MMAP;ADI2;DIR1215;B2
CPU_MMAP;ADI2;DIR1215;B1
CPU_MMAP;ADI2;DIR1215;B0
CPU_MMAP;ADI2;SET03
CPU_MMAP;ADI2;SET03;S3
CPU_MMAP;ADI2;SET03;S2
CPU_MMAP;ADI2;SET03;S1
CPU_MMAP;ADI2;SET03;S0
CPU_MMAP;ADI2;SET47
CPU_MMAP;ADI2;SET47;S3
CPU_MMAP;ADI2;SET47;S2
CPU_MMAP;ADI2;SET47;S1
CPU_MMAP;ADI2;SET47;S0
CPU_MMAP;ADI2;SET811
CPU_MMAP;ADI2;SET811;S3
CPU_MMAP;ADI2;SET811;S2
CPU_MMAP;ADI2;SET811;S1
CPU_MMAP;ADI2;SET811;S0
CPU_MMAP;ADI2;SET1215
CPU_MMAP;ADI2;SET1215;S3
CPU_MMAP;ADI2;SET1215;S2
CPU_MMAP;ADI2;SET1215;S1
CPU_MMAP;ADI2;SET1215;S0
CPU_MMAP;ADI2;CLR03
CPU_MMAP;ADI2;CLR03;S3
CPU_MMAP;ADI2;CLR03;S2
CPU_MMAP;ADI2;CLR03;S1
CPU_MMAP;ADI2;CLR03;S0
CPU_MMAP;ADI2;CLR47
CPU_MMAP;ADI2;CLR47;S3
CPU_MMAP;ADI2;CLR47;S2
CPU_MMAP;ADI2;CLR47;S1
CPU_MMAP;ADI2;CLR47;S0
CPU_MMAP;ADI2;CLR811
CPU_MMAP;ADI2;CLR811;S3
CPU_MMAP;ADI2;CLR811;S2
CPU_MMAP;ADI2;CLR811;S1
CPU_MMAP;ADI2;CLR811;S0
CPU_MMAP;ADI2;CLR1215
CPU_MMAP;ADI2;CLR1215;S3
CPU_MMAP;ADI2;CLR1215;S2
CPU_MMAP;ADI2;CLR1215;S1
CPU_MMAP;ADI2;CLR1215;S0
CPU_MMAP;ADI2;SLAVESTAT
CPU_MMAP;ADI2;SLAVESTAT;RESERVED2
CPU_MMAP;ADI2;SLAVESTAT;DI_REQ
CPU_MMAP;ADI2;SLAVESTAT;DI_ACK
CPU_MMAP;ADI2;SLAVECONF
CPU_MMAP;ADI2;SLAVECONF;RESERVED8
CPU_MMAP;ADI2;SLAVECONF;CONFLOCK
CPU_MMAP;ADI2;SLAVECONF;RESERVED3
CPU_MMAP;ADI2;SLAVECONF;WAITFORACK
CPU_MMAP;ADI2;SLAVECONF;ADICLKSPEED
CPU_MMAP;ADI2;MASK4B01
CPU_MMAP;ADI2;MASK4B01;M1H
CPU_MMAP;ADI2;MASK4B01;D1H
CPU_MMAP;ADI2;MASK4B01;M1L
CPU_MMAP;ADI2;MASK4B01;D1L
CPU_MMAP;ADI2;MASK4B01;M0H
CPU_MMAP;ADI2;MASK4B01;D0H
CPU_MMAP;ADI2;MASK4B01;M0L
CPU_MMAP;ADI2;MASK4B01;D0L
CPU_MMAP;ADI2;MASK4B23
CPU_MMAP;ADI2;MASK4B23;M1H
CPU_MMAP;ADI2;MASK4B23;D1H
CPU_MMAP;ADI2;MASK4B23;M1L
CPU_MMAP;ADI2;MASK4B23;D1L
CPU_MMAP;ADI2;MASK4B23;M0H
CPU_MMAP;ADI2;MASK4B23;D0H
CPU_MMAP;ADI2;MASK4B23;M0L
CPU_MMAP;ADI2;MASK4B23;D0L
CPU_MMAP;ADI2;MASK4B45
CPU_MMAP;ADI2;MASK4B45;M1H
CPU_MMAP;ADI2;MASK4B45;D1H
CPU_MMAP;ADI2;MASK4B45;M1L
CPU_MMAP;ADI2;MASK4B45;D1L
CPU_MMAP;ADI2;MASK4B45;M0H
CPU_MMAP;ADI2;MASK4B45;D0H
CPU_MMAP;ADI2;MASK4B45;M0L
CPU_MMAP;ADI2;MASK4B45;D0L
CPU_MMAP;ADI2;MASK4B67
CPU_MMAP;ADI2;MASK4B67;M1H
CPU_MMAP;ADI2;MASK4B67;D1H
CPU_MMAP;ADI2;MASK4B67;M1L
CPU_MMAP;ADI2;MASK4B67;D1L
CPU_MMAP;ADI2;MASK4B67;M0H
CPU_MMAP;ADI2;MASK4B67;D0H
CPU_MMAP;ADI2;MASK4B67;M0L
CPU_MMAP;ADI2;MASK4B67;D0L
CPU_MMAP;ADI2;MASK4B89
CPU_MMAP;ADI2;MASK4B89;M1H
CPU_MMAP;ADI2;MASK4B89;D1H
CPU_MMAP;ADI2;MASK4B89;M1L
CPU_MMAP;ADI2;MASK4B89;D1L
CPU_MMAP;ADI2;MASK4B89;M0H
CPU_MMAP;ADI2;MASK4B89;D0H
CPU_MMAP;ADI2;MASK4B89;M0L
CPU_MMAP;ADI2;MASK4B89;D0L
CPU_MMAP;ADI2;MASK4B1011
CPU_MMAP;ADI2;MASK4B1011;M1H
CPU_MMAP;ADI2;MASK4B1011;D1H
CPU_MMAP;ADI2;MASK4B1011;M1L
CPU_MMAP;ADI2;MASK4B1011;D1L
CPU_MMAP;ADI2;MASK4B1011;M0H
CPU_MMAP;ADI2;MASK4B1011;D0H
CPU_MMAP;ADI2;MASK4B1011;M0L
CPU_MMAP;ADI2;MASK4B1011;D0L
CPU_MMAP;ADI2;MASK4B1213
CPU_MMAP;ADI2;MASK4B1213;M1H
CPU_MMAP;ADI2;MASK4B1213;D1H
CPU_MMAP;ADI2;MASK4B1213;M1L
CPU_MMAP;ADI2;MASK4B1213;D1L
CPU_MMAP;ADI2;MASK4B1213;M0H
CPU_MMAP;ADI2;MASK4B1213;D0H
CPU_MMAP;ADI2;MASK4B1213;M0L
CPU_MMAP;ADI2;MASK4B1213;D0L
CPU_MMAP;ADI2;MASK4B1415
CPU_MMAP;ADI2;MASK4B1415;M1H
CPU_MMAP;ADI2;MASK4B1415;D1H
CPU_MMAP;ADI2;MASK4B1415;M1L
CPU_MMAP;ADI2;MASK4B1415;D1L
CPU_MMAP;ADI2;MASK4B1415;M0H
CPU_MMAP;ADI2;MASK4B1415;D0H
CPU_MMAP;ADI2;MASK4B1415;M0L
CPU_MMAP;ADI2;MASK4B1415;D0L
CPU_MMAP;ADI2;MASK8B01
CPU_MMAP;ADI2;MASK8B01;M1
CPU_MMAP;ADI2;MASK8B01;D1
CPU_MMAP;ADI2;MASK8B01;M0
CPU_MMAP;ADI2;MASK8B01;D0
CPU_MMAP;ADI2;MASK8B23
CPU_MMAP;ADI2;MASK8B23;M1
CPU_MMAP;ADI2;MASK8B23;D1
CPU_MMAP;ADI2;MASK8B23;M0
CPU_MMAP;ADI2;MASK8B23;D0
CPU_MMAP;ADI2;MASK8B45
CPU_MMAP;ADI2;MASK8B45;M1
CPU_MMAP;ADI2;MASK8B45;D1
CPU_MMAP;ADI2;MASK8B45;M0
CPU_MMAP;ADI2;MASK8B45;D0
CPU_MMAP;ADI2;MASK8B67
CPU_MMAP;ADI2;MASK8B67;M1
CPU_MMAP;ADI2;MASK8B67;D1
CPU_MMAP;ADI2;MASK8B67;M0
CPU_MMAP;ADI2;MASK8B67;D0
CPU_MMAP;ADI2;MASK8B89
CPU_MMAP;ADI2;MASK8B89;M1
CPU_MMAP;ADI2;MASK8B89;D1
CPU_MMAP;ADI2;MASK8B89;M0
CPU_MMAP;ADI2;MASK8B89;D0
CPU_MMAP;ADI2;MASK8B1011
CPU_MMAP;ADI2;MASK8B1011;M1
CPU_MMAP;ADI2;MASK8B1011;D1
CPU_MMAP;ADI2;MASK8B1011;M0
CPU_MMAP;ADI2;MASK8B1011;D0
CPU_MMAP;ADI2;MASK8B1213
CPU_MMAP;ADI2;MASK8B1213;M1
CPU_MMAP;ADI2;MASK8B1213;D1
CPU_MMAP;ADI2;MASK8B1213;M0
CPU_MMAP;ADI2;MASK8B1213;D0
CPU_MMAP;ADI2;MASK8B1415
CPU_MMAP;ADI2;MASK8B1415;M1
CPU_MMAP;ADI2;MASK8B1415;D1
CPU_MMAP;ADI2;MASK8B1415;M0
CPU_MMAP;ADI2;MASK8B1415;D0
CPU_MMAP;ADI2;MASK16B01
CPU_MMAP;ADI2;MASK16B01;M
CPU_MMAP;ADI2;MASK16B01;D
CPU_MMAP;ADI2;MASK16B23
CPU_MMAP;ADI2;MASK16B23;M
CPU_MMAP;ADI2;MASK16B23;D
CPU_MMAP;ADI2;MASK16B45
CPU_MMAP;ADI2;MASK16B45;M
CPU_MMAP;ADI2;MASK16B45;D
CPU_MMAP;ADI2;MASK16B67
CPU_MMAP;ADI2;MASK16B67;M
CPU_MMAP;ADI2;MASK16B67;D
CPU_MMAP;ADI2;MASK16B89
CPU_MMAP;ADI2;MASK16B89;M
CPU_MMAP;ADI2;MASK16B89;D
CPU_MMAP;ADI2;MASK16B1011
CPU_MMAP;ADI2;MASK16B1011;M
CPU_MMAP;ADI2;MASK16B1011;D
CPU_MMAP;ADI2;MASK16B1213
CPU_MMAP;ADI2;MASK16B1213;M
CPU_MMAP;ADI2;MASK16B1213;D
CPU_MMAP;ADI2;MASK16B1415
CPU_MMAP;ADI2;MASK16B1415;M
CPU_MMAP;ADI2;MASK16B1415;D
CPU_MMAP;ADI3
CPU_MMAP;ADI3;DIR03
CPU_MMAP;ADI3;DIR03;B3
CPU_MMAP;ADI3;DIR03;B2
CPU_MMAP;ADI3;DIR03;B1
CPU_MMAP;ADI3;DIR03;B0
CPU_MMAP;ADI3;DIR47
CPU_MMAP;ADI3;DIR47;B3
CPU_MMAP;ADI3;DIR47;B2
CPU_MMAP;ADI3;DIR47;B1
CPU_MMAP;ADI3;DIR47;B0
CPU_MMAP;ADI3;DIR811
CPU_MMAP;ADI3;DIR811;B3
CPU_MMAP;ADI3;DIR811;B2
CPU_MMAP;ADI3;DIR811;B1
CPU_MMAP;ADI3;DIR811;B0
CPU_MMAP;ADI3;DIR1215
CPU_MMAP;ADI3;DIR1215;B3
CPU_MMAP;ADI3;DIR1215;B2
CPU_MMAP;ADI3;DIR1215;B1
CPU_MMAP;ADI3;DIR1215;B0
CPU_MMAP;ADI3;SET03
CPU_MMAP;ADI3;SET03;S3
CPU_MMAP;ADI3;SET03;S2
CPU_MMAP;ADI3;SET03;S1
CPU_MMAP;ADI3;SET03;S0
CPU_MMAP;ADI3;SET47
CPU_MMAP;ADI3;SET47;S3
CPU_MMAP;ADI3;SET47;S2
CPU_MMAP;ADI3;SET47;S1
CPU_MMAP;ADI3;SET47;S0
CPU_MMAP;ADI3;SET811
CPU_MMAP;ADI3;SET811;S3
CPU_MMAP;ADI3;SET811;S2
CPU_MMAP;ADI3;SET811;S1
CPU_MMAP;ADI3;SET811;S0
CPU_MMAP;ADI3;SET1215
CPU_MMAP;ADI3;SET1215;S3
CPU_MMAP;ADI3;SET1215;S2
CPU_MMAP;ADI3;SET1215;S1
CPU_MMAP;ADI3;SET1215;S0
CPU_MMAP;ADI3;CLR03
CPU_MMAP;ADI3;CLR03;S3
CPU_MMAP;ADI3;CLR03;S2
CPU_MMAP;ADI3;CLR03;S1
CPU_MMAP;ADI3;CLR03;S0
CPU_MMAP;ADI3;CLR47
CPU_MMAP;ADI3;CLR47;S3
CPU_MMAP;ADI3;CLR47;S2
CPU_MMAP;ADI3;CLR47;S1
CPU_MMAP;ADI3;CLR47;S0
CPU_MMAP;ADI3;CLR811
CPU_MMAP;ADI3;CLR811;S3
CPU_MMAP;ADI3;CLR811;S2
CPU_MMAP;ADI3;CLR811;S1
CPU_MMAP;ADI3;CLR811;S0
CPU_MMAP;ADI3;CLR1215
CPU_MMAP;ADI3;CLR1215;S3
CPU_MMAP;ADI3;CLR1215;S2
CPU_MMAP;ADI3;CLR1215;S1
CPU_MMAP;ADI3;CLR1215;S0
CPU_MMAP;ADI3;SLAVESTAT
CPU_MMAP;ADI3;SLAVESTAT;RESERVED2
CPU_MMAP;ADI3;SLAVESTAT;DI_REQ
CPU_MMAP;ADI3;SLAVESTAT;DI_ACK
CPU_MMAP;ADI3;SLAVECONF
CPU_MMAP;ADI3;SLAVECONF;RESERVED8
CPU_MMAP;ADI3;SLAVECONF;CONFLOCK
CPU_MMAP;ADI3;SLAVECONF;RESERVED3
CPU_MMAP;ADI3;SLAVECONF;WAITFORACK
CPU_MMAP;ADI3;SLAVECONF;ADICLKSPEED
CPU_MMAP;ADI3;MASK4B01
CPU_MMAP;ADI3;MASK4B01;M1H
CPU_MMAP;ADI3;MASK4B01;D1H
CPU_MMAP;ADI3;MASK4B01;M1L
CPU_MMAP;ADI3;MASK4B01;D1L
CPU_MMAP;ADI3;MASK4B01;M0H
CPU_MMAP;ADI3;MASK4B01;D0H
CPU_MMAP;ADI3;MASK4B01;M0L
CPU_MMAP;ADI3;MASK4B01;D0L
CPU_MMAP;ADI3;MASK4B23
CPU_MMAP;ADI3;MASK4B23;M1H
CPU_MMAP;ADI3;MASK4B23;D1H
CPU_MMAP;ADI3;MASK4B23;M1L
CPU_MMAP;ADI3;MASK4B23;D1L
CPU_MMAP;ADI3;MASK4B23;M0H
CPU_MMAP;ADI3;MASK4B23;D0H
CPU_MMAP;ADI3;MASK4B23;M0L
CPU_MMAP;ADI3;MASK4B23;D0L
CPU_MMAP;ADI3;MASK4B45
CPU_MMAP;ADI3;MASK4B45;M1H
CPU_MMAP;ADI3;MASK4B45;D1H
CPU_MMAP;ADI3;MASK4B45;M1L
CPU_MMAP;ADI3;MASK4B45;D1L
CPU_MMAP;ADI3;MASK4B45;M0H
CPU_MMAP;ADI3;MASK4B45;D0H
CPU_MMAP;ADI3;MASK4B45;M0L
CPU_MMAP;ADI3;MASK4B45;D0L
CPU_MMAP;ADI3;MASK4B67
CPU_MMAP;ADI3;MASK4B67;M1H
CPU_MMAP;ADI3;MASK4B67;D1H
CPU_MMAP;ADI3;MASK4B67;M1L
CPU_MMAP;ADI3;MASK4B67;D1L
CPU_MMAP;ADI3;MASK4B67;M0H
CPU_MMAP;ADI3;MASK4B67;D0H
CPU_MMAP;ADI3;MASK4B67;M0L
CPU_MMAP;ADI3;MASK4B67;D0L
CPU_MMAP;ADI3;MASK4B89
CPU_MMAP;ADI3;MASK4B89;M1H
CPU_MMAP;ADI3;MASK4B89;D1H
CPU_MMAP;ADI3;MASK4B89;M1L
CPU_MMAP;ADI3;MASK4B89;D1L
CPU_MMAP;ADI3;MASK4B89;M0H
CPU_MMAP;ADI3;MASK4B89;D0H
CPU_MMAP;ADI3;MASK4B89;M0L
CPU_MMAP;ADI3;MASK4B89;D0L
CPU_MMAP;ADI3;MASK4B1011
CPU_MMAP;ADI3;MASK4B1011;M1H
CPU_MMAP;ADI3;MASK4B1011;D1H
CPU_MMAP;ADI3;MASK4B1011;M1L
CPU_MMAP;ADI3;MASK4B1011;D1L
CPU_MMAP;ADI3;MASK4B1011;M0H
CPU_MMAP;ADI3;MASK4B1011;D0H
CPU_MMAP;ADI3;MASK4B1011;M0L
CPU_MMAP;ADI3;MASK4B1011;D0L
CPU_MMAP;ADI3;MASK4B1213
CPU_MMAP;ADI3;MASK4B1213;M1H
CPU_MMAP;ADI3;MASK4B1213;D1H
CPU_MMAP;ADI3;MASK4B1213;M1L
CPU_MMAP;ADI3;MASK4B1213;D1L
CPU_MMAP;ADI3;MASK4B1213;M0H
CPU_MMAP;ADI3;MASK4B1213;D0H
CPU_MMAP;ADI3;MASK4B1213;M0L
CPU_MMAP;ADI3;MASK4B1213;D0L
CPU_MMAP;ADI3;MASK4B1415
CPU_MMAP;ADI3;MASK4B1415;M1H
CPU_MMAP;ADI3;MASK4B1415;D1H
CPU_MMAP;ADI3;MASK4B1415;M1L
CPU_MMAP;ADI3;MASK4B1415;D1L
CPU_MMAP;ADI3;MASK4B1415;M0H
CPU_MMAP;ADI3;MASK4B1415;D0H
CPU_MMAP;ADI3;MASK4B1415;M0L
CPU_MMAP;ADI3;MASK4B1415;D0L
CPU_MMAP;ADI3;MASK8B01
CPU_MMAP;ADI3;MASK8B01;M1
CPU_MMAP;ADI3;MASK8B01;D1
CPU_MMAP;ADI3;MASK8B01;M0
CPU_MMAP;ADI3;MASK8B01;D0
CPU_MMAP;ADI3;MASK8B23
CPU_MMAP;ADI3;MASK8B23;M1
CPU_MMAP;ADI3;MASK8B23;D1
CPU_MMAP;ADI3;MASK8B23;M0
CPU_MMAP;ADI3;MASK8B23;D0
CPU_MMAP;ADI3;MASK8B45
CPU_MMAP;ADI3;MASK8B45;M1
CPU_MMAP;ADI3;MASK8B45;D1
CPU_MMAP;ADI3;MASK8B45;M0
CPU_MMAP;ADI3;MASK8B45;D0
CPU_MMAP;ADI3;MASK8B67
CPU_MMAP;ADI3;MASK8B67;M1
CPU_MMAP;ADI3;MASK8B67;D1
CPU_MMAP;ADI3;MASK8B67;M0
CPU_MMAP;ADI3;MASK8B67;D0
CPU_MMAP;ADI3;MASK8B89
CPU_MMAP;ADI3;MASK8B89;M1
CPU_MMAP;ADI3;MASK8B89;D1
CPU_MMAP;ADI3;MASK8B89;M0
CPU_MMAP;ADI3;MASK8B89;D0
CPU_MMAP;ADI3;MASK8B1011
CPU_MMAP;ADI3;MASK8B1011;M1
CPU_MMAP;ADI3;MASK8B1011;D1
CPU_MMAP;ADI3;MASK8B1011;M0
CPU_MMAP;ADI3;MASK8B1011;D0
CPU_MMAP;ADI3;MASK8B1213
CPU_MMAP;ADI3;MASK8B1213;M1
CPU_MMAP;ADI3;MASK8B1213;D1
CPU_MMAP;ADI3;MASK8B1213;M0
CPU_MMAP;ADI3;MASK8B1213;D0
CPU_MMAP;ADI3;MASK8B1415
CPU_MMAP;ADI3;MASK8B1415;M1
CPU_MMAP;ADI3;MASK8B1415;D1
CPU_MMAP;ADI3;MASK8B1415;M0
CPU_MMAP;ADI3;MASK8B1415;D0
CPU_MMAP;ADI3;MASK16B01
CPU_MMAP;ADI3;MASK16B01;M
CPU_MMAP;ADI3;MASK16B01;D
CPU_MMAP;ADI3;MASK16B23
CPU_MMAP;ADI3;MASK16B23;M
CPU_MMAP;ADI3;MASK16B23;D
CPU_MMAP;ADI3;MASK16B45
CPU_MMAP;ADI3;MASK16B45;M
CPU_MMAP;ADI3;MASK16B45;D
CPU_MMAP;ADI3;MASK16B67
CPU_MMAP;ADI3;MASK16B67;M
CPU_MMAP;ADI3;MASK16B67;D
CPU_MMAP;ADI3;MASK16B89
CPU_MMAP;ADI3;MASK16B89;M
CPU_MMAP;ADI3;MASK16B89;D
CPU_MMAP;ADI3;MASK16B1011
CPU_MMAP;ADI3;MASK16B1011;M
CPU_MMAP;ADI3;MASK16B1011;D
CPU_MMAP;ADI3;MASK16B1213
CPU_MMAP;ADI3;MASK16B1213;M
CPU_MMAP;ADI3;MASK16B1213;D
CPU_MMAP;ADI3;MASK16B1415
CPU_MMAP;ADI3;MASK16B1415;M
CPU_MMAP;ADI3;MASK16B1415;D
CPU_MMAP;AON_SYSCTL
CPU_MMAP;AON_SYSCTL;PWRCTL
CPU_MMAP;AON_SYSCTL;PWRCTL;RESERVED12
CPU_MMAP;AON_SYSCTL;PWRCTL;VDDS3_IOSEG_EN_SET
CPU_MMAP;AON_SYSCTL;PWRCTL;VDDS2_IOSEG_EN_SET
CPU_MMAP;AON_SYSCTL;PWRCTL;VDDS3_IOSEG_EN_CLR
CPU_MMAP;AON_SYSCTL;PWRCTL;VDDS2_IOSEG_EN_CLR
CPU_MMAP;AON_SYSCTL;PWRCTL;RESERVED3
CPU_MMAP;AON_SYSCTL;PWRCTL;DCDC_ACTIVE
CPU_MMAP;AON_SYSCTL;PWRCTL;EXT_REG_MODE
CPU_MMAP;AON_SYSCTL;PWRCTL;DCDC_EN
CPU_MMAP;AON_SYSCTL;RESETCTL
CPU_MMAP;AON_SYSCTL;RESETCTL;SYSRESET
CPU_MMAP;AON_SYSCTL;RESETCTL;RESERVED26
CPU_MMAP;AON_SYSCTL;RESETCTL;BOOT_DET_1_CLR
CPU_MMAP;AON_SYSCTL;RESETCTL;BOOT_DET_0_CLR
CPU_MMAP;AON_SYSCTL;RESETCTL;RESERVED18
CPU_MMAP;AON_SYSCTL;RESETCTL;BOOT_DET_1_SET
CPU_MMAP;AON_SYSCTL;RESETCTL;BOOT_DET_0_SET
CPU_MMAP;AON_SYSCTL;RESETCTL;WU_FROM_SD
CPU_MMAP;AON_SYSCTL;RESETCTL;GPIO_WU_FROM_SD
CPU_MMAP;AON_SYSCTL;RESETCTL;BOOT_DET_1
CPU_MMAP;AON_SYSCTL;RESETCTL;BOOT_DET_0
CPU_MMAP;AON_SYSCTL;RESETCTL;VDDS_LOSS_EN_OVR
CPU_MMAP;AON_SYSCTL;RESETCTL;VDDR_LOSS_EN_OVR
CPU_MMAP;AON_SYSCTL;RESETCTL;VDD_LOSS_EN_OVR
CPU_MMAP;AON_SYSCTL;RESETCTL;RESERVED8
CPU_MMAP;AON_SYSCTL;RESETCTL;VDDS_LOSS_EN
CPU_MMAP;AON_SYSCTL;RESETCTL;VDDR_LOSS_EN
CPU_MMAP;AON_SYSCTL;RESETCTL;VDD_LOSS_EN
CPU_MMAP;AON_SYSCTL;RESETCTL;CLK_LOSS_EN
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;PWR_ON
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;PIN_RESET
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;VDDS_LOSS
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;VDD_LOSS
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;VDDR_LOSS
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;CLK_LOSS
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;SYSRESET
CPU_MMAP;AON_SYSCTL;RESETCTL;RESET_SRC;WARMRESET
CPU_MMAP;AON_SYSCTL;RESETCTL;RESERVED0
CPU_MMAP;AON_SYSCTL;SLEEPCTL
CPU_MMAP;AON_SYSCTL;SLEEPCTL;RESERVED1
CPU_MMAP;AON_SYSCTL;SLEEPCTL;IO_PAD_SLEEP_DIS
CPU_MMAP;AON_WUC
CPU_MMAP;AON_WUC;MCUCLK
CPU_MMAP;AON_WUC;MCUCLK;RESERVED3
CPU_MMAP;AON_WUC;MCUCLK;RCOSC_HF_CAL_DONE
CPU_MMAP;AON_WUC;MCUCLK;PWR_DWN_SRC
CPU_MMAP;AON_WUC;MCUCLK;PWR_DWN_SRC;NONE
CPU_MMAP;AON_WUC;MCUCLK;PWR_DWN_SRC;SCLK_LF
CPU_MMAP;AON_WUC;MCUCLK;PWR_DWN_SRC;SCLK_MF
CPU_MMAP;AON_WUC;AUXCLK
CPU_MMAP;AON_WUC;AUXCLK;RESERVED13
CPU_MMAP;AON_WUC;AUXCLK;PWR_DWN_SRC
CPU_MMAP;AON_WUC;AUXCLK;PWR_DWN_SRC;NONE
CPU_MMAP;AON_WUC;AUXCLK;PWR_DWN_SRC;SCLK_LF
CPU_MMAP;AON_WUC;AUXCLK;PWR_DWN_SRC;SCLK_MF
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV2
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV4
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV8
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV16
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV32
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV64
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV128
CPU_MMAP;AON_WUC;AUXCLK;SCLK_HF_DIV;DIV256
CPU_MMAP;AON_WUC;AUXCLK;RESERVED3
CPU_MMAP;AON_WUC;AUXCLK;SRC
CPU_MMAP;AON_WUC;AUXCLK;SRC;SCLK_HF
CPU_MMAP;AON_WUC;AUXCLK;SRC;SCLK_MF
CPU_MMAP;AON_WUC;AUXCLK;SRC;SCLK_LF
CPU_MMAP;AON_WUC;MCUCFG
CPU_MMAP;AON_WUC;MCUCFG;RESERVED18
CPU_MMAP;AON_WUC;MCUCFG;VIRT_OFF
CPU_MMAP;AON_WUC;MCUCFG;FIXED_WU_EN
CPU_MMAP;AON_WUC;MCUCFG;RESERVED4
CPU_MMAP;AON_WUC;MCUCFG;SRAM_RET_EN
CPU_MMAP;AON_WUC;MCUCFG;SRAM_RET_EN;RET_NONE
CPU_MMAP;AON_WUC;MCUCFG;SRAM_RET_EN;RET_LEVEL1
CPU_MMAP;AON_WUC;MCUCFG;SRAM_RET_EN;RET_LEVEL2
CPU_MMAP;AON_WUC;MCUCFG;SRAM_RET_EN;RET_LEVEL3
CPU_MMAP;AON_WUC;MCUCFG;SRAM_RET_EN;RET_FULL
CPU_MMAP;AON_WUC;AUXCFG
CPU_MMAP;AON_WUC;AUXCFG;RESERVED18
CPU_MMAP;AON_WUC;AUXCFG;VIRT_OFF
CPU_MMAP;AON_WUC;AUXCFG;FIXED_WU_EN
CPU_MMAP;AON_WUC;AUXCFG;RESERVED1
CPU_MMAP;AON_WUC;AUXCFG;RAM_RET_EN
CPU_MMAP;AON_WUC;AUXCTL
CPU_MMAP;AON_WUC;AUXCTL;RESET_REQ
CPU_MMAP;AON_WUC;AUXCTL;RESERVED3
CPU_MMAP;AON_WUC;AUXCTL;SCE_RUN_EN
CPU_MMAP;AON_WUC;AUXCTL;SWEV
CPU_MMAP;AON_WUC;AUXCTL;AUX_FORCE_ON
CPU_MMAP;AON_WUC;PWRSTAT
CPU_MMAP;AON_WUC;PWRSTAT;SW
CPU_MMAP;AON_WUC;PWRSTAT;RESERVED26
CPU_MMAP;AON_WUC;PWRSTAT;VDDS_OK
CPU_MMAP;AON_WUC;PWRSTAT;VDDR_OK
CPU_MMAP;AON_WUC;PWRSTAT;VDD_OK
CPU_MMAP;AON_WUC;PWRSTAT;OSC_GBIAS
CPU_MMAP;AON_WUC;PWRSTAT;AUX_GBIAS
CPU_MMAP;AON_WUC;PWRSTAT;MCU_GBIAS
CPU_MMAP;AON_WUC;PWRSTAT;RESERVED19
CPU_MMAP;AON_WUC;PWRSTAT;OSC_BGAP
CPU_MMAP;AON_WUC;PWRSTAT;AUX_BGAP
CPU_MMAP;AON_WUC;PWRSTAT;MCU_BGAP
CPU_MMAP;AON_WUC;PWRSTAT;RESERVED15
CPU_MMAP;AON_WUC;PWRSTAT;GBIAS_ON99
CPU_MMAP;AON_WUC;PWRSTAT;GBIAS_ON
CPU_MMAP;AON_WUC;PWRSTAT;BGAP_ON
CPU_MMAP;AON_WUC;PWRSTAT;RESERVED10
CPU_MMAP;AON_WUC;PWRSTAT;AUX_PWR_DWN
CPU_MMAP;AON_WUC;PWRSTAT;MCU_PWR_DWN
CPU_MMAP;AON_WUC;PWRSTAT;RESERVED7
CPU_MMAP;AON_WUC;PWRSTAT;JTAG_PD_ON
CPU_MMAP;AON_WUC;PWRSTAT;AUX_PD_ON
CPU_MMAP;AON_WUC;PWRSTAT;MCU_PD_ON
CPU_MMAP;AON_WUC;PWRSTAT;AUX_BUS_RESET_DONE
CPU_MMAP;AON_WUC;PWRSTAT;AUX_BUS_CONNECTED
CPU_MMAP;AON_WUC;PWRSTAT;AUX_RESET_DONE
CPU_MMAP;AON_WUC;PWRSTAT;PWR_DWN
CPU_MMAP;AON_WUC;SHUTDOWN
CPU_MMAP;AON_WUC;SHUTDOWN;RESERVED2
CPU_MMAP;AON_WUC;SHUTDOWN;JTAG_OVR
CPU_MMAP;AON_WUC;SHUTDOWN;EN
CPU_MMAP;AON_WUC;CTL0
CPU_MMAP;AON_WUC;CTL0;RESERVED9
CPU_MMAP;AON_WUC;CTL0;PWR_DWN_DIS
CPU_MMAP;AON_WUC;CTL0;FIXED_WU_PER
CPU_MMAP;AON_WUC;CTL0;AUX_SRAM_ERASE
CPU_MMAP;AON_WUC;CTL0;MCU_SRAM_ERASE
CPU_MMAP;AON_WUC;CTL0;AUX_SRAM_REPAIRED
CPU_MMAP;AON_WUC;CTL0;MCU_SRAM_REPAIRED
CPU_MMAP;AON_WUC;CTL1
CPU_MMAP;AON_WUC;CTL1;RESERVED24
CPU_MMAP;AON_WUC;CTL1;TAP_SECURITY_CTL
CPU_MMAP;AON_WUC;CTL1;RESERVED10
CPU_MMAP;AON_WUC;CTL1;TOTAL_ERASE
CPU_MMAP;AON_WUC;CTL1;CHIP_ERASE
CPU_MMAP;AON_WUC;CTL1;RESERVED2
CPU_MMAP;AON_WUC;CTL1;MCU_RESET_SRC
CPU_MMAP;AON_WUC;CTL1;MCU_WARM_RESET
CPU_MMAP;AON_WUC;RECHARGECFG
CPU_MMAP;AON_WUC;RECHARGECFG;ADAPTIVE_EN
CPU_MMAP;AON_WUC;RECHARGECFG;RESERVED24
CPU_MMAP;AON_WUC;RECHARGECFG;C2
CPU_MMAP;AON_WUC;RECHARGECFG;C1
CPU_MMAP;AON_WUC;RECHARGECFG;MAX_PER_M
CPU_MMAP;AON_WUC;RECHARGECFG;MAX_PER_E
CPU_MMAP;AON_WUC;RECHARGECFG;PER_M
CPU_MMAP;AON_WUC;RECHARGECFG;PER_E
CPU_MMAP;AON_WUC;RECHARGESTAT
CPU_MMAP;AON_WUC;RECHARGESTAT;RESERVED20
CPU_MMAP;AON_WUC;RECHARGESTAT;VDDR_SMPLS
CPU_MMAP;AON_WUC;RECHARGESTAT;MAX_USED_PER
CPU_MMAP;AON_WUC;OSCCFG
CPU_MMAP;AON_WUC;OSCCFG;RESERVED8
CPU_MMAP;AON_WUC;OSCCFG;PER_M
CPU_MMAP;AON_WUC;OSCCFG;PER_E
CPU_MMAP;AON_WUC;JTAGCFG
CPU_MMAP;AON_WUC;JTAGCFG;RESERVED9
CPU_MMAP;AON_WUC;JTAGCFG;JTAG_PD_FORCE_ON
CPU_MMAP;AON_WUC;JTAGCFG;RESERVED7
CPU_MMAP;AON_WUC;JTAGCFG;PBIST2_TAP
CPU_MMAP;AON_WUC;JTAGCFG;PBIST1_TAP
CPU_MMAP;AON_WUC;JTAGCFG;RESERVED4
CPU_MMAP;AON_WUC;JTAGCFG;TEST_TAP
CPU_MMAP;AON_WUC;JTAGCFG;WUC_TAP
CPU_MMAP;AON_WUC;JTAGCFG;PRCM_TAP
CPU_MMAP;AON_WUC;JTAGCFG;CPU_DAP
CPU_MMAP;AON_WUC;JTAGUSERCODE
CPU_MMAP;AON_WUC;JTAGUSERCODE;USER_CODE
CPU_MMAP;AON_RTC
CPU_MMAP;AON_RTC;CTL
CPU_MMAP;AON_RTC;CTL;RESERVED19
CPU_MMAP;AON_RTC;CTL;COMB_EV_MASK
CPU_MMAP;AON_RTC;CTL;COMB_EV_MASK;NONE
CPU_MMAP;AON_RTC;CTL;COMB_EV_MASK;CH0
CPU_MMAP;AON_RTC;CTL;COMB_EV_MASK;CH1
CPU_MMAP;AON_RTC;CTL;COMB_EV_MASK;CH2
CPU_MMAP;AON_RTC;CTL;RESERVED12
CPU_MMAP;AON_RTC;CTL;EV_DELAY
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D0
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D1
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D2
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D4
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D8
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D16
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D32
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D48
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D64
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D80
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D96
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D112
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D128
CPU_MMAP;AON_RTC;CTL;EV_DELAY;D144
CPU_MMAP;AON_RTC;CTL;RESET
CPU_MMAP;AON_RTC;CTL;RESERVED3
CPU_MMAP;AON_RTC;CTL;RTC_4KHZ_EN
CPU_MMAP;AON_RTC;CTL;RTC_UPD_EN
CPU_MMAP;AON_RTC;CTL;EN
CPU_MMAP;AON_RTC;EVFLAGS
CPU_MMAP;AON_RTC;EVFLAGS;RESERVED17
CPU_MMAP;AON_RTC;EVFLAGS;CH2
CPU_MMAP;AON_RTC;EVFLAGS;RESERVED9
CPU_MMAP;AON_RTC;EVFLAGS;CH1
CPU_MMAP;AON_RTC;EVFLAGS;RESERVED1
CPU_MMAP;AON_RTC;EVFLAGS;CH0
CPU_MMAP;AON_RTC;SEC
CPU_MMAP;AON_RTC;SEC;VALUE
CPU_MMAP;AON_RTC;SUBSEC
CPU_MMAP;AON_RTC;SUBSEC;VALUE
CPU_MMAP;AON_RTC;SUBSECINC
CPU_MMAP;AON_RTC;SUBSECINC;RESERVED24
CPU_MMAP;AON_RTC;SUBSECINC;VALUEINC
CPU_MMAP;AON_RTC;CHCTL
CPU_MMAP;AON_RTC;CHCTL;RESERVED19
CPU_MMAP;AON_RTC;CHCTL;CH2_CONT_EN
CPU_MMAP;AON_RTC;CHCTL;RESERVED17
CPU_MMAP;AON_RTC;CHCTL;CH2_EN
CPU_MMAP;AON_RTC;CHCTL;RESERVED10
CPU_MMAP;AON_RTC;CHCTL;CH1_CAPT_EN
CPU_MMAP;AON_RTC;CHCTL;CH1_EN
CPU_MMAP;AON_RTC;CHCTL;RESERVED1
CPU_MMAP;AON_RTC;CHCTL;CH0_EN
CPU_MMAP;AON_RTC;CH0CMP
CPU_MMAP;AON_RTC;CH0CMP;VALUE
CPU_MMAP;AON_RTC;CH1CMP
CPU_MMAP;AON_RTC;CH1CMP;VALUE
CPU_MMAP;AON_RTC;CH2CMP
CPU_MMAP;AON_RTC;CH2CMP;VALUE
CPU_MMAP;AON_RTC;CH2CMPINC
CPU_MMAP;AON_RTC;CH2CMPINC;VALUE
CPU_MMAP;AON_RTC;CH1CAPT
CPU_MMAP;AON_RTC;CH1CAPT;SEC
CPU_MMAP;AON_RTC;CH1CAPT;SUBSEC
CPU_MMAP;AON_RTC;SYNC
CPU_MMAP;AON_RTC;SYNC;RESERVED1
CPU_MMAP;AON_RTC;SYNC;WBUSY
CPU_MMAP;AON_EVENT
CPU_MMAP;AON_EVENT;MCUWUSEL
CPU_MMAP;AON_EVENT;MCUWUSEL;RESERVED30
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD3
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD4
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD5
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD6
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD7
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD8
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD9
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD10
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD11
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD12
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD13
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD14
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD15
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD16
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD17
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD18
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD19
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD20
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD21
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD22
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD23
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD24
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD25
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD26
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD27
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD28
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD29
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD30
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD31
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;PAD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;SPIS_CS
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_CH0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_CH1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_CH2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;RTC_UPD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;JTAG
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;MCUWUSEL;WU3_EV;NONE
CPU_MMAP;AON_EVENT;MCUWUSEL;RESERVED22
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD3
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD4
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD5
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD6
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD7
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD8
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD9
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD10
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD11
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD12
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD13
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD14
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD15
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD16
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD17
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD18
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD19
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD20
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD21
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD22
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD23
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD24
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD25
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD26
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD27
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD28
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD29
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD30
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD31
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;PAD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;SPIS_CS
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_CH0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_CH1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_CH2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;RTC_UPD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;JTAG
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;MCUWUSEL;WU2_EV;NONE
CPU_MMAP;AON_EVENT;MCUWUSEL;RESERVED14
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD3
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD4
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD5
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD6
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD7
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD8
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD9
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD10
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD11
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD12
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD13
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD14
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD15
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD16
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD17
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD18
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD19
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD20
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD21
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD22
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD23
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD24
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD25
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD26
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD27
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD28
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD29
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD30
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD31
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;PAD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;SPIS_CS
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_CH0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_CH1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_CH2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;RTC_UPD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;JTAG
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;MCUWUSEL;WU1_EV;NONE
CPU_MMAP;AON_EVENT;MCUWUSEL;RESERVED6
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD3
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD4
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD5
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD6
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD7
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD8
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD9
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD10
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD11
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD12
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD13
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD14
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD15
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD16
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD17
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD18
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD19
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD20
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD21
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD22
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD23
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD24
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD25
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD26
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD27
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD28
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD29
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD30
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD31
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;PAD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;SPIS_CS
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_CH0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_CH1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_CH2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;RTC_UPD
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;JTAG
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;MCUWUSEL;WU0_EV;NONE
CPU_MMAP;AON_EVENT;AUXWUSEL
CPU_MMAP;AON_EVENT;AUXWUSEL;RESERVED22
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD3
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD4
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD5
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD6
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD7
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD8
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD9
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD10
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD11
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD12
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD13
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD14
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD15
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD16
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD17
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD18
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD19
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD20
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD21
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD22
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD23
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD24
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD25
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD26
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD27
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD28
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD29
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD30
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD31
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;PAD
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;SPIS_CS
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_CH0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_CH1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_CH2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;RTC_UPD
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;JTAG
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;AUXWUSEL;WU2_EV;NONE
CPU_MMAP;AON_EVENT;AUXWUSEL;RESERVED14
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD3
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD4
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD5
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD6
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD7
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD8
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD9
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD10
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD11
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD12
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD13
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD14
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD15
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD16
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD17
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD18
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD19
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD20
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD21
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD22
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD23
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD24
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD25
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD26
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD27
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD28
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD29
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD30
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD31
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;PAD
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;SPIS_CS
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_CH0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_CH1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_CH2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;RTC_UPD
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;JTAG
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;AUXWUSEL;WU1_EV;NONE
CPU_MMAP;AON_EVENT;AUXWUSEL;RESERVED6
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD3
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD4
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD5
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD6
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD7
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD8
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD9
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD10
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD11
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD12
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD13
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD14
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD15
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD16
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD17
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD18
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD19
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD20
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD21
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD22
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD23
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD24
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD25
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD26
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD27
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD28
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD29
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD30
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD31
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;PAD
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;SPIS_CS
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_CH0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_CH1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_CH2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;RTC_UPD
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;JTAG
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;AUXWUSEL;WU0_EV;NONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL
CPU_MMAP;AON_EVENT;EVTOMCUSEL;RESERVED22
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD3
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD4
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD5
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD6
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD7
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD8
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD9
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD10
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD11
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD12
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD13
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD14
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD15
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD16
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD17
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD18
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD19
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD20
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD21
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD22
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD23
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD24
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD25
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD26
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD27
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD28
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD29
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD30
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD31
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;PAD
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;SPIS_CS
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_CH0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_CH1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_CH2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;RTC_UPD
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;JTAG
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG2_EV;NONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;RESERVED14
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD3
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD4
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD5
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD6
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD7
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD8
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD9
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD10
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD11
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD12
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD13
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD14
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD15
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD16
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD17
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD18
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD19
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD20
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD21
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD22
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD23
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD24
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD25
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD26
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD27
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD28
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD29
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD30
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD31
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;PAD
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;SPIS_CS
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_CH0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_CH1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_CH2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;RTC_UPD
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;JTAG
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG1_EV;NONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;RESERVED6
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD3
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD4
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD5
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD6
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD7
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD8
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD9
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD10
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD11
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD12
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD13
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD14
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD15
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD16
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD17
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD18
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD19
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD20
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD21
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD22
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD23
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD24
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD25
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD26
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD27
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD28
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD29
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD30
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD31
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;PAD
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;SPIS_CS
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_CH0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_CH1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_CH2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;RTC_UPD
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;JTAG
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;EVTOMCUSEL;AON_PROG0_EV;NONE
CPU_MMAP;AON_EVENT;RTCSEL
CPU_MMAP;AON_EVENT;RTCSEL;RESERVED6
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD0
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD1
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD2
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD3
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD4
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD5
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD6
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD7
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD8
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD9
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD10
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD11
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD12
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD13
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD14
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD15
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD16
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD17
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD18
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD19
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD20
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD21
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD22
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD23
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD24
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD25
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD26
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD27
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD28
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD29
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD30
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD31
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;PAD
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;SPIS_BYTE_DONE
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;SPIS_CS
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_CH0
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_CH1
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_CH2
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_CH0_DLY
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_CH1_DLY
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_CH2_DLY
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_COMB_DLY
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;RTC_UPD
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;JTAG
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_SWEV0
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_SWEV1
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_SWEV2
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_COMPA
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_COMPB
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_ADC_DONE
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_TDC_DONE
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_TIMER0_EV
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_TIMER1_EV
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;BATMON_TEMP
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;BATMON_VOLT
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_COMPB_ASYNC
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;AUX_COMPB_ASYNC_N
CPU_MMAP;AON_EVENT;RTCSEL;RTC_CH1_CAPT_EV;NONE
CPU_MMAP;AON_IOC
CPU_MMAP;AON_IOC;IOSTRMIN
CPU_MMAP;AON_IOC;IOSTRMIN;RESERVED3
CPU_MMAP;AON_IOC;IOSTRMIN;GRAY_CODE
CPU_MMAP;AON_IOC;IOSTRMED
CPU_MMAP;AON_IOC;IOSTRMED;RESERVED3
CPU_MMAP;AON_IOC;IOSTRMED;GRAY_CODE
CPU_MMAP;AON_IOC;IOSTRMAX
CPU_MMAP;AON_IOC;IOSTRMAX;RESERVED3
CPU_MMAP;AON_IOC;IOSTRMAX;GRAY_CODE
CPU_MMAP;AON_IOC;IOCLATCH
CPU_MMAP;AON_IOC;IOCLATCH;RESERVED1
CPU_MMAP;AON_IOC;IOCLATCH;EN
CPU_MMAP;AON_IOC;IOCLATCH;EN;STATIC
CPU_MMAP;AON_IOC;IOCLATCH;EN;TRANSP
CPU_MMAP;AON_IOC;CLK32KCTL
CPU_MMAP;AON_IOC;CLK32KCTL;RESERVED1
CPU_MMAP;AON_IOC;CLK32KCTL;OE_N
CPU_MMAP;AON_BATMON
CPU_MMAP;AON_BATMON;CTL
CPU_MMAP;AON_BATMON;CTL;RESERVED2
CPU_MMAP;AON_BATMON;CTL;CALC_EN
CPU_MMAP;AON_BATMON;CTL;MEAS_EN
CPU_MMAP;AON_BATMON;MEASCFG
CPU_MMAP;AON_BATMON;MEASCFG;RESERVED2
CPU_MMAP;AON_BATMON;MEASCFG;PER
CPU_MMAP;AON_BATMON;MEASCFG;PER;CONT
CPU_MMAP;AON_BATMON;MEASCFG;PER;8CYC
CPU_MMAP;AON_BATMON;MEASCFG;PER;16CYC
CPU_MMAP;AON_BATMON;MEASCFG;PER;32CYC
CPU_MMAP;AON_BATMON;TEMPP0
CPU_MMAP;AON_BATMON;TEMPP0;RESERVED8
CPU_MMAP;AON_BATMON;TEMPP0;CFG
CPU_MMAP;AON_BATMON;TEMPP1
CPU_MMAP;AON_BATMON;TEMPP1;RESERVED6
CPU_MMAP;AON_BATMON;TEMPP1;CFG
CPU_MMAP;AON_BATMON;TEMPP2
CPU_MMAP;AON_BATMON;TEMPP2;RESERVED5
CPU_MMAP;AON_BATMON;TEMPP2;CFG
CPU_MMAP;AON_BATMON;BATMONP0
CPU_MMAP;AON_BATMON;BATMONP0;RESERVED6
CPU_MMAP;AON_BATMON;BATMONP0;CFG
CPU_MMAP;AON_BATMON;BATMONP1
CPU_MMAP;AON_BATMON;BATMONP1;RESERVED6
CPU_MMAP;AON_BATMON;BATMONP1;CFG
CPU_MMAP;AON_BATMON;IOSTRP0
CPU_MMAP;AON_BATMON;IOSTRP0;RESERVED6
CPU_MMAP;AON_BATMON;IOSTRP0;CFG2
CPU_MMAP;AON_BATMON;IOSTRP0;CFG1
CPU_MMAP;AON_BATMON;FLASHPUMPP0
CPU_MMAP;AON_BATMON;FLASHPUMPP0;RESERVED9
CPU_MMAP;AON_BATMON;FLASHPUMPP0;FALLB
CPU_MMAP;AON_BATMON;FLASHPUMPP0;HIGHLIM
CPU_MMAP;AON_BATMON;FLASHPUMPP0;LOWLIM
CPU_MMAP;AON_BATMON;FLASHPUMPP0;OVR
CPU_MMAP;AON_BATMON;FLASHPUMPP0;CFG
CPU_MMAP;AON_BATMON;BAT
CPU_MMAP;AON_BATMON;BAT;RESERVED11
CPU_MMAP;AON_BATMON;BAT;INT
CPU_MMAP;AON_BATMON;BAT;FRAC
CPU_MMAP;AON_BATMON;BATUPD
CPU_MMAP;AON_BATMON;BATUPD;RESERVED1
CPU_MMAP;AON_BATMON;BATUPD;STAT
CPU_MMAP;AON_BATMON;TEMP
CPU_MMAP;AON_BATMON;TEMP;RESERVED17
CPU_MMAP;AON_BATMON;TEMP;INT
CPU_MMAP;AON_BATMON;TEMP;FRAC
CPU_MMAP;AON_BATMON;TEMP;RESERVED0
CPU_MMAP;AON_BATMON;TEMPUPD
CPU_MMAP;AON_BATMON;TEMPUPD;RESERVED1
CPU_MMAP;AON_BATMON;TEMPUPD;STAT
CPU_MMAP;AUX_AIODIO0
CPU_MMAP;AUX_AIODIO0;GPIODOUT
CPU_MMAP;AUX_AIODIO0;GPIODOUT;RESERVED8
CPU_MMAP;AUX_AIODIO0;GPIODOUT;IO7_0
CPU_MMAP;AUX_AIODIO0;IOMODE
CPU_MMAP;AUX_AIODIO0;IOMODE;RESERVED16
CPU_MMAP;AUX_AIODIO0;IOMODE;IO7
CPU_MMAP;AUX_AIODIO0;IOMODE;IO7;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO7;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO7;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO7;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;IOMODE;IO6
CPU_MMAP;AUX_AIODIO0;IOMODE;IO6;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO6;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO6;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO6;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;IOMODE;IO5
CPU_MMAP;AUX_AIODIO0;IOMODE;IO5;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO5;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO5;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO5;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;IOMODE;IO4
CPU_MMAP;AUX_AIODIO0;IOMODE;IO4;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO4;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO4;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO4;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;IOMODE;IO3
CPU_MMAP;AUX_AIODIO0;IOMODE;IO3;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO3;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO3;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO3;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;IOMODE;IO2
CPU_MMAP;AUX_AIODIO0;IOMODE;IO2;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO2;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO2;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO2;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;IOMODE;IO1
CPU_MMAP;AUX_AIODIO0;IOMODE;IO1;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO1;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO1;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO1;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;IOMODE;IO0
CPU_MMAP;AUX_AIODIO0;IOMODE;IO0;OUT
CPU_MMAP;AUX_AIODIO0;IOMODE;IO0;IN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO0;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO0;IOMODE;IO0;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO0;GPIODIN
CPU_MMAP;AUX_AIODIO0;GPIODIN;RESERVED8
CPU_MMAP;AUX_AIODIO0;GPIODIN;IO7_0
CPU_MMAP;AUX_AIODIO0;GPIODOUTSET
CPU_MMAP;AUX_AIODIO0;GPIODOUTSET;RESERVED8
CPU_MMAP;AUX_AIODIO0;GPIODOUTSET;IO7_0
CPU_MMAP;AUX_AIODIO0;GPIODOUTCLR
CPU_MMAP;AUX_AIODIO0;GPIODOUTCLR;RESERVED8
CPU_MMAP;AUX_AIODIO0;GPIODOUTCLR;IO7_0
CPU_MMAP;AUX_AIODIO0;GPIODOUTTGL
CPU_MMAP;AUX_AIODIO0;GPIODOUTTGL;RESERVED8
CPU_MMAP;AUX_AIODIO0;GPIODOUTTGL;IO7_0
CPU_MMAP;AUX_AIODIO0;GPIODIE
CPU_MMAP;AUX_AIODIO0;GPIODIE;RESERVED8
CPU_MMAP;AUX_AIODIO0;GPIODIE;IO7_0
CPU_MMAP;AUX_AIODIO1
CPU_MMAP;AUX_AIODIO1;GPIODOUT
CPU_MMAP;AUX_AIODIO1;GPIODOUT;RESERVED8
CPU_MMAP;AUX_AIODIO1;GPIODOUT;IO7_0
CPU_MMAP;AUX_AIODIO1;IOMODE
CPU_MMAP;AUX_AIODIO1;IOMODE;RESERVED16
CPU_MMAP;AUX_AIODIO1;IOMODE;IO7
CPU_MMAP;AUX_AIODIO1;IOMODE;IO7;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO7;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO7;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO7;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;IOMODE;IO6
CPU_MMAP;AUX_AIODIO1;IOMODE;IO6;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO6;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO6;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO6;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;IOMODE;IO5
CPU_MMAP;AUX_AIODIO1;IOMODE;IO5;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO5;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO5;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO5;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;IOMODE;IO4
CPU_MMAP;AUX_AIODIO1;IOMODE;IO4;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO4;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO4;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO4;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;IOMODE;IO3
CPU_MMAP;AUX_AIODIO1;IOMODE;IO3;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO3;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO3;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO3;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;IOMODE;IO2
CPU_MMAP;AUX_AIODIO1;IOMODE;IO2;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO2;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO2;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO2;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;IOMODE;IO1
CPU_MMAP;AUX_AIODIO1;IOMODE;IO1;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO1;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO1;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO1;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;IOMODE;IO0
CPU_MMAP;AUX_AIODIO1;IOMODE;IO0;OUT
CPU_MMAP;AUX_AIODIO1;IOMODE;IO0;IN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO0;OPEN_DRAIN
CPU_MMAP;AUX_AIODIO1;IOMODE;IO0;OPEN_SOURCE
CPU_MMAP;AUX_AIODIO1;GPIODIN
CPU_MMAP;AUX_AIODIO1;GPIODIN;RESERVED8
CPU_MMAP;AUX_AIODIO1;GPIODIN;IO7_0
CPU_MMAP;AUX_AIODIO1;GPIODOUTSET
CPU_MMAP;AUX_AIODIO1;GPIODOUTSET;RESERVED8
CPU_MMAP;AUX_AIODIO1;GPIODOUTSET;IO7_0
CPU_MMAP;AUX_AIODIO1;GPIODOUTCLR
CPU_MMAP;AUX_AIODIO1;GPIODOUTCLR;RESERVED8
CPU_MMAP;AUX_AIODIO1;GPIODOUTCLR;IO7_0
CPU_MMAP;AUX_AIODIO1;GPIODOUTTGL
CPU_MMAP;AUX_AIODIO1;GPIODOUTTGL;RESERVED8
CPU_MMAP;AUX_AIODIO1;GPIODOUTTGL;IO7_0
CPU_MMAP;AUX_AIODIO1;GPIODIE
CPU_MMAP;AUX_AIODIO1;GPIODIE;RESERVED8
CPU_MMAP;AUX_AIODIO1;GPIODIE;IO7_0
CPU_MMAP;AUX_TDCIF
CPU_MMAP;AUX_TDCIF;CTL
CPU_MMAP;AUX_TDCIF;CTL;RESERVED2
CPU_MMAP;AUX_TDCIF;CTL;CMD
CPU_MMAP;AUX_TDCIF;CTL;CMD;CLR_RESULT
CPU_MMAP;AUX_TDCIF;CTL;CMD;RUN_SYNC_START
CPU_MMAP;AUX_TDCIF;CTL;CMD;RUN
CPU_MMAP;AUX_TDCIF;CTL;CMD;ABORT
CPU_MMAP;AUX_TDCIF;STAT
CPU_MMAP;AUX_TDCIF;STAT;RESERVED10
CPU_MMAP;AUX_TDCIF;STAT;START_BF
CPU_MMAP;AUX_TDCIF;STAT;STOP_AF
CPU_MMAP;AUX_TDCIF;STAT;SAT
CPU_MMAP;AUX_TDCIF;STAT;DONE
CPU_MMAP;AUX_TDCIF;STAT;STATE
CPU_MMAP;AUX_TDCIF;STAT;STATE;WAIT_START
CPU_MMAP;AUX_TDCIF;STAT;STATE;WAIT_START_STOP_CNT_EN
CPU_MMAP;AUX_TDCIF;STAT;STATE;IDLE
CPU_MMAP;AUX_TDCIF;STAT;STATE;CLR_CNT
CPU_MMAP;AUX_TDCIF;STAT;STATE;WAIT_STOP
CPU_MMAP;AUX_TDCIF;STAT;STATE;WAIT_STOP_CNTDWN
CPU_MMAP;AUX_TDCIF;STAT;STATE;GET_RESULT
CPU_MMAP;AUX_TDCIF;STAT;STATE;POR
CPU_MMAP;AUX_TDCIF;STAT;STATE;WAIT_CLR_CNT_DONE
CPU_MMAP;AUX_TDCIF;STAT;STATE;START_FALL
CPU_MMAP;AUX_TDCIF;STAT;STATE;FORCE_STOP
CPU_MMAP;AUX_TDCIF;RESULT
CPU_MMAP;AUX_TDCIF;RESULT;RESERVED25
CPU_MMAP;AUX_TDCIF;RESULT;VALUE
CPU_MMAP;AUX_TDCIF;SATCFG
CPU_MMAP;AUX_TDCIF;SATCFG;RESERVED4
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R13
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R14
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R15
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R16
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R17
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R18
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R19
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R20
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R21
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R22
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;R23
CPU_MMAP;AUX_TDCIF;SATCFG;LIMIT;ROVF
CPU_MMAP;AUX_TDCIF;TRIGSRC
CPU_MMAP;AUX_TDCIF;TRIGSRC;RESERVED14
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_POL
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_POL;HIGH
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_POL;LOW
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AON_RTC_CH2
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUX_COMPA
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUX_COMPB
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;ISRC_RESET
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;TIMER0_EV
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;TIMER1_EV
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;ADC_DONE
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;OBSMUX0
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;OBSMUX1
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AON_SW
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AON_PROG_WU
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO0
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO1
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO2
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO3
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO4
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO5
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO6
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO7
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO8
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO9
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO10
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO11
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO12
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO13
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO14
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;AUXIO15
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;ACLK_REF
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;MCU_EV
CPU_MMAP;AUX_TDCIF;TRIGSRC;STOP_SRC;TDC_PRE
CPU_MMAP;AUX_TDCIF;TRIGSRC;RESERVED6
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_POL
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_POL;HIGH
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_POL;LOW
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AON_RTC_CH2
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUX_COMPA
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUX_COMPB
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;ISRC_RESET
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;TIMER0_EV
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;TIMER1_EV
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;ADC_DONE
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;OBSMUX0
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;OBSMUX1
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AON_SW
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AON_PROG_WU
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO0
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO1
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO2
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO3
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO4
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO5
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO6
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO7
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO8
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO9
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO10
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO11
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO12
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO13
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO14
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;AUXIO15
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;ACLK_REF
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;MCU_EV
CPU_MMAP;AUX_TDCIF;TRIGSRC;START_SRC;TDC_PRE
CPU_MMAP;AUX_TDCIF;TRIGCNT
CPU_MMAP;AUX_TDCIF;TRIGCNT;RESERVED16
CPU_MMAP;AUX_TDCIF;TRIGCNT;CNT
CPU_MMAP;AUX_TDCIF;TRIGCNTLOAD
CPU_MMAP;AUX_TDCIF;TRIGCNTLOAD;RESERVED16
CPU_MMAP;AUX_TDCIF;TRIGCNTLOAD;CNT
CPU_MMAP;AUX_TDCIF;TRIGCNTCFG
CPU_MMAP;AUX_TDCIF;TRIGCNTCFG;RESERVED1
CPU_MMAP;AUX_TDCIF;TRIGCNTCFG;EN
CPU_MMAP;AUX_TDCIF;PRECTL
CPU_MMAP;AUX_TDCIF;PRECTL;RESERVED8
CPU_MMAP;AUX_TDCIF;PRECTL;RESET_N
CPU_MMAP;AUX_TDCIF;PRECTL;RATIO
CPU_MMAP;AUX_TDCIF;PRECTL;RATIO;DIV16
CPU_MMAP;AUX_TDCIF;PRECTL;RATIO;DIV64
CPU_MMAP;AUX_TDCIF;PRECTL;RESERVED5
CPU_MMAP;AUX_TDCIF;PRECTL;SRC
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AON_RTC_CH2
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUX_COMPA
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUX_COMPB
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;ISRC_RESET
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;TIMER0_EV
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;TIMER1_EV
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;ADC_DONE
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;OBSMUX0
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;OBSMUX1
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AON_SW
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AON_PROG_WU
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO0
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO1
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO2
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO3
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO4
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO5
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO6
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO7
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO8
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO9
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO10
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO11
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO12
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO13
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO14
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;AUXIO15
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;ACLK_REF
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;MCU_EV
CPU_MMAP;AUX_TDCIF;PRECTL;SRC;ADC_IRQ
CPU_MMAP;AUX_TDCIF;PRECNT
CPU_MMAP;AUX_TDCIF;PRECNT;RESERVED16
CPU_MMAP;AUX_TDCIF;PRECNT;CNT
CPU_MMAP;AUX_EVCTL
CPU_MMAP;AUX_EVCTL;VECCFG0
CPU_MMAP;AUX_EVCTL;VECCFG0;RESERVED15
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_POL
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_POL;RISE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_POL;FALL
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EN
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EN;DIS
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EN;EN
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AON_RTC_CH2
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUX_COMPA
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUX_COMPB
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;TDC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;TIMER0_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;TIMER1_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;ADC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;OBSMUX0
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;OBSMUX1
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AON_SW
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AON_PROG_WU
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO0
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO1
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO2
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO3
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO4
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO5
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO6
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO7
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO8
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO9
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO10
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO11
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO12
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO13
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO14
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;AUXIO15
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;ACLK_REF
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;MCU_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC1_EV;ADC_IRQ
CPU_MMAP;AUX_EVCTL;VECCFG0;RESERVED7
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_POL
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_POL;RISE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_POL;FALL
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EN
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EN;DIS
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EN;EN
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AON_RTC_CH2
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUX_COMPA
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUX_COMPB
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;TDC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;TIMER0_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;TIMER1_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;ADC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;OBSMUX0
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;OBSMUX1
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AON_SW
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AON_PROG_WU
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO0
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO1
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO2
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO3
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO4
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO5
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO6
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO7
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO8
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO9
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO10
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO11
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO12
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO13
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO14
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;AUXIO15
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;ACLK_REF
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;MCU_EV
CPU_MMAP;AUX_EVCTL;VECCFG0;VEC0_EV;ADC_IRQ
CPU_MMAP;AUX_EVCTL;VECCFG1
CPU_MMAP;AUX_EVCTL;VECCFG1;RESERVED15
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_POL
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_POL;RISE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_POL;FALL
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EN
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EN;DIS
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EN;EN
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AON_RTC_CH2
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUX_COMPA
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUX_COMPB
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;TDC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;TIMER0_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;TIMER1_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;ADC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;OBSMUX0
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;OBSMUX1
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AON_SW
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AON_PROG_WU
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO0
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO1
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO2
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO3
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO4
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO5
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO6
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO7
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO8
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO9
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO10
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO11
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO12
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO13
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO14
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;AUXIO15
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;ACLK_REF
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;MCU_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC3_EV;ADC_IRQ
CPU_MMAP;AUX_EVCTL;VECCFG1;RESERVED7
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_POL
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_POL;RISE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_POL;FALL
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EN
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EN;DIS
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EN;EN
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AON_RTC_CH2
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUX_COMPA
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUX_COMPB
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;TDC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;TIMER0_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;TIMER1_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;ADC_DONE
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;OBSMUX0
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;OBSMUX1
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AON_SW
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AON_PROG_WU
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO0
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO1
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO2
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO3
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO4
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO5
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO6
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO7
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO8
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO9
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO10
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO11
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO12
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO13
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO14
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;AUXIO15
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;ACLK_REF
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;MCU_EV
CPU_MMAP;AUX_EVCTL;VECCFG1;VEC2_EV;ADC_IRQ
CPU_MMAP;AUX_EVCTL;SCEWEVSEL
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;RESERVED5
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AON_RTC_CH2
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUX_COMPA
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUX_COMPB
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;TDC_DONE
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;TIMER0_EV
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;TIMER1_EV
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;ADC_DONE
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;OBSMUX0
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;OBSMUX1
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AON_SW
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AON_PROG_WU
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO0
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO1
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO2
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO3
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO4
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO5
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO6
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO7
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO8
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO9
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO10
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO11
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO12
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO13
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO14
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;AUXIO15
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;ACLK_REF
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;MCU_EV
CPU_MMAP;AUX_EVCTL;SCEWEVSEL;WEV7_EV;ADC_IRQ
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;RESERVED9
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;TIMER1_EV
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;TIMER0_EV
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;TDC_DONE
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;ADC_DONE
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;AUX_COMPB
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;AUX_COMPA
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;SWEV2
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;SWEV1
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGS;SWEV0
CPU_MMAP;AUX_EVCTL;EVTOAONPOL
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;RESERVED9
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TIMER1_EV
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TIMER1_EV;HIGH
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TIMER1_EV;LOW
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TIMER0_EV
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TIMER0_EV;HIGH
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TIMER0_EV;LOW
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TDC_DONE
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TDC_DONE;HIGH
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;TDC_DONE;LOW
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;ADC_DONE
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;ADC_DONE;HIGH
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;ADC_DONE;LOW
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;AUX_COMPB
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;AUX_COMPB;HIGH
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;AUX_COMPB;LOW
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;AUX_COMPA
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;AUX_COMPA;HIGH
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;AUX_COMPA;LOW
CPU_MMAP;AUX_EVCTL;EVTOAONPOL;RESERVED2
CPU_MMAP;AUX_EVCTL;DMACTL
CPU_MMAP;AUX_EVCTL;DMACTL;RESERVED3
CPU_MMAP;AUX_EVCTL;DMACTL;REQ_MODE
CPU_MMAP;AUX_EVCTL;DMACTL;REQ_MODE;BURST
CPU_MMAP;AUX_EVCTL;DMACTL;REQ_MODE;SINGLE
CPU_MMAP;AUX_EVCTL;DMACTL;EN
CPU_MMAP;AUX_EVCTL;DMACTL;SEL
CPU_MMAP;AUX_EVCTL;DMACTL;SEL;FIFO_NOT_EMPTY
CPU_MMAP;AUX_EVCTL;DMACTL;SEL;FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;SWEVSET
CPU_MMAP;AUX_EVCTL;SWEVSET;RESERVED3
CPU_MMAP;AUX_EVCTL;SWEVSET;SWEV2
CPU_MMAP;AUX_EVCTL;SWEVSET;SWEV1
CPU_MMAP;AUX_EVCTL;SWEVSET;SWEV0
CPU_MMAP;AUX_EVCTL;EVSTAT0
CPU_MMAP;AUX_EVCTL;EVSTAT0;RESERVED
CPU_MMAP;AUX_EVCTL;EVSTAT0;AUXIO2
CPU_MMAP;AUX_EVCTL;EVSTAT0;AUXIO1
CPU_MMAP;AUX_EVCTL;EVSTAT0;AUXIO0
CPU_MMAP;AUX_EVCTL;EVSTAT0;AON_PROG_WU
CPU_MMAP;AUX_EVCTL;EVSTAT0;AON_SW
CPU_MMAP;AUX_EVCTL;EVSTAT0;OBSMUX1
CPU_MMAP;AUX_EVCTL;EVSTAT0;OBSMUX0
CPU_MMAP;AUX_EVCTL;EVSTAT0;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;EVSTAT0;ADC_DONE
CPU_MMAP;AUX_EVCTL;EVSTAT0;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;EVSTAT0;TIMER1_EV
CPU_MMAP;AUX_EVCTL;EVSTAT0;TIMER0_EV
CPU_MMAP;AUX_EVCTL;EVSTAT0;TDC_DONE
CPU_MMAP;AUX_EVCTL;EVSTAT0;AUX_COMPB
CPU_MMAP;AUX_EVCTL;EVSTAT0;AUX_COMPA
CPU_MMAP;AUX_EVCTL;EVSTAT0;AON_RTC_CH2
CPU_MMAP;AUX_EVCTL;EVSTAT1
CPU_MMAP;AUX_EVCTL;EVSTAT1;RESERVED16
CPU_MMAP;AUX_EVCTL;EVSTAT1;ADC_IRQ
CPU_MMAP;AUX_EVCTL;EVSTAT1;MCU_EV
CPU_MMAP;AUX_EVCTL;EVSTAT1;ACLK_REF
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO15
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO14
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO13
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO12
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO11
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO10
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO9
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO8
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO7
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO6
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO5
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO4
CPU_MMAP;AUX_EVCTL;EVSTAT1;AUXIO3
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;RESERVED11
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_IRQ
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_IRQ;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_IRQ;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;OBSMUX0
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;OBSMUX0;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;OBSMUX0;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_FIFO_ALMOST_FULL;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_FIFO_ALMOST_FULL;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_DONE;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;ADC_DONE;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;SMPH_AUTOTAKE_DONE;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;SMPH_AUTOTAKE_DONE;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TIMER1_EV
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TIMER1_EV;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TIMER1_EV;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TIMER0_EV
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TIMER0_EV;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TIMER0_EV;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TDC_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TDC_DONE;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;TDC_DONE;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AUX_COMPB
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AUX_COMPB;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AUX_COMPB;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AUX_COMPA
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AUX_COMPA;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AUX_COMPA;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AON_WU_EV
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AON_WU_EV;HIGH
CPU_MMAP;AUX_EVCTL;EVTOMCUPOL;AON_WU_EV;LOW
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;RESERVED11
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;ADC_IRQ
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;OBSMUX0
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;ADC_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;TIMER1_EV
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;TIMER0_EV
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;TDC_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;AUX_COMPB
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;AUX_COMPA
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGS;AON_WU_EV
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;RESERVED11
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;ADC_IRQ
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;OBSMUX0
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;ADC_DONE
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;TIMER1_EV
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;TIMER0_EV
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;TDC_DONE
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;AUX_COMPB
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;AUX_COMPA
CPU_MMAP;AUX_EVCTL;COMBEVTOMCUMASK;AON_WU_EV
CPU_MMAP;AUX_EVCTL;VECFLAGS
CPU_MMAP;AUX_EVCTL;VECFLAGS;RESERVED4
CPU_MMAP;AUX_EVCTL;VECFLAGS;VEC3
CPU_MMAP;AUX_EVCTL;VECFLAGS;VEC2
CPU_MMAP;AUX_EVCTL;VECFLAGS;VEC1
CPU_MMAP;AUX_EVCTL;VECFLAGS;VEC0
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;RESERVED11
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;ADC_IRQ
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;OBSMUX0
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;ADC_FIFO_ALMOST_FULL
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;ADC_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;TIMER1_EV
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;TIMER0_EV
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;TDC_DONE
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;AUX_COMPB
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;AUX_COMPA
CPU_MMAP;AUX_EVCTL;EVTOMCUFLAGSCLR;AON_WU_EV
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;RESERVED9
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;TIMER1_EV
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;TIMER0_EV
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;TDC_DONE
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;ADC_DONE
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;AUX_COMPB
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;AUX_COMPA
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;SWEV2
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;SWEV1
CPU_MMAP;AUX_EVCTL;EVTOAONFLAGSCLR;SWEV0
CPU_MMAP;AUX_EVCTL;VECFLAGSCLR
CPU_MMAP;AUX_EVCTL;VECFLAGSCLR;RESERVED4
CPU_MMAP;AUX_EVCTL;VECFLAGSCLR;VEC3
CPU_MMAP;AUX_EVCTL;VECFLAGSCLR;VEC2
CPU_MMAP;AUX_EVCTL;VECFLAGSCLR;VEC1
CPU_MMAP;AUX_EVCTL;VECFLAGSCLR;VEC0
CPU_MMAP;AUX_WUC
CPU_MMAP;AUX_WUC;MODCLKEN0
CPU_MMAP;AUX_WUC;MODCLKEN0;RESERVED
CPU_MMAP;AUX_WUC;MODCLKEN0;AUX_ADI4
CPU_MMAP;AUX_WUC;MODCLKEN0;AUX_ADI4;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;AUX_ADI4;EN
CPU_MMAP;AUX_WUC;MODCLKEN0;AUX_DDI0_OSC
CPU_MMAP;AUX_WUC;MODCLKEN0;AUX_DDI0_OSC;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;AUX_DDI0_OSC;EN
CPU_MMAP;AUX_WUC;MODCLKEN0;TDC
CPU_MMAP;AUX_WUC;MODCLKEN0;TDC;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;TDC;EN
CPU_MMAP;AUX_WUC;MODCLKEN0;SOC
CPU_MMAP;AUX_WUC;MODCLKEN0;SOC;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;SOC;EN
CPU_MMAP;AUX_WUC;MODCLKEN0;TIMER
CPU_MMAP;AUX_WUC;MODCLKEN0;TIMER;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;TIMER;EN
CPU_MMAP;AUX_WUC;MODCLKEN0;AIODIO1
CPU_MMAP;AUX_WUC;MODCLKEN0;AIODIO1;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;AIODIO1;EN
CPU_MMAP;AUX_WUC;MODCLKEN0;AIODIO0
CPU_MMAP;AUX_WUC;MODCLKEN0;AIODIO0;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;AIODIO0;EN
CPU_MMAP;AUX_WUC;MODCLKEN0;SMPH
CPU_MMAP;AUX_WUC;MODCLKEN0;SMPH;DIS
CPU_MMAP;AUX_WUC;MODCLKEN0;SMPH;EN
CPU_MMAP;AUX_WUC;PWROFFREQ
CPU_MMAP;AUX_WUC;PWROFFREQ;RESERVED
CPU_MMAP;AUX_WUC;PWROFFREQ;REQ
CPU_MMAP;AUX_WUC;PWRDWNREQ
CPU_MMAP;AUX_WUC;PWRDWNREQ;RESERVED
CPU_MMAP;AUX_WUC;PWRDWNREQ;REQ
CPU_MMAP;AUX_WUC;PWRDWNACK
CPU_MMAP;AUX_WUC;PWRDWNACK;RESERVED
CPU_MMAP;AUX_WUC;PWRDWNACK;ACK
CPU_MMAP;AUX_WUC;CLKLFREQ
CPU_MMAP;AUX_WUC;CLKLFREQ;RESERVED
CPU_MMAP;AUX_WUC;CLKLFREQ;REQ
CPU_MMAP;AUX_WUC;CLKLFACK
CPU_MMAP;AUX_WUC;CLKLFACK;RESERVED
CPU_MMAP;AUX_WUC;CLKLFACK;ACK
CPU_MMAP;AUX_WUC;BGAPREQ
CPU_MMAP;AUX_WUC;BGAPREQ;RESERVED
CPU_MMAP;AUX_WUC;BGAPREQ;REQ
CPU_MMAP;AUX_WUC;BGAPACK
CPU_MMAP;AUX_WUC;BGAPACK;RESERVED
CPU_MMAP;AUX_WUC;BGAPACK;ACK
CPU_MMAP;AUX_WUC;WUEVFLAGS
CPU_MMAP;AUX_WUC;WUEVFLAGS;RESERVED
CPU_MMAP;AUX_WUC;WUEVFLAGS;AON_RTC_CH2
CPU_MMAP;AUX_WUC;WUEVFLAGS;AON_SW
CPU_MMAP;AUX_WUC;WUEVFLAGS;AON_PROG_WU
CPU_MMAP;AUX_WUC;WUEVCLR
CPU_MMAP;AUX_WUC;WUEVCLR;RESERVED
CPU_MMAP;AUX_WUC;WUEVCLR;AON_RTC_CH2
CPU_MMAP;AUX_WUC;WUEVCLR;AON_SW
CPU_MMAP;AUX_WUC;WUEVCLR;AON_PROG_WU
CPU_MMAP;AUX_WUC;ADCCLKCTL
CPU_MMAP;AUX_WUC;ADCCLKCTL;RESERVED
CPU_MMAP;AUX_WUC;ADCCLKCTL;ACK
CPU_MMAP;AUX_WUC;ADCCLKCTL;REQ
CPU_MMAP;AUX_WUC;TDCCLKCTL
CPU_MMAP;AUX_WUC;TDCCLKCTL;RESERVED
CPU_MMAP;AUX_WUC;TDCCLKCTL;ACK
CPU_MMAP;AUX_WUC;TDCCLKCTL;REQ
CPU_MMAP;AUX_WUC;REFCLKCTL
CPU_MMAP;AUX_WUC;REFCLKCTL;RESERVED
CPU_MMAP;AUX_WUC;REFCLKCTL;ACK
CPU_MMAP;AUX_WUC;REFCLKCTL;REQ
CPU_MMAP;AUX_WUC;RTCSUBSECINC0
CPU_MMAP;AUX_WUC;RTCSUBSECINC0;RESERVED
CPU_MMAP;AUX_WUC;RTCSUBSECINC0;INC15_0
CPU_MMAP;AUX_WUC;RTCSUBSECINC1
CPU_MMAP;AUX_WUC;RTCSUBSECINC1;RESERVED
CPU_MMAP;AUX_WUC;RTCSUBSECINC1;INC23_16
CPU_MMAP;AUX_WUC;RTCSUBSECINCCTL
CPU_MMAP;AUX_WUC;RTCSUBSECINCCTL;RESERVED
CPU_MMAP;AUX_WUC;RTCSUBSECINCCTL;UPD_ACK
CPU_MMAP;AUX_WUC;RTCSUBSECINCCTL;UPD_REQ
CPU_MMAP;AUX_WUC;MCUBUSCTL
CPU_MMAP;AUX_WUC;MCUBUSCTL;RESERVED
CPU_MMAP;AUX_WUC;MCUBUSCTL;DISCONNECT_REQ
CPU_MMAP;AUX_WUC;MCUBUSSTAT
CPU_MMAP;AUX_WUC;MCUBUSSTAT;RESERVED
CPU_MMAP;AUX_WUC;MCUBUSSTAT;DISCONNECTED
CPU_MMAP;AUX_WUC;MCUBUSSTAT;DISCONNECT_ACK
CPU_MMAP;AUX_WUC;AONCTLSTAT
CPU_MMAP;AUX_WUC;AONCTLSTAT;RESERVED
CPU_MMAP;AUX_WUC;AONCTLSTAT;AUX_FORCE_ON
CPU_MMAP;AUX_WUC;AONCTLSTAT;SCE_RUN_EN
CPU_MMAP;AUX_WUC;AUXIOLATCH
CPU_MMAP;AUX_WUC;AUXIOLATCH;RESERVED
CPU_MMAP;AUX_WUC;AUXIOLATCH;EN
CPU_MMAP;AUX_WUC;AUXIOLATCH;EN;STATIC
CPU_MMAP;AUX_WUC;AUXIOLATCH;EN;TRANSP
CPU_MMAP;AUX_WUC;MODCLKEN1
CPU_MMAP;AUX_WUC;MODCLKEN1;RESERVED
CPU_MMAP;AUX_WUC;MODCLKEN1;AUX_ADI4
CPU_MMAP;AUX_WUC;MODCLKEN1;AUX_ADI4;DIS
CPU_MMAP;AUX_WUC;MODCLKEN1;AUX_ADI4;EN
CPU_MMAP;AUX_WUC;MODCLKEN1;AUX_DDI0_OSC
CPU_MMAP;AUX_WUC;MODCLKEN1;AUX_DDI0_OSC;DIS
CPU_MMAP;AUX_WUC;MODCLKEN1;AUX_DDI0_OSC;EN
CPU_MMAP;AUX_WUC;MODCLKEN1;TDC
CPU_MMAP;AUX_WUC;MODCLKEN1;SOC
CPU_MMAP;AUX_WUC;MODCLKEN1;SOC;DIS
CPU_MMAP;AUX_WUC;MODCLKEN1;SOC;EN
CPU_MMAP;AUX_WUC;MODCLKEN1;TIMER
CPU_MMAP;AUX_WUC;MODCLKEN1;TIMER;DIS
CPU_MMAP;AUX_WUC;MODCLKEN1;TIMER;EN
CPU_MMAP;AUX_WUC;MODCLKEN1;AIODIO1
CPU_MMAP;AUX_WUC;MODCLKEN1;AIODIO1;DIS
CPU_MMAP;AUX_WUC;MODCLKEN1;AIODIO1;EN
CPU_MMAP;AUX_WUC;MODCLKEN1;AIODIO0
CPU_MMAP;AUX_WUC;MODCLKEN1;AIODIO0;DIS
CPU_MMAP;AUX_WUC;MODCLKEN1;AIODIO0;EN
CPU_MMAP;AUX_WUC;MODCLKEN1;SMPH
CPU_MMAP;AUX_WUC;MODCLKEN1;SMPH;DIS
CPU_MMAP;AUX_WUC;MODCLKEN1;SMPH;EN
CPU_MMAP;AUX_TIMER
CPU_MMAP;AUX_TIMER;T0CFG
CPU_MMAP;AUX_TIMER;T0CFG;RESERVED14
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC_POL
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC_POL;RISE
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC_POL;FALL
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;RTC_CH2_EV
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUX_COMPA
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUX_COMPB
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;TDC_DONE
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;TIMER1_EV
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;ADC_DONE
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;RTC_4KHZ
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;OBSMUX0
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;OBSMUX1
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AON_SW
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AON_PROG_WU
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO0
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO1
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO2
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO3
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO4
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO5
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO6
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO7
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO8
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO9
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO10
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO11
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO12
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO13
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO14
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;AUXIO15
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;ACLK_REF
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;MCU_EVENT
CPU_MMAP;AUX_TIMER;T0CFG;TICK_SRC;ADC_IRQ
CPU_MMAP;AUX_TIMER;T0CFG;PRE
CPU_MMAP;AUX_TIMER;T0CFG;RESERVED2
CPU_MMAP;AUX_TIMER;T0CFG;MODE
CPU_MMAP;AUX_TIMER;T0CFG;MODE;CLK
CPU_MMAP;AUX_TIMER;T0CFG;MODE;TICK
CPU_MMAP;AUX_TIMER;T0CFG;RELOAD
CPU_MMAP;AUX_TIMER;T0CFG;RELOAD;MAN
CPU_MMAP;AUX_TIMER;T0CFG;RELOAD;CONT
CPU_MMAP;AUX_TIMER;T1CFG
CPU_MMAP;AUX_TIMER;T1CFG;RESERVED14
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC_POL
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC_POL;RISE
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC_POL;FALL
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;RTC_CH2_EV
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUX_COMPA
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUX_COMPB
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;TDC_DONE
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;TIMER0_EV
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;ADC_DONE
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;RTC_4KHZ
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;OBSMUX0
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;OBSMUX1
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AON_SW
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AON_PROG_WU
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO0
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO1
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO2
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO3
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO4
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO5
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO6
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO7
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO8
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO9
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO10
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO11
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO12
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO13
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO14
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;AUXIO15
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;ACLK_REF
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;MCU_EVENT
CPU_MMAP;AUX_TIMER;T1CFG;TICK_SRC;ADC_IRQ
CPU_MMAP;AUX_TIMER;T1CFG;PRE
CPU_MMAP;AUX_TIMER;T1CFG;RESERVED2
CPU_MMAP;AUX_TIMER;T1CFG;MODE
CPU_MMAP;AUX_TIMER;T1CFG;MODE;CLK
CPU_MMAP;AUX_TIMER;T1CFG;MODE;TICK
CPU_MMAP;AUX_TIMER;T1CFG;RELOAD
CPU_MMAP;AUX_TIMER;T1CFG;RELOAD;MAN
CPU_MMAP;AUX_TIMER;T1CFG;RELOAD;CONT
CPU_MMAP;AUX_TIMER;T0CTL
CPU_MMAP;AUX_TIMER;T0CTL;RESERVED1
CPU_MMAP;AUX_TIMER;T0CTL;EN
CPU_MMAP;AUX_TIMER;T0TARGET
CPU_MMAP;AUX_TIMER;T0TARGET;RESERVED16
CPU_MMAP;AUX_TIMER;T0TARGET;VALUE
CPU_MMAP;AUX_TIMER;T1TARGET
CPU_MMAP;AUX_TIMER;T1TARGET;RESERVED8
CPU_MMAP;AUX_TIMER;T1TARGET;VALUE
CPU_MMAP;AUX_TIMER;T1CTL
CPU_MMAP;AUX_TIMER;T1CTL;RESERVED1
CPU_MMAP;AUX_TIMER;T1CTL;EN
CPU_MMAP;AUX_SMPH
CPU_MMAP;AUX_SMPH;SMPH0
CPU_MMAP;AUX_SMPH;SMPH0;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH0;STAT
CPU_MMAP;AUX_SMPH;SMPH1
CPU_MMAP;AUX_SMPH;SMPH1;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH1;STAT
CPU_MMAP;AUX_SMPH;SMPH2
CPU_MMAP;AUX_SMPH;SMPH2;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH2;STAT
CPU_MMAP;AUX_SMPH;SMPH3
CPU_MMAP;AUX_SMPH;SMPH3;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH3;STAT
CPU_MMAP;AUX_SMPH;SMPH4
CPU_MMAP;AUX_SMPH;SMPH4;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH4;STAT
CPU_MMAP;AUX_SMPH;SMPH5
CPU_MMAP;AUX_SMPH;SMPH5;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH5;STAT
CPU_MMAP;AUX_SMPH;SMPH6
CPU_MMAP;AUX_SMPH;SMPH6;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH6;STAT
CPU_MMAP;AUX_SMPH;SMPH7
CPU_MMAP;AUX_SMPH;SMPH7;RESERVED1
CPU_MMAP;AUX_SMPH;SMPH7;STAT
CPU_MMAP;AUX_SMPH;AUTOTAKE
CPU_MMAP;AUX_SMPH;AUTOTAKE;RESERVED3
CPU_MMAP;AUX_SMPH;AUTOTAKE;SMPH_ID
CPU_MMAP;AUX_ANAIF
CPU_MMAP;AUX_ANAIF;ADCCTL
CPU_MMAP;AUX_ANAIF;ADCCTL;RESERVED14
CPU_MMAP;AUX_ANAIF;ADCCTL;START_POL
CPU_MMAP;AUX_ANAIF;ADCCTL;START_POL;RISE
CPU_MMAP;AUX_ANAIF;ADCCTL;START_POL;FALL
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;RTC_CH2_EV
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUX_COMPA
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUX_COMPB
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;TDC_DONE
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;TIMER0_EV
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;TIMER1_EV
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;SMPH_AUTOTAKE_DONE
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;RESERVED0
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;RESERVED1
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;NO_EVENT0
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;NO_EVENT1
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AON_SW
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AON_PROG_WU
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO0
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO1
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO2
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO3
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO4
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO5
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO6
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO7
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO8
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO9
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO10
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO11
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO12
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO13
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO14
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;AUXIO15
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;ACLK_REF
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;MCU_EV
CPU_MMAP;AUX_ANAIF;ADCCTL;START_SRC;ADC_IRQ
CPU_MMAP;AUX_ANAIF;ADCCTL;RESERVED2
CPU_MMAP;AUX_ANAIF;ADCCTL;CMD
CPU_MMAP;AUX_ANAIF;ADCCTL;CMD;DIS
CPU_MMAP;AUX_ANAIF;ADCCTL;CMD;EN
CPU_MMAP;AUX_ANAIF;ADCCTL;CMD;FLUSH
CPU_MMAP;AUX_ANAIF;ADCFIFOSTAT
CPU_MMAP;AUX_ANAIF;ADCFIFOSTAT;RESERVED5
CPU_MMAP;AUX_ANAIF;ADCFIFOSTAT;OVERFLOW
CPU_MMAP;AUX_ANAIF;ADCFIFOSTAT;UNDERFLOW
CPU_MMAP;AUX_ANAIF;ADCFIFOSTAT;FULL
CPU_MMAP;AUX_ANAIF;ADCFIFOSTAT;ALMOST_FULL
CPU_MMAP;AUX_ANAIF;ADCFIFOSTAT;EMPTY
CPU_MMAP;AUX_ANAIF;ADCFIFO
CPU_MMAP;AUX_ANAIF;ADCFIFO;RESERVED12
CPU_MMAP;AUX_ANAIF;ADCFIFO;DATA
CPU_MMAP;AUX_ANAIF;ADCTRIG
CPU_MMAP;AUX_ANAIF;ADCTRIG;RESERVED1
CPU_MMAP;AUX_ANAIF;ADCTRIG;START
CPU_MMAP;AUX_ANAIF;ISRCCTL
CPU_MMAP;AUX_ANAIF;ISRCCTL;RESERVED1
CPU_MMAP;AUX_ANAIF;ISRCCTL;RESET_N
CPU_MMAP;AUX_DDI0_OSC
CPU_MMAP;AUX_DDI0_OSC;DIR03
CPU_MMAP;AUX_DDI0_OSC;DIR03;B3
CPU_MMAP;AUX_DDI0_OSC;DIR03;B2
CPU_MMAP;AUX_DDI0_OSC;DIR03;B1
CPU_MMAP;AUX_DDI0_OSC;DIR03;B0
CPU_MMAP;AUX_DDI0_OSC;DIR47
CPU_MMAP;AUX_DDI0_OSC;DIR47;B3
CPU_MMAP;AUX_DDI0_OSC;DIR47;B2
CPU_MMAP;AUX_DDI0_OSC;DIR47;B1
CPU_MMAP;AUX_DDI0_OSC;DIR47;B0
CPU_MMAP;AUX_DDI0_OSC;DIR811
CPU_MMAP;AUX_DDI0_OSC;DIR811;B3
CPU_MMAP;AUX_DDI0_OSC;DIR811;B2
CPU_MMAP;AUX_DDI0_OSC;DIR811;B1
CPU_MMAP;AUX_DDI0_OSC;DIR811;B0
CPU_MMAP;AUX_DDI0_OSC;DIR1215
CPU_MMAP;AUX_DDI0_OSC;DIR1215;B3
CPU_MMAP;AUX_DDI0_OSC;DIR1215;B2
CPU_MMAP;AUX_DDI0_OSC;DIR1215;B1
CPU_MMAP;AUX_DDI0_OSC;DIR1215;B0
CPU_MMAP;AUX_DDI0_OSC;DIR1619
CPU_MMAP;AUX_DDI0_OSC;DIR1619;B3
CPU_MMAP;AUX_DDI0_OSC;DIR1619;B2
CPU_MMAP;AUX_DDI0_OSC;DIR1619;B1
CPU_MMAP;AUX_DDI0_OSC;DIR1619;B0
CPU_MMAP;AUX_DDI0_OSC;DIR2023
CPU_MMAP;AUX_DDI0_OSC;DIR2023;B3
CPU_MMAP;AUX_DDI0_OSC;DIR2023;B2
CPU_MMAP;AUX_DDI0_OSC;DIR2023;B1
CPU_MMAP;AUX_DDI0_OSC;DIR2023;B0
CPU_MMAP;AUX_DDI0_OSC;DIR2427
CPU_MMAP;AUX_DDI0_OSC;DIR2427;B3
CPU_MMAP;AUX_DDI0_OSC;DIR2427;B2
CPU_MMAP;AUX_DDI0_OSC;DIR2427;B1
CPU_MMAP;AUX_DDI0_OSC;DIR2427;B0
CPU_MMAP;AUX_DDI0_OSC;DIR2831
CPU_MMAP;AUX_DDI0_OSC;DIR2831;B3
CPU_MMAP;AUX_DDI0_OSC;DIR2831;B2
CPU_MMAP;AUX_DDI0_OSC;DIR2831;B1
CPU_MMAP;AUX_DDI0_OSC;DIR2831;B0
CPU_MMAP;AUX_DDI0_OSC;DIR3235
CPU_MMAP;AUX_DDI0_OSC;DIR3235;B3
CPU_MMAP;AUX_DDI0_OSC;DIR3235;B2
CPU_MMAP;AUX_DDI0_OSC;DIR3235;B1
CPU_MMAP;AUX_DDI0_OSC;DIR3235;B0
CPU_MMAP;AUX_DDI0_OSC;DIR3639
CPU_MMAP;AUX_DDI0_OSC;DIR3639;B3
CPU_MMAP;AUX_DDI0_OSC;DIR3639;B2
CPU_MMAP;AUX_DDI0_OSC;DIR3639;B1
CPU_MMAP;AUX_DDI0_OSC;DIR3639;B0
CPU_MMAP;AUX_DDI0_OSC;DIR4043
CPU_MMAP;AUX_DDI0_OSC;DIR4043;B3
CPU_MMAP;AUX_DDI0_OSC;DIR4043;B2
CPU_MMAP;AUX_DDI0_OSC;DIR4043;B1
CPU_MMAP;AUX_DDI0_OSC;DIR4043;B0
CPU_MMAP;AUX_DDI0_OSC;DIR4447
CPU_MMAP;AUX_DDI0_OSC;DIR4447;B3
CPU_MMAP;AUX_DDI0_OSC;DIR4447;B2
CPU_MMAP;AUX_DDI0_OSC;DIR4447;B1
CPU_MMAP;AUX_DDI0_OSC;DIR4447;B0
CPU_MMAP;AUX_DDI0_OSC;DIR4851
CPU_MMAP;AUX_DDI0_OSC;DIR4851;B3
CPU_MMAP;AUX_DDI0_OSC;DIR4851;B2
CPU_MMAP;AUX_DDI0_OSC;DIR4851;B1
CPU_MMAP;AUX_DDI0_OSC;DIR4851;B0
CPU_MMAP;AUX_DDI0_OSC;DIR5255
CPU_MMAP;AUX_DDI0_OSC;DIR5255;B3
CPU_MMAP;AUX_DDI0_OSC;DIR5255;B2
CPU_MMAP;AUX_DDI0_OSC;DIR5255;B1
CPU_MMAP;AUX_DDI0_OSC;DIR5255;B0
CPU_MMAP;AUX_DDI0_OSC;DIR5659
CPU_MMAP;AUX_DDI0_OSC;DIR5659;B3
CPU_MMAP;AUX_DDI0_OSC;DIR5659;B2
CPU_MMAP;AUX_DDI0_OSC;DIR5659;B1
CPU_MMAP;AUX_DDI0_OSC;DIR5659;B0
CPU_MMAP;AUX_DDI0_OSC;DIR6063
CPU_MMAP;AUX_DDI0_OSC;DIR6063;B3
CPU_MMAP;AUX_DDI0_OSC;DIR6063;B2
CPU_MMAP;AUX_DDI0_OSC;DIR6063;B1
CPU_MMAP;AUX_DDI0_OSC;DIR6063;B0
CPU_MMAP;AUX_DDI0_OSC;SET03
CPU_MMAP;AUX_DDI0_OSC;SET03;S3
CPU_MMAP;AUX_DDI0_OSC;SET03;S2
CPU_MMAP;AUX_DDI0_OSC;SET03;S1
CPU_MMAP;AUX_DDI0_OSC;SET03;S0
CPU_MMAP;AUX_DDI0_OSC;SET47
CPU_MMAP;AUX_DDI0_OSC;SET47;S3
CPU_MMAP;AUX_DDI0_OSC;SET47;S2
CPU_MMAP;AUX_DDI0_OSC;SET47;S1
CPU_MMAP;AUX_DDI0_OSC;SET47;S0
CPU_MMAP;AUX_DDI0_OSC;SET811
CPU_MMAP;AUX_DDI0_OSC;SET811;S3
CPU_MMAP;AUX_DDI0_OSC;SET811;S2
CPU_MMAP;AUX_DDI0_OSC;SET811;S1
CPU_MMAP;AUX_DDI0_OSC;SET811;S0
CPU_MMAP;AUX_DDI0_OSC;SET1215
CPU_MMAP;AUX_DDI0_OSC;SET1215;S3
CPU_MMAP;AUX_DDI0_OSC;SET1215;S2
CPU_MMAP;AUX_DDI0_OSC;SET1215;S1
CPU_MMAP;AUX_DDI0_OSC;SET1215;S0
CPU_MMAP;AUX_DDI0_OSC;SET1619
CPU_MMAP;AUX_DDI0_OSC;SET1619;S3
CPU_MMAP;AUX_DDI0_OSC;SET1619;S2
CPU_MMAP;AUX_DDI0_OSC;SET1619;S1
CPU_MMAP;AUX_DDI0_OSC;SET1619;S0
CPU_MMAP;AUX_DDI0_OSC;SET2023
CPU_MMAP;AUX_DDI0_OSC;SET2023;S3
CPU_MMAP;AUX_DDI0_OSC;SET2023;S2
CPU_MMAP;AUX_DDI0_OSC;SET2023;S1
CPU_MMAP;AUX_DDI0_OSC;SET2023;S0
CPU_MMAP;AUX_DDI0_OSC;SET2427
CPU_MMAP;AUX_DDI0_OSC;SET2427;S3
CPU_MMAP;AUX_DDI0_OSC;SET2427;S2
CPU_MMAP;AUX_DDI0_OSC;SET2427;S1
CPU_MMAP;AUX_DDI0_OSC;SET2427;S0
CPU_MMAP;AUX_DDI0_OSC;SET2831
CPU_MMAP;AUX_DDI0_OSC;SET2831;S3
CPU_MMAP;AUX_DDI0_OSC;SET2831;S2
CPU_MMAP;AUX_DDI0_OSC;SET2831;S1
CPU_MMAP;AUX_DDI0_OSC;SET2831;S0
CPU_MMAP;AUX_DDI0_OSC;SET3235
CPU_MMAP;AUX_DDI0_OSC;SET3235;S3
CPU_MMAP;AUX_DDI0_OSC;SET3235;S2
CPU_MMAP;AUX_DDI0_OSC;SET3235;S1
CPU_MMAP;AUX_DDI0_OSC;SET3235;S0
CPU_MMAP;AUX_DDI0_OSC;SET3639
CPU_MMAP;AUX_DDI0_OSC;SET3639;S3
CPU_MMAP;AUX_DDI0_OSC;SET3639;S2
CPU_MMAP;AUX_DDI0_OSC;SET3639;S1
CPU_MMAP;AUX_DDI0_OSC;SET3639;S0
CPU_MMAP;AUX_DDI0_OSC;SET4043
CPU_MMAP;AUX_DDI0_OSC;SET4043;S3
CPU_MMAP;AUX_DDI0_OSC;SET4043;S2
CPU_MMAP;AUX_DDI0_OSC;SET4043;S1
CPU_MMAP;AUX_DDI0_OSC;SET4043;S0
CPU_MMAP;AUX_DDI0_OSC;SET4447
CPU_MMAP;AUX_DDI0_OSC;SET4447;S3
CPU_MMAP;AUX_DDI0_OSC;SET4447;S2
CPU_MMAP;AUX_DDI0_OSC;SET4447;S1
CPU_MMAP;AUX_DDI0_OSC;SET4447;S0
CPU_MMAP;AUX_DDI0_OSC;SET4851
CPU_MMAP;AUX_DDI0_OSC;SET4851;S3
CPU_MMAP;AUX_DDI0_OSC;SET4851;S2
CPU_MMAP;AUX_DDI0_OSC;SET4851;S1
CPU_MMAP;AUX_DDI0_OSC;SET4851;S0
CPU_MMAP;AUX_DDI0_OSC;SET5255
CPU_MMAP;AUX_DDI0_OSC;SET5255;S3
CPU_MMAP;AUX_DDI0_OSC;SET5255;S2
CPU_MMAP;AUX_DDI0_OSC;SET5255;S1
CPU_MMAP;AUX_DDI0_OSC;SET5255;S0
CPU_MMAP;AUX_DDI0_OSC;SET5659
CPU_MMAP;AUX_DDI0_OSC;SET5659;S3
CPU_MMAP;AUX_DDI0_OSC;SET5659;S2
CPU_MMAP;AUX_DDI0_OSC;SET5659;S1
CPU_MMAP;AUX_DDI0_OSC;SET5659;S0
CPU_MMAP;AUX_DDI0_OSC;SET6063
CPU_MMAP;AUX_DDI0_OSC;SET6063;S3
CPU_MMAP;AUX_DDI0_OSC;SET6063;S2
CPU_MMAP;AUX_DDI0_OSC;SET6063;S1
CPU_MMAP;AUX_DDI0_OSC;SET6063;S0
CPU_MMAP;AUX_DDI0_OSC;CLR03
CPU_MMAP;AUX_DDI0_OSC;CLR03;S3
CPU_MMAP;AUX_DDI0_OSC;CLR03;S2
CPU_MMAP;AUX_DDI0_OSC;CLR03;S1
CPU_MMAP;AUX_DDI0_OSC;CLR03;S0
CPU_MMAP;AUX_DDI0_OSC;CLR47
CPU_MMAP;AUX_DDI0_OSC;CLR47;S3
CPU_MMAP;AUX_DDI0_OSC;CLR47;S2
CPU_MMAP;AUX_DDI0_OSC;CLR47;S1
CPU_MMAP;AUX_DDI0_OSC;CLR47;S0
CPU_MMAP;AUX_DDI0_OSC;CLR811
CPU_MMAP;AUX_DDI0_OSC;CLR811;S3
CPU_MMAP;AUX_DDI0_OSC;CLR811;S2
CPU_MMAP;AUX_DDI0_OSC;CLR811;S1
CPU_MMAP;AUX_DDI0_OSC;CLR811;S0
CPU_MMAP;AUX_DDI0_OSC;CLR1215
CPU_MMAP;AUX_DDI0_OSC;CLR1215;S3
CPU_MMAP;AUX_DDI0_OSC;CLR1215;S2
CPU_MMAP;AUX_DDI0_OSC;CLR1215;S1
CPU_MMAP;AUX_DDI0_OSC;CLR1215;S0
CPU_MMAP;AUX_DDI0_OSC;CLR1619
CPU_MMAP;AUX_DDI0_OSC;CLR1619;S3
CPU_MMAP;AUX_DDI0_OSC;CLR1619;S2
CPU_MMAP;AUX_DDI0_OSC;CLR1619;S1
CPU_MMAP;AUX_DDI0_OSC;CLR1619;S0
CPU_MMAP;AUX_DDI0_OSC;CLR2023
CPU_MMAP;AUX_DDI0_OSC;CLR2023;S3
CPU_MMAP;AUX_DDI0_OSC;CLR2023;S2
CPU_MMAP;AUX_DDI0_OSC;CLR2023;S1
CPU_MMAP;AUX_DDI0_OSC;CLR2023;S0
CPU_MMAP;AUX_DDI0_OSC;CLR2427
CPU_MMAP;AUX_DDI0_OSC;CLR2427;S3
CPU_MMAP;AUX_DDI0_OSC;CLR2427;S2
CPU_MMAP;AUX_DDI0_OSC;CLR2427;S1
CPU_MMAP;AUX_DDI0_OSC;CLR2427;S0
CPU_MMAP;AUX_DDI0_OSC;CLR2831
CPU_MMAP;AUX_DDI0_OSC;CLR2831;S3
CPU_MMAP;AUX_DDI0_OSC;CLR2831;S2
CPU_MMAP;AUX_DDI0_OSC;CLR2831;S1
CPU_MMAP;AUX_DDI0_OSC;CLR2831;S0
CPU_MMAP;AUX_DDI0_OSC;CLR3235
CPU_MMAP;AUX_DDI0_OSC;CLR3235;S3
CPU_MMAP;AUX_DDI0_OSC;CLR3235;S2
CPU_MMAP;AUX_DDI0_OSC;CLR3235;S1
CPU_MMAP;AUX_DDI0_OSC;CLR3235;S0
CPU_MMAP;AUX_DDI0_OSC;CLR3639
CPU_MMAP;AUX_DDI0_OSC;CLR3639;S3
CPU_MMAP;AUX_DDI0_OSC;CLR3639;S2
CPU_MMAP;AUX_DDI0_OSC;CLR3639;S1
CPU_MMAP;AUX_DDI0_OSC;CLR3639;S0
CPU_MMAP;AUX_DDI0_OSC;CLR4043
CPU_MMAP;AUX_DDI0_OSC;CLR4043;S3
CPU_MMAP;AUX_DDI0_OSC;CLR4043;S2
CPU_MMAP;AUX_DDI0_OSC;CLR4043;S1
CPU_MMAP;AUX_DDI0_OSC;CLR4043;S0
CPU_MMAP;AUX_DDI0_OSC;CLR4447
CPU_MMAP;AUX_DDI0_OSC;CLR4447;S3
CPU_MMAP;AUX_DDI0_OSC;CLR4447;S2
CPU_MMAP;AUX_DDI0_OSC;CLR4447;S1
CPU_MMAP;AUX_DDI0_OSC;CLR4447;S0
CPU_MMAP;AUX_DDI0_OSC;CLR4851
CPU_MMAP;AUX_DDI0_OSC;CLR4851;S3
CPU_MMAP;AUX_DDI0_OSC;CLR4851;S2
CPU_MMAP;AUX_DDI0_OSC;CLR4851;S1
CPU_MMAP;AUX_DDI0_OSC;CLR4851;S0
CPU_MMAP;AUX_DDI0_OSC;CLR5255
CPU_MMAP;AUX_DDI0_OSC;CLR5255;S3
CPU_MMAP;AUX_DDI0_OSC;CLR5255;S2
CPU_MMAP;AUX_DDI0_OSC;CLR5255;S1
CPU_MMAP;AUX_DDI0_OSC;CLR5255;S0
CPU_MMAP;AUX_DDI0_OSC;CLR5659
CPU_MMAP;AUX_DDI0_OSC;CLR5659;S3
CPU_MMAP;AUX_DDI0_OSC;CLR5659;S2
CPU_MMAP;AUX_DDI0_OSC;CLR5659;S1
CPU_MMAP;AUX_DDI0_OSC;CLR5659;S0
CPU_MMAP;AUX_DDI0_OSC;CLR6063
CPU_MMAP;AUX_DDI0_OSC;CLR6063;S3
CPU_MMAP;AUX_DDI0_OSC;CLR6063;S2
CPU_MMAP;AUX_DDI0_OSC;CLR6063;S1
CPU_MMAP;AUX_DDI0_OSC;CLR6063;S0
CPU_MMAP;AUX_DDI0_OSC;SLAVESTAT
CPU_MMAP;AUX_DDI0_OSC;SLAVESTAT;RESERVED
CPU_MMAP;AUX_DDI0_OSC;SLAVESTAT;DI_REQ
CPU_MMAP;AUX_DDI0_OSC;SLAVESTAT;DI_ACK
CPU_MMAP;AUX_DDI0_OSC;SLAVECONF
CPU_MMAP;AUX_DDI0_OSC;SLAVECONF;RESERVED
CPU_MMAP;AUX_DDI0_OSC;SLAVECONF;CONFLOCK
CPU_MMAP;AUX_DDI0_OSC;SLAVECONF;RESERVED2
CPU_MMAP;AUX_DDI0_OSC;SLAVECONF;WAITFORACK
CPU_MMAP;AUX_DDI0_OSC;SLAVECONF;DDICLKSPEED
CPU_MMAP;AUX_DDI0_OSC;MASK4B01
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B01;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B23
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B23;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B45
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B45;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B67
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B67;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B89
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B89;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1011;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1213;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1415;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1617;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B1819;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2021;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2223;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2425;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2627;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B2829;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3031;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3233;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3435;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3637;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B3839;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4041;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4243;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4445;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4647;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B4849;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5051;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5253;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5455;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5657;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B5859;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6061;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;M1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;D1H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;M1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;D1L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;M0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;D0H
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;M0L
CPU_MMAP;AUX_DDI0_OSC;MASK4B6263;D0L
CPU_MMAP;AUX_DDI0_OSC;MASK8B01
CPU_MMAP;AUX_DDI0_OSC;MASK8B01;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B01;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B01;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B01;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B23
CPU_MMAP;AUX_DDI0_OSC;MASK8B23;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B23;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B23;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B23;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B45
CPU_MMAP;AUX_DDI0_OSC;MASK8B45;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B45;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B45;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B45;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B67
CPU_MMAP;AUX_DDI0_OSC;MASK8B67;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B67;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B67;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B67;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B89
CPU_MMAP;AUX_DDI0_OSC;MASK8B89;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B89;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B89;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B89;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1011
CPU_MMAP;AUX_DDI0_OSC;MASK8B1011;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1011;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1011;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1011;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1213
CPU_MMAP;AUX_DDI0_OSC;MASK8B1213;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1213;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1213;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1213;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1415
CPU_MMAP;AUX_DDI0_OSC;MASK8B1415;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1415;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1415;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1415;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1617
CPU_MMAP;AUX_DDI0_OSC;MASK8B1617;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1617;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1617;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1617;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1819
CPU_MMAP;AUX_DDI0_OSC;MASK8B1819;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1819;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B1819;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B1819;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2021
CPU_MMAP;AUX_DDI0_OSC;MASK8B2021;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2021;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2021;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2021;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2223
CPU_MMAP;AUX_DDI0_OSC;MASK8B2223;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2223;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2223;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2223;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2425
CPU_MMAP;AUX_DDI0_OSC;MASK8B2425;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2425;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2425;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2425;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2627
CPU_MMAP;AUX_DDI0_OSC;MASK8B2627;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2627;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2627;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2627;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2829
CPU_MMAP;AUX_DDI0_OSC;MASK8B2829;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2829;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B2829;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B2829;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3031
CPU_MMAP;AUX_DDI0_OSC;MASK8B3031;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3031;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3031;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3031;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3233
CPU_MMAP;AUX_DDI0_OSC;MASK8B3233;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3233;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3233;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3233;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3435
CPU_MMAP;AUX_DDI0_OSC;MASK8B3435;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3435;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3435;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3435;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3637
CPU_MMAP;AUX_DDI0_OSC;MASK8B3637;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3637;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3637;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3637;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3839
CPU_MMAP;AUX_DDI0_OSC;MASK8B3839;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3839;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B3839;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B3839;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4041
CPU_MMAP;AUX_DDI0_OSC;MASK8B4041;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4041;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4041;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4041;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4243
CPU_MMAP;AUX_DDI0_OSC;MASK8B4243;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4243;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4243;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4243;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4445
CPU_MMAP;AUX_DDI0_OSC;MASK8B4445;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4445;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4445;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4445;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4647
CPU_MMAP;AUX_DDI0_OSC;MASK8B4647;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4647;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4647;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4647;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4849
CPU_MMAP;AUX_DDI0_OSC;MASK8B4849;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4849;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B4849;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B4849;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5051
CPU_MMAP;AUX_DDI0_OSC;MASK8B5051;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5051;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5051;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5051;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5253
CPU_MMAP;AUX_DDI0_OSC;MASK8B5253;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5253;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5253;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5253;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5455
CPU_MMAP;AUX_DDI0_OSC;MASK8B5455;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5455;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5455;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5455;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5657
CPU_MMAP;AUX_DDI0_OSC;MASK8B5657;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5657;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5657;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5657;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5859
CPU_MMAP;AUX_DDI0_OSC;MASK8B5859;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5859;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B5859;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B5859;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B6061
CPU_MMAP;AUX_DDI0_OSC;MASK8B6061;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B6061;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B6061;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B6061;D0
CPU_MMAP;AUX_DDI0_OSC;MASK8B6263
CPU_MMAP;AUX_DDI0_OSC;MASK8B6263;M1
CPU_MMAP;AUX_DDI0_OSC;MASK8B6263;D1
CPU_MMAP;AUX_DDI0_OSC;MASK8B6263;M0
CPU_MMAP;AUX_DDI0_OSC;MASK8B6263;D0
CPU_MMAP;AUX_DDI0_OSC;MASK16B01
CPU_MMAP;AUX_DDI0_OSC;MASK16B01;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B01;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B23
CPU_MMAP;AUX_DDI0_OSC;MASK16B23;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B23;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B45
CPU_MMAP;AUX_DDI0_OSC;MASK16B45;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B45;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B67
CPU_MMAP;AUX_DDI0_OSC;MASK16B67;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B67;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B89
CPU_MMAP;AUX_DDI0_OSC;MASK16B89;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B89;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B1011
CPU_MMAP;AUX_DDI0_OSC;MASK16B1011;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B1011;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B1213
CPU_MMAP;AUX_DDI0_OSC;MASK16B1213;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B1213;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B1415
CPU_MMAP;AUX_DDI0_OSC;MASK16B1415;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B1415;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B1617
CPU_MMAP;AUX_DDI0_OSC;MASK16B1617;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B1617;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B1819
CPU_MMAP;AUX_DDI0_OSC;MASK16B1819;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B1819;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B2021
CPU_MMAP;AUX_DDI0_OSC;MASK16B2021;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B2021;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B2223
CPU_MMAP;AUX_DDI0_OSC;MASK16B2223;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B2223;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B2425
CPU_MMAP;AUX_DDI0_OSC;MASK16B2425;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B2425;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B2627
CPU_MMAP;AUX_DDI0_OSC;MASK16B2627;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B2627;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B2829
CPU_MMAP;AUX_DDI0_OSC;MASK16B2829;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B2829;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B3031
CPU_MMAP;AUX_DDI0_OSC;MASK16B3031;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B3031;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B3233
CPU_MMAP;AUX_DDI0_OSC;MASK16B3233;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B3233;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B3435
CPU_MMAP;AUX_DDI0_OSC;MASK16B3435;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B3435;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B3637
CPU_MMAP;AUX_DDI0_OSC;MASK16B3637;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B3637;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B3839
CPU_MMAP;AUX_DDI0_OSC;MASK16B3839;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B3839;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B4041
CPU_MMAP;AUX_DDI0_OSC;MASK16B4041;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B4041;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B4243
CPU_MMAP;AUX_DDI0_OSC;MASK16B4243;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B4243;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B4445
CPU_MMAP;AUX_DDI0_OSC;MASK16B4445;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B4445;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B4647
CPU_MMAP;AUX_DDI0_OSC;MASK16B4647;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B4647;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B4849
CPU_MMAP;AUX_DDI0_OSC;MASK16B4849;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B4849;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B5051
CPU_MMAP;AUX_DDI0_OSC;MASK16B5051;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B5051;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B5253
CPU_MMAP;AUX_DDI0_OSC;MASK16B5253;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B5253;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B5455
CPU_MMAP;AUX_DDI0_OSC;MASK16B5455;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B5455;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B5657
CPU_MMAP;AUX_DDI0_OSC;MASK16B5657;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B5657;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B5859
CPU_MMAP;AUX_DDI0_OSC;MASK16B5859;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B5859;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B6061
CPU_MMAP;AUX_DDI0_OSC;MASK16B6061;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B6061;D
CPU_MMAP;AUX_DDI0_OSC;MASK16B6263
CPU_MMAP;AUX_DDI0_OSC;MASK16B6263;M
CPU_MMAP;AUX_DDI0_OSC;MASK16B6263;D
CPU_MMAP;AUX_ADI4
CPU_MMAP;AUX_ADI4;DIR03
CPU_MMAP;AUX_ADI4;DIR03;B3
CPU_MMAP;AUX_ADI4;DIR03;B2
CPU_MMAP;AUX_ADI4;DIR03;B1
CPU_MMAP;AUX_ADI4;DIR03;B0
CPU_MMAP;AUX_ADI4;DIR47
CPU_MMAP;AUX_ADI4;DIR47;B3
CPU_MMAP;AUX_ADI4;DIR47;B2
CPU_MMAP;AUX_ADI4;DIR47;B1
CPU_MMAP;AUX_ADI4;DIR47;B0
CPU_MMAP;AUX_ADI4;DIR811
CPU_MMAP;AUX_ADI4;DIR811;B3
CPU_MMAP;AUX_ADI4;DIR811;B2
CPU_MMAP;AUX_ADI4;DIR811;B1
CPU_MMAP;AUX_ADI4;DIR811;B0
CPU_MMAP;AUX_ADI4;DIR1215
CPU_MMAP;AUX_ADI4;DIR1215;B3
CPU_MMAP;AUX_ADI4;DIR1215;B2
CPU_MMAP;AUX_ADI4;DIR1215;B1
CPU_MMAP;AUX_ADI4;DIR1215;B0
CPU_MMAP;AUX_ADI4;SET03
CPU_MMAP;AUX_ADI4;SET03;S3
CPU_MMAP;AUX_ADI4;SET03;S2
CPU_MMAP;AUX_ADI4;SET03;S1
CPU_MMAP;AUX_ADI4;SET03;S0
CPU_MMAP;AUX_ADI4;SET47
CPU_MMAP;AUX_ADI4;SET47;S3
CPU_MMAP;AUX_ADI4;SET47;S2
CPU_MMAP;AUX_ADI4;SET47;S1
CPU_MMAP;AUX_ADI4;SET47;S0
CPU_MMAP;AUX_ADI4;SET811
CPU_MMAP;AUX_ADI4;SET811;S3
CPU_MMAP;AUX_ADI4;SET811;S2
CPU_MMAP;AUX_ADI4;SET811;S1
CPU_MMAP;AUX_ADI4;SET811;S0
CPU_MMAP;AUX_ADI4;SET1215
CPU_MMAP;AUX_ADI4;SET1215;S3
CPU_MMAP;AUX_ADI4;SET1215;S2
CPU_MMAP;AUX_ADI4;SET1215;S1
CPU_MMAP;AUX_ADI4;SET1215;S0
CPU_MMAP;AUX_ADI4;CLR03
CPU_MMAP;AUX_ADI4;CLR03;S3
CPU_MMAP;AUX_ADI4;CLR03;S2
CPU_MMAP;AUX_ADI4;CLR03;S1
CPU_MMAP;AUX_ADI4;CLR03;S0
CPU_MMAP;AUX_ADI4;CLR47
CPU_MMAP;AUX_ADI4;CLR47;S3
CPU_MMAP;AUX_ADI4;CLR47;S2
CPU_MMAP;AUX_ADI4;CLR47;S1
CPU_MMAP;AUX_ADI4;CLR47;S0
CPU_MMAP;AUX_ADI4;CLR811
CPU_MMAP;AUX_ADI4;CLR811;S3
CPU_MMAP;AUX_ADI4;CLR811;S2
CPU_MMAP;AUX_ADI4;CLR811;S1
CPU_MMAP;AUX_ADI4;CLR811;S0
CPU_MMAP;AUX_ADI4;CLR1215
CPU_MMAP;AUX_ADI4;CLR1215;S3
CPU_MMAP;AUX_ADI4;CLR1215;S2
CPU_MMAP;AUX_ADI4;CLR1215;S1
CPU_MMAP;AUX_ADI4;CLR1215;S0
CPU_MMAP;AUX_ADI4;SLAVESTAT
CPU_MMAP;AUX_ADI4;SLAVESTAT;RESERVED2
CPU_MMAP;AUX_ADI4;SLAVESTAT;DI_REQ
CPU_MMAP;AUX_ADI4;SLAVESTAT;DI_ACK
CPU_MMAP;AUX_ADI4;SLAVECONF
CPU_MMAP;AUX_ADI4;SLAVECONF;RESERVED8
CPU_MMAP;AUX_ADI4;SLAVECONF;CONFLOCK
CPU_MMAP;AUX_ADI4;SLAVECONF;RESERVED3
CPU_MMAP;AUX_ADI4;SLAVECONF;WAITFORACK
CPU_MMAP;AUX_ADI4;SLAVECONF;ADICLKSPEED
CPU_MMAP;AUX_ADI4;MASK4B01
CPU_MMAP;AUX_ADI4;MASK4B01;M1H
CPU_MMAP;AUX_ADI4;MASK4B01;D1H
CPU_MMAP;AUX_ADI4;MASK4B01;M1L
CPU_MMAP;AUX_ADI4;MASK4B01;D1L
CPU_MMAP;AUX_ADI4;MASK4B01;M0H
CPU_MMAP;AUX_ADI4;MASK4B01;D0H
CPU_MMAP;AUX_ADI4;MASK4B01;M0L
CPU_MMAP;AUX_ADI4;MASK4B01;D0L
CPU_MMAP;AUX_ADI4;MASK4B23
CPU_MMAP;AUX_ADI4;MASK4B23;M1H
CPU_MMAP;AUX_ADI4;MASK4B23;D1H
CPU_MMAP;AUX_ADI4;MASK4B23;M1L
CPU_MMAP;AUX_ADI4;MASK4B23;D1L
CPU_MMAP;AUX_ADI4;MASK4B23;M0H
CPU_MMAP;AUX_ADI4;MASK4B23;D0H
CPU_MMAP;AUX_ADI4;MASK4B23;M0L
CPU_MMAP;AUX_ADI4;MASK4B23;D0L
CPU_MMAP;AUX_ADI4;MASK4B45
CPU_MMAP;AUX_ADI4;MASK4B45;M1H
CPU_MMAP;AUX_ADI4;MASK4B45;D1H
CPU_MMAP;AUX_ADI4;MASK4B45;M1L
CPU_MMAP;AUX_ADI4;MASK4B45;D1L
CPU_MMAP;AUX_ADI4;MASK4B45;M0H
CPU_MMAP;AUX_ADI4;MASK4B45;D0H
CPU_MMAP;AUX_ADI4;MASK4B45;M0L
CPU_MMAP;AUX_ADI4;MASK4B45;D0L
CPU_MMAP;AUX_ADI4;MASK4B67
CPU_MMAP;AUX_ADI4;MASK4B67;M1H
CPU_MMAP;AUX_ADI4;MASK4B67;D1H
CPU_MMAP;AUX_ADI4;MASK4B67;M1L
CPU_MMAP;AUX_ADI4;MASK4B67;D1L
CPU_MMAP;AUX_ADI4;MASK4B67;M0H
CPU_MMAP;AUX_ADI4;MASK4B67;D0H
CPU_MMAP;AUX_ADI4;MASK4B67;M0L
CPU_MMAP;AUX_ADI4;MASK4B67;D0L
CPU_MMAP;AUX_ADI4;MASK4B89
CPU_MMAP;AUX_ADI4;MASK4B89;M1H
CPU_MMAP;AUX_ADI4;MASK4B89;D1H
CPU_MMAP;AUX_ADI4;MASK4B89;M1L
CPU_MMAP;AUX_ADI4;MASK4B89;D1L
CPU_MMAP;AUX_ADI4;MASK4B89;M0H
CPU_MMAP;AUX_ADI4;MASK4B89;D0H
CPU_MMAP;AUX_ADI4;MASK4B89;M0L
CPU_MMAP;AUX_ADI4;MASK4B89;D0L
CPU_MMAP;AUX_ADI4;MASK4B1011
CPU_MMAP;AUX_ADI4;MASK4B1011;M1H
CPU_MMAP;AUX_ADI4;MASK4B1011;D1H
CPU_MMAP;AUX_ADI4;MASK4B1011;M1L
CPU_MMAP;AUX_ADI4;MASK4B1011;D1L
CPU_MMAP;AUX_ADI4;MASK4B1011;M0H
CPU_MMAP;AUX_ADI4;MASK4B1011;D0H
CPU_MMAP;AUX_ADI4;MASK4B1011;M0L
CPU_MMAP;AUX_ADI4;MASK4B1011;D0L
CPU_MMAP;AUX_ADI4;MASK4B1213
CPU_MMAP;AUX_ADI4;MASK4B1213;M1H
CPU_MMAP;AUX_ADI4;MASK4B1213;D1H
CPU_MMAP;AUX_ADI4;MASK4B1213;M1L
CPU_MMAP;AUX_ADI4;MASK4B1213;D1L
CPU_MMAP;AUX_ADI4;MASK4B1213;M0H
CPU_MMAP;AUX_ADI4;MASK4B1213;D0H
CPU_MMAP;AUX_ADI4;MASK4B1213;M0L
CPU_MMAP;AUX_ADI4;MASK4B1213;D0L
CPU_MMAP;AUX_ADI4;MASK4B1415
CPU_MMAP;AUX_ADI4;MASK4B1415;M1H
CPU_MMAP;AUX_ADI4;MASK4B1415;D1H
CPU_MMAP;AUX_ADI4;MASK4B1415;M1L
CPU_MMAP;AUX_ADI4;MASK4B1415;D1L
CPU_MMAP;AUX_ADI4;MASK4B1415;M0H
CPU_MMAP;AUX_ADI4;MASK4B1415;D0H
CPU_MMAP;AUX_ADI4;MASK4B1415;M0L
CPU_MMAP;AUX_ADI4;MASK4B1415;D0L
CPU_MMAP;AUX_ADI4;MASK8B01
CPU_MMAP;AUX_ADI4;MASK8B01;M1
CPU_MMAP;AUX_ADI4;MASK8B01;D1
CPU_MMAP;AUX_ADI4;MASK8B01;M0
CPU_MMAP;AUX_ADI4;MASK8B01;D0
CPU_MMAP;AUX_ADI4;MASK8B23
CPU_MMAP;AUX_ADI4;MASK8B23;M1
CPU_MMAP;AUX_ADI4;MASK8B23;D1
CPU_MMAP;AUX_ADI4;MASK8B23;M0
CPU_MMAP;AUX_ADI4;MASK8B23;D0
CPU_MMAP;AUX_ADI4;MASK8B45
CPU_MMAP;AUX_ADI4;MASK8B45;M1
CPU_MMAP;AUX_ADI4;MASK8B45;D1
CPU_MMAP;AUX_ADI4;MASK8B45;M0
CPU_MMAP;AUX_ADI4;MASK8B45;D0
CPU_MMAP;AUX_ADI4;MASK8B67
CPU_MMAP;AUX_ADI4;MASK8B67;M1
CPU_MMAP;AUX_ADI4;MASK8B67;D1
CPU_MMAP;AUX_ADI4;MASK8B67;M0
CPU_MMAP;AUX_ADI4;MASK8B67;D0
CPU_MMAP;AUX_ADI4;MASK8B89
CPU_MMAP;AUX_ADI4;MASK8B89;M1
CPU_MMAP;AUX_ADI4;MASK8B89;D1
CPU_MMAP;AUX_ADI4;MASK8B89;M0
CPU_MMAP;AUX_ADI4;MASK8B89;D0
CPU_MMAP;AUX_ADI4;MASK8B1011
CPU_MMAP;AUX_ADI4;MASK8B1011;M1
CPU_MMAP;AUX_ADI4;MASK8B1011;D1
CPU_MMAP;AUX_ADI4;MASK8B1011;M0
CPU_MMAP;AUX_ADI4;MASK8B1011;D0
CPU_MMAP;AUX_ADI4;MASK8B1213
CPU_MMAP;AUX_ADI4;MASK8B1213;M1
CPU_MMAP;AUX_ADI4;MASK8B1213;D1
CPU_MMAP;AUX_ADI4;MASK8B1213;M0
CPU_MMAP;AUX_ADI4;MASK8B1213;D0
CPU_MMAP;AUX_ADI4;MASK8B1415
CPU_MMAP;AUX_ADI4;MASK8B1415;M1
CPU_MMAP;AUX_ADI4;MASK8B1415;D1
CPU_MMAP;AUX_ADI4;MASK8B1415;M0
CPU_MMAP;AUX_ADI4;MASK8B1415;D0
CPU_MMAP;AUX_ADI4;MASK16B01
CPU_MMAP;AUX_ADI4;MASK16B01;M
CPU_MMAP;AUX_ADI4;MASK16B01;D
CPU_MMAP;AUX_ADI4;MASK16B23
CPU_MMAP;AUX_ADI4;MASK16B23;M
CPU_MMAP;AUX_ADI4;MASK16B23;D
CPU_MMAP;AUX_ADI4;MASK16B45
CPU_MMAP;AUX_ADI4;MASK16B45;M
CPU_MMAP;AUX_ADI4;MASK16B45;D
CPU_MMAP;AUX_ADI4;MASK16B67
CPU_MMAP;AUX_ADI4;MASK16B67;M
CPU_MMAP;AUX_ADI4;MASK16B67;D
CPU_MMAP;AUX_ADI4;MASK16B89
CPU_MMAP;AUX_ADI4;MASK16B89;M
CPU_MMAP;AUX_ADI4;MASK16B89;D
CPU_MMAP;AUX_ADI4;MASK16B1011
CPU_MMAP;AUX_ADI4;MASK16B1011;M
CPU_MMAP;AUX_ADI4;MASK16B1011;D
CPU_MMAP;AUX_ADI4;MASK16B1213
CPU_MMAP;AUX_ADI4;MASK16B1213;M
CPU_MMAP;AUX_ADI4;MASK16B1213;D
CPU_MMAP;AUX_ADI4;MASK16B1415
CPU_MMAP;AUX_ADI4;MASK16B1415;M
CPU_MMAP;AUX_ADI4;MASK16B1415;D
CPU_MMAP;AUX_RAM
CPU_MMAP;AUX_RAM;BANK0
CPU_MMAP;AUX_RAM;BANK0;DATA
CPU_MMAP;AUX_SCE
CPU_MMAP;AUX_SCE;CTL
CPU_MMAP;AUX_SCE;CTL;FORCE_EV_LOW
CPU_MMAP;AUX_SCE;CTL;FORCE_EV_HIGH
CPU_MMAP;AUX_SCE;CTL;RESERVED12
CPU_MMAP;AUX_SCE;CTL;RESET_VECTOR
CPU_MMAP;AUX_SCE;CTL;RESERVED7
CPU_MMAP;AUX_SCE;CTL;DBG_FREEZE_EN
CPU_MMAP;AUX_SCE;CTL;FORCE_WU_LOW
CPU_MMAP;AUX_SCE;CTL;FORCE_WU_HIGH
CPU_MMAP;AUX_SCE;CTL;RESTART
CPU_MMAP;AUX_SCE;CTL;SINGLE_STEP
CPU_MMAP;AUX_SCE;CTL;SUSPEND
CPU_MMAP;AUX_SCE;CTL;CLK_EN
CPU_MMAP;AUX_SCE;FETCHSTAT
CPU_MMAP;AUX_SCE;FETCHSTAT;OPCODE
CPU_MMAP;AUX_SCE;FETCHSTAT;PC
CPU_MMAP;AUX_SCE;CPUSTAT
CPU_MMAP;AUX_SCE;CPUSTAT;RESERVED12
CPU_MMAP;AUX_SCE;CPUSTAT;BUS_ERROR
CPU_MMAP;AUX_SCE;CPUSTAT;SLEEP
CPU_MMAP;AUX_SCE;CPUSTAT;WEV
CPU_MMAP;AUX_SCE;CPUSTAT;SELF_STOP
CPU_MMAP;AUX_SCE;CPUSTAT;RESERVED4
CPU_MMAP;AUX_SCE;CPUSTAT;V_FLAG
CPU_MMAP;AUX_SCE;CPUSTAT;C_FLAG
CPU_MMAP;AUX_SCE;CPUSTAT;N_FLAG
CPU_MMAP;AUX_SCE;CPUSTAT;Z_FLAG
CPU_MMAP;AUX_SCE;WUSTAT
CPU_MMAP;AUX_SCE;WUSTAT;RESERVED20
CPU_MMAP;AUX_SCE;WUSTAT;RESERVED18
CPU_MMAP;AUX_SCE;WUSTAT;EXC_VECTOR
CPU_MMAP;AUX_SCE;WUSTAT;RESERVED9
CPU_MMAP;AUX_SCE;WUSTAT;WU_SIGNAL
CPU_MMAP;AUX_SCE;WUSTAT;EV_SIGNALS
CPU_MMAP;AUX_SCE;REG1_0
CPU_MMAP;AUX_SCE;REG1_0;REG1
CPU_MMAP;AUX_SCE;REG1_0;REG0
CPU_MMAP;AUX_SCE;REG3_2
CPU_MMAP;AUX_SCE;REG3_2;REG3
CPU_MMAP;AUX_SCE;REG3_2;REG2
CPU_MMAP;AUX_SCE;REG5_4
CPU_MMAP;AUX_SCE;REG5_4;REG5
CPU_MMAP;AUX_SCE;REG5_4;REG4
CPU_MMAP;AUX_SCE;REG7_6
CPU_MMAP;AUX_SCE;REG7_6;REG7
CPU_MMAP;AUX_SCE;REG7_6;REG6
CPU_MMAP;AUX_SCE;LOOPADDR
CPU_MMAP;AUX_SCE;LOOPADDR;STOP
CPU_MMAP;AUX_SCE;LOOPADDR;START
CPU_MMAP;AUX_SCE;LOOPCNT
CPU_MMAP;AUX_SCE;LOOPCNT;RESERVED8
CPU_MMAP;AUX_SCE;LOOPCNT;ITER_LEFT
CPU_MMAP;FCFG1
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV5
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV5;IFAMP_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV5;LNA_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV5;IFAMP_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV5;CTL_PA0_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV5;RESERVED
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV5;RFLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV6
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV6;IFAMP_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV6;LNA_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV6;IFAMP_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV6;CTL_PA0_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV6;RESERVED
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV6;RFLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV10
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV10;IFAMP_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV10;LNA_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV10;IFAMP_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV10;CTL_PA0_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV10;RESERVED
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV10;RFLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV12
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV12;IFAMP_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV12;LNA_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV12;IFAMP_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV12;CTL_PA0_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV12;RESERVED
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV12;RFLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV15
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV15;IFAMP_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV15;LNA_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV15;IFAMP_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV15;CTL_PA0_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV15;RESERVED
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV15;RFLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV30
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV30;IFAMP_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV30;LNA_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV30;IFAMP_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV30;CTL_PA0_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV30;RESERVED
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND_DIV30;RFLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV5
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV5;RESERVED
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV5;RFC_MDM_DEMIQMC0
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV5;LDOVCO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV5;SLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV6
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV6;RESERVED
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV6;RFC_MDM_DEMIQMC0
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV6;LDOVCO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV6;SLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV10
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV10;RESERVED
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV10;RFC_MDM_DEMIQMC0
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV10;LDOVCO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV10;SLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV12
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV12;RESERVED
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV12;RFC_MDM_DEMIQMC0
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV12;LDOVCO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV12;SLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV15
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV15;RESERVED
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV15;RFC_MDM_DEMIQMC0
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV15;LDOVCO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV15;SLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV30
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV30;RESERVED
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV30;RFC_MDM_DEMIQMC0
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV30;LDOVCO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH_DIV30;SLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV5
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV5;RESERVED
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV5;RSSI_OFFSET
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV5;QUANTCTLTHRES
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV5;DACTRIM
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV6
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV6;RESERVED
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV6;RSSI_OFFSET
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV6;QUANTCTLTHRES
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV6;DACTRIM
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV10
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV10;RESERVED
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV10;RSSI_OFFSET
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV10;QUANTCTLTHRES
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV10;DACTRIM
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV12
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV12;RESERVED
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV12;RSSI_OFFSET
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV12;QUANTCTLTHRES
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV12;DACTRIM
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV15
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV15;RESERVED
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV15;RSSI_OFFSET
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV15;QUANTCTLTHRES
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV15;DACTRIM
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV30
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV30;RESERVED
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV30;RSSI_OFFSET
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV30;QUANTCTLTHRES
CPU_MMAP;FCFG1;CONFIG_MISC_ADC_DIV30;DACTRIM
CPU_MMAP;FCFG1;SHDW_EFUSE_CONTROL
CPU_MMAP;FCFG1;SHDW_EFUSE_CONTROL;RESERVED
CPU_MMAP;FCFG1;SHDW_REDUNDANT0
CPU_MMAP;FCFG1;SHDW_REDUNDANT0;RESERVED
CPU_MMAP;FCFG1;SHDW_REDUNDANT1
CPU_MMAP;FCFG1;SHDW_REDUNDANT1;RESERVED
CPU_MMAP;FCFG1;SHDW_DIE_ID_0
CPU_MMAP;FCFG1;SHDW_DIE_ID_0;ID_31_0
CPU_MMAP;FCFG1;SHDW_DIE_ID_1
CPU_MMAP;FCFG1;SHDW_DIE_ID_1;ID_63_32
CPU_MMAP;FCFG1;SHDW_DIE_ID_2
CPU_MMAP;FCFG1;SHDW_DIE_ID_2;ID_95_64
CPU_MMAP;FCFG1;SHDW_DIE_ID_3
CPU_MMAP;FCFG1;SHDW_DIE_ID_3;ID_127_96
CPU_MMAP;FCFG1;SHDW_SCAN_DATA0
CPU_MMAP;FCFG1;SHDW_SCAN_DATA0;ULL_MCU_RAM1_REP
CPU_MMAP;FCFG1;SHDW_SCAN_DATA0;ULL_MCU_RAM2_REP
CPU_MMAP;FCFG1;SHDW_SCAN_DATA0;ULL_MCU_RAM3_REP
CPU_MMAP;FCFG1;SHDW_SCAN_DATA0;ULL_AUX_RAM_REP
CPU_MMAP;FCFG1;SHDW_SCAN_DATA0;TAP_DAP_LOCK
CPU_MMAP;FCFG1;SHDW_SCAN_DATA1
CPU_MMAP;FCFG1;SHDW_SCAN_DATA1;RESERVED
CPU_MMAP;FCFG1;SHDW_SCAN_DATA1;ULL_MCU_RAM0_REP
CPU_MMAP;FCFG1;SHDW_SCAN_DATA1;ULL_MCU_RAM1_REP
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;FLASH_RDY
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;STANDBY_MODE_SEL_INT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;STANDBY_PW_SEL_INT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;DIS_STANDBY_INT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;VIN_AT_X_INT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;STANDBY_MODE_SEL_EXT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;STANDBY_PW_SEL_EXT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;DIS_STANDBY_EXT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;VIN_AT_X_EXT
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;RESERVED
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;CRC
CPU_MMAP;FCFG1;SHDW_SCAN_DATA2_BOOT;TAP_DAP_LOCK_N
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT;RESERVED
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT;ROM_BOOT
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT;TRIM3P4
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT;VCG2P5CT
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT;VREADCT
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT;TRIM_0P8
CPU_MMAP;FCFG1;SHDW_BANK_TRIM_BOOT;TRIM
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;RESERVED
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;SET_RCOSC_HF_COARSE_RESISTOR
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;TRIMMAG
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;TRIMIREF
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;ITRIM_DIG_LDO
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;VTRIM_DIG
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;VTRIM_COARSE
CPU_MMAP;FCFG1;SHDW_OSC_BIAS_LDO_TRIM;RCOSCHF_CTRIM
CPU_MMAP;FCFG1;SHDW_ANA_TRIM
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;RESERVED
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;BOD_BANDGAP_TRIM_CNF
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;VDDR_ENABLE_PG1
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;VDDR_OK_HYS
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;IPTAT_TRIM
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;VDDR_TRIM
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;TRIMBOD_INTMODE
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;TRIMBOD_EXTMODE
CPU_MMAP;FCFG1;SHDW_ANA_TRIM;TRIMTEMP
CPU_MMAP;FCFG1;FLASH_E_P
CPU_MMAP;FCFG1;FLASH_E_P;PSU
CPU_MMAP;FCFG1;FLASH_E_P;ESU
CPU_MMAP;FCFG1;FLASH_E_P;PVSU
CPU_MMAP;FCFG1;FLASH_E_P;EVSU
CPU_MMAP;FCFG1;FLASH_C_E_P_R
CPU_MMAP;FCFG1;FLASH_C_E_P_R;RVSU
CPU_MMAP;FCFG1;FLASH_C_E_P_R;PV_ACCESS
CPU_MMAP;FCFG1;FLASH_C_E_P_R;A_EXEZ_SETUP
CPU_MMAP;FCFG1;FLASH_C_E_P_R;CVSU
CPU_MMAP;FCFG1;FLASH_P_R_PV
CPU_MMAP;FCFG1;FLASH_P_R_PV;PH
CPU_MMAP;FCFG1;FLASH_P_R_PV;RH
CPU_MMAP;FCFG1;FLASH_P_R_PV;PVH
CPU_MMAP;FCFG1;FLASH_P_R_PV;PVH2
CPU_MMAP;FCFG1;FLASH_EH_SEQ
CPU_MMAP;FCFG1;FLASH_EH_SEQ;EH
CPU_MMAP;FCFG1;FLASH_EH_SEQ;SEQ
CPU_MMAP;FCFG1;FLASH_EH_SEQ;VSTAT
CPU_MMAP;FCFG1;FLASH_EH_SEQ;SM_FREQUENCY
CPU_MMAP;FCFG1;FLASH_VHV_E
CPU_MMAP;FCFG1;FLASH_VHV_E;VHV_E_START
CPU_MMAP;FCFG1;FLASH_VHV_E;VHV_E_STEP_HIGHT
CPU_MMAP;FCFG1;FLASH_PP
CPU_MMAP;FCFG1;FLASH_PP;PUMP_SU
CPU_MMAP;FCFG1;FLASH_PP;RESERVED
CPU_MMAP;FCFG1;FLASH_PP;MAX_PP
CPU_MMAP;FCFG1;FLASH_PROG_EP
CPU_MMAP;FCFG1;FLASH_PROG_EP;MAX_EP
CPU_MMAP;FCFG1;FLASH_PROG_EP;PROGRAM_PW
CPU_MMAP;FCFG1;FLASH_ERA_PW
CPU_MMAP;FCFG1;FLASH_ERA_PW;ERASE_PW
CPU_MMAP;FCFG1;FLASH_VHV
CPU_MMAP;FCFG1;FLASH_VHV;RESERVED3
CPU_MMAP;FCFG1;FLASH_VHV;TRIM13_P
CPU_MMAP;FCFG1;FLASH_VHV;RESERVED2
CPU_MMAP;FCFG1;FLASH_VHV;VHV_P
CPU_MMAP;FCFG1;FLASH_VHV;RESERVED1
CPU_MMAP;FCFG1;FLASH_VHV;TRIM13_E
CPU_MMAP;FCFG1;FLASH_VHV;RESERVED0
CPU_MMAP;FCFG1;FLASH_VHV;VHV_E
CPU_MMAP;FCFG1;FLASH_VHV_PV
CPU_MMAP;FCFG1;FLASH_VHV_PV;RESERVED1
CPU_MMAP;FCFG1;FLASH_VHV_PV;TRIM13_PV
CPU_MMAP;FCFG1;FLASH_VHV_PV;RESERVED0
CPU_MMAP;FCFG1;FLASH_VHV_PV;VHV_PV
CPU_MMAP;FCFG1;FLASH_VHV_PV;VCG2P5
CPU_MMAP;FCFG1;FLASH_VHV_PV;VINH
CPU_MMAP;FCFG1;FLASH_V
CPU_MMAP;FCFG1;FLASH_V;VSL_P
CPU_MMAP;FCFG1;FLASH_V;VWL_P
CPU_MMAP;FCFG1;FLASH_V;V_READ
CPU_MMAP;FCFG1;FLASH_V;RESERVED
CPU_MMAP;FCFG1;USER_ID
CPU_MMAP;FCFG1;USER_ID;PG_REV
CPU_MMAP;FCFG1;USER_ID;VER
CPU_MMAP;FCFG1;USER_ID;RESERVED1
CPU_MMAP;FCFG1;USER_ID;BAW
CPU_MMAP;FCFG1;USER_ID;ANT
CPU_MMAP;FCFG1;USER_ID;SEQUENCE
CPU_MMAP;FCFG1;USER_ID;PKG
CPU_MMAP;FCFG1;USER_ID;PROTOCOL
CPU_MMAP;FCFG1;USER_ID;RESERVED0
CPU_MMAP;FCFG1;FLASH_OTP_DATA1
CPU_MMAP;FCFG1;FLASH_OTP_DATA1;SAMPLE_PERIODE
CPU_MMAP;FCFG1;FLASH_OTP_DATA1;WAITSTATES
CPU_MMAP;FCFG1;FLASH_OTP_DATA2
CPU_MMAP;FCFG1;FLASH_OTP_DATA2;PRE_SAMPLE
CPU_MMAP;FCFG1;FLASH_OTP_DATA2;SAMHOLD_SA
CPU_MMAP;FCFG1;FLASH_OTP_DATA2;SAMHOLD_SU
CPU_MMAP;FCFG1;FLASH_OTP_DATA2;RESERVED2
CPU_MMAP;FCFG1;FLASH_OTP_DATA2;ENABLE_SWINTF
CPU_MMAP;FCFG1;FLASH_OTP_DATA2;PROTECTCFG_N
CPU_MMAP;FCFG1;FLASH_OTP_DATA2;RESERVED1
CPU_MMAP;FCFG1;FLASH_OTP_DATA3
CPU_MMAP;FCFG1;FLASH_OTP_DATA3;EC_STEP_SIZE
CPU_MMAP;FCFG1;FLASH_OTP_DATA3;DO_PRECOND
CPU_MMAP;FCFG1;FLASH_OTP_DATA3;MAX_EC_LEVEL
CPU_MMAP;FCFG1;FLASH_OTP_DATA3;TRIM_1P7
CPU_MMAP;FCFG1;FLASH_OTP_DATA3;FLASH_SIZE
CPU_MMAP;FCFG1;FLASH_OTP_DATA3;WAIT_SYSCODE
CPU_MMAP;FCFG1;MAC_BLE_0
CPU_MMAP;FCFG1;MAC_BLE_0;ADDR_0_31
CPU_MMAP;FCFG1;MAC_BLE_1
CPU_MMAP;FCFG1;MAC_BLE_1;ADDR_32_63
CPU_MMAP;FCFG1;MAC_15_4_0
CPU_MMAP;FCFG1;MAC_15_4_0;ADDR_0_31
CPU_MMAP;FCFG1;MAC_15_4_1
CPU_MMAP;FCFG1;MAC_15_4_1;ADDR_32_63
CPU_MMAP;FCFG1;FLASH_OTP_DATA4
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_MODE_SEL_INT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_PW_SEL_INT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_STANDBY_INT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_IDLE_INT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;VIN_AT_X_INT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_MODE_SEL_EXT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_PW_SEL_EXT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_STANDBY_EXT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_IDLE_EXT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;VIN_AT_X_EXT_WRT
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_MODE_SEL_INT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_PW_SEL_INT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_STANDBY_INT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_IDLE_INT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;VIN_AT_X_INT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_MODE_SEL_EXT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;STANDBY_PW_SEL_EXT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_STANDBY_EXT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;DIS_IDLE_EXT_RD
CPU_MMAP;FCFG1;FLASH_OTP_DATA4;VIN_AT_X_EXT_RD
CPU_MMAP;FCFG1;MISC_TRIM
CPU_MMAP;FCFG1;MISC_TRIM;RESERVED
CPU_MMAP;FCFG1;MISC_TRIM;TEMPVSLOPE
CPU_MMAP;FCFG1;RCOSC_HF_TEMPCOMP
CPU_MMAP;FCFG1;RCOSC_HF_TEMPCOMP;FINE_RESISTOR
CPU_MMAP;FCFG1;RCOSC_HF_TEMPCOMP;CTRIM
CPU_MMAP;FCFG1;RCOSC_HF_TEMPCOMP;CTRIMFRACT_QUAD
CPU_MMAP;FCFG1;RCOSC_HF_TEMPCOMP;CTRIMFRACT_SLOPE
CPU_MMAP;FCFG1;TRIM_CAL_REVISION
CPU_MMAP;FCFG1;TRIM_CAL_REVISION;FT1
CPU_MMAP;FCFG1;TRIM_CAL_REVISION;MP1
CPU_MMAP;FCFG1;ICEPICK_DEVICE_ID
CPU_MMAP;FCFG1;ICEPICK_DEVICE_ID;PG_REV
CPU_MMAP;FCFG1;ICEPICK_DEVICE_ID;WAFER_ID
CPU_MMAP;FCFG1;ICEPICK_DEVICE_ID;MANUFACTURER_ID
CPU_MMAP;FCFG1;FCFG1_REVISION
CPU_MMAP;FCFG1;FCFG1_REVISION;REV
CPU_MMAP;FCFG1;MISC_OTP_DATA
CPU_MMAP;FCFG1;MISC_OTP_DATA;RCOSC_HF_ITUNE
CPU_MMAP;FCFG1;MISC_OTP_DATA;RCOSC_HF_CRIM
CPU_MMAP;FCFG1;MISC_OTP_DATA;PER_M
CPU_MMAP;FCFG1;MISC_OTP_DATA;PER_E
CPU_MMAP;FCFG1;MISC_OTP_DATA;PO_TAIL_RES_TRIM
CPU_MMAP;FCFG1;MISC_OTP_DATA;TEST_PROGRAM_REV
CPU_MMAP;FCFG1;IOCONF
CPU_MMAP;FCFG1;IOCONF;RESERVED
CPU_MMAP;FCFG1;IOCONF;PADLOCK_N
CPU_MMAP;FCFG1;IOCONF;GPIO_CNT
CPU_MMAP;FCFG1;CONFIG_IF_ADC
CPU_MMAP;FCFG1;CONFIG_IF_ADC;FF2ADJ
CPU_MMAP;FCFG1;CONFIG_IF_ADC;FF3ADJ
CPU_MMAP;FCFG1;CONFIG_IF_ADC;INT3ADJ
CPU_MMAP;FCFG1;CONFIG_IF_ADC;FF1ADJ
CPU_MMAP;FCFG1;CONFIG_IF_ADC;AAFCAP
CPU_MMAP;FCFG1;CONFIG_IF_ADC;INT2ADJ
CPU_MMAP;FCFG1;CONFIG_IF_ADC;IFDIGLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_IF_ADC;IFANALDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_OSC_TOP
CPU_MMAP;FCFG1;CONFIG_OSC_TOP;RESERVED
CPU_MMAP;FCFG1;CONFIG_OSC_TOP;XOSC_HF_ROW_Q12
CPU_MMAP;FCFG1;CONFIG_OSC_TOP;XOSC_HF_COLUMN_Q12
CPU_MMAP;FCFG1;CONFIG_OSC_TOP;RCOSCLF_CTUNE_TRIM
CPU_MMAP;FCFG1;CONFIG_OSC_TOP;RCOSCLF_RTUNE_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND;IFAMP_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND;LNA_IB
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND;IFAMP_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND;CTL_PA0_TRIM
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND;PATRIMCOMPLETE_N
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND;RESERVED
CPU_MMAP;FCFG1;CONFIG_RF_FRONTEND;RFLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH
CPU_MMAP;FCFG1;CONFIG_SYNTH;RESERVED
CPU_MMAP;FCFG1;CONFIG_SYNTH;RFC_MDM_DEMIQMC0
CPU_MMAP;FCFG1;CONFIG_SYNTH;LDOVCO_TRIM_OUTPUT
CPU_MMAP;FCFG1;CONFIG_SYNTH;SLDO_TRIM_OUTPUT
CPU_MMAP;FCFG1;SOC_ADC_ABS_GAIN
CPU_MMAP;FCFG1;SOC_ADC_ABS_GAIN;SOC_ADC_ABS_GAIN_TEMP2
CPU_MMAP;FCFG1;SOC_ADC_ABS_GAIN;SOC_ADC_ABS_GAIN_TEMP1
CPU_MMAP;FCFG1;SOC_ADC_REL_GAIN
CPU_MMAP;FCFG1;SOC_ADC_REL_GAIN;SOC_ADC_REL_GAIN_TEMP2
CPU_MMAP;FCFG1;SOC_ADC_REL_GAIN;SOC_ADC_REL_GAIN_TEMP1
CPU_MMAP;FCFG1;SOC_ADC_EXT_GAIN
CPU_MMAP;FCFG1;SOC_ADC_EXT_GAIN;SOC_ADC_EXT_GAIN_TEMP2
CPU_MMAP;FCFG1;SOC_ADC_EXT_GAIN;SOC_ADC_EXT_GAIN_TEMP1
CPU_MMAP;FCFG1;SOC_ADC_OFFSET_INT
CPU_MMAP;FCFG1;SOC_ADC_OFFSET_INT;SOC_ADC_REL_OFFSET_TEMP2
CPU_MMAP;FCFG1;SOC_ADC_OFFSET_INT;SOC_ADC_REL_OFFSET_TEMP1
CPU_MMAP;FCFG1;SOC_ADC_OFFSET_INT;SOC_ADC_ABS_OFFSET_TEMP2
CPU_MMAP;FCFG1;SOC_ADC_OFFSET_INT;SOC_ADC_ABS_OFFSET_TEMP1
CPU_MMAP;FCFG1;SOC_ADC_REF_TRIM_AND_OFFSET_EXT
CPU_MMAP;FCFG1;SOC_ADC_REF_TRIM_AND_OFFSET_EXT;SOC_ADC_EXT_OFFSET_TEMP2
CPU_MMAP;FCFG1;SOC_ADC_REF_TRIM_AND_OFFSET_EXT;SOC_ADC_EXT_OFFSET_TEMP1
CPU_MMAP;FCFG1;SOC_ADC_REF_TRIM_AND_OFFSET_EXT;TEST_TEMP_INDEX2
CPU_MMAP;FCFG1;SOC_ADC_REF_TRIM_AND_OFFSET_EXT;SOC_ADC_REF_VOLTAGE_TRIM_TEMP2
CPU_MMAP;FCFG1;SOC_ADC_REF_TRIM_AND_OFFSET_EXT;TEST_TEMP_INDEX1
CPU_MMAP;FCFG1;SOC_ADC_REF_TRIM_AND_OFFSET_EXT;SOC_ADC_REF_VOLTAGE_TRIM_TEMP1
CPU_MMAP;FCFG1;AMPCOMP_TH1
CPU_MMAP;FCFG1;AMPCOMP_TH1;RESERVED1
CPU_MMAP;FCFG1;AMPCOMP_TH1;HPMRAMP3_LTH
CPU_MMAP;FCFG1;AMPCOMP_TH1;RESERVED0
CPU_MMAP;FCFG1;AMPCOMP_TH1;HPMRAMP3_HTH
CPU_MMAP;FCFG1;AMPCOMP_TH1;IBIASCAP_LPTOHP_OL_CNT
CPU_MMAP;FCFG1;AMPCOMP_TH1;HPMRAMP1_TH
CPU_MMAP;FCFG1;AMPCOMP_TH2
CPU_MMAP;FCFG1;AMPCOMP_TH2;LPMUPDATE_LTH
CPU_MMAP;FCFG1;AMPCOMP_TH2;RESERVED3
CPU_MMAP;FCFG1;AMPCOMP_TH2;LPMUPDATE_HTM
CPU_MMAP;FCFG1;AMPCOMP_TH2;RESERVED2
CPU_MMAP;FCFG1;AMPCOMP_TH2;ADC_COMP_AMPTH_LPM
CPU_MMAP;FCFG1;AMPCOMP_TH2;RESERVED1
CPU_MMAP;FCFG1;AMPCOMP_TH2;ADC_COMP_AMPTH_HPM
CPU_MMAP;FCFG1;AMPCOMP_TH2;RESERVED0
CPU_MMAP;FCFG1;AMPCOMP_CTRL1
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;RESERVED1
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;AMPCOMP_REQ_MODE
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;RESERVED0
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;IBIAS_OFFSET
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;IBIAS_INIT
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;LPM_IBIAS_WAIT_CNT_FINAL
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;CAP_STEP
CPU_MMAP;FCFG1;AMPCOMP_CTRL1;IBIASCAP_HPTOLP_OL_CNT
CPU_MMAP;FCFG1;ANABYPASS_VALUE2
CPU_MMAP;FCFG1;ANABYPASS_VALUE2;RESERVED
CPU_MMAP;FCFG1;ANABYPASS_VALUE2;XOSC_HF_IBIASTHERM
CPU_MMAP;FCFG1;CONFIG_MISC_ADC
CPU_MMAP;FCFG1;CONFIG_MISC_ADC;RESERVED
CPU_MMAP;FCFG1;CONFIG_MISC_ADC;RSSITRIMCOMPLETE_N
CPU_MMAP;FCFG1;CONFIG_MISC_ADC;RSSI_OFFSET
CPU_MMAP;FCFG1;CONFIG_MISC_ADC;QUANTCTLTHRES
CPU_MMAP;FCFG1;CONFIG_MISC_ADC;DACTRIM
CPU_MMAP;FCFG1;TEST_TEMPS
CPU_MMAP;FCFG1;TEST_TEMPS;TEST_TEMP4
CPU_MMAP;FCFG1;TEST_TEMPS;TEST_TEMP3
CPU_MMAP;FCFG1;TEST_TEMPS;TEST_TEMP2
CPU_MMAP;FCFG1;TEST_TEMPS;TEST_TEMP1
CPU_MMAP;FCFG1;VOLT_TRIM
CPU_MMAP;FCFG1;VOLT_TRIM;RESERVED3
CPU_MMAP;FCFG1;VOLT_TRIM;VDDR_TRIM_HH
CPU_MMAP;FCFG1;VOLT_TRIM;RESERVED2
CPU_MMAP;FCFG1;VOLT_TRIM;VDDR_TRIM_H
CPU_MMAP;FCFG1;VOLT_TRIM;RESERVED1
CPU_MMAP;FCFG1;VOLT_TRIM;VDDR_TRIM_SLEEP_H
CPU_MMAP;FCFG1;VOLT_TRIM;RESERVED0
CPU_MMAP;FCFG1;VOLT_TRIM;TRIMBOD_H
CPU_MMAP;FCFG1;OSC_CONF
CPU_MMAP;FCFG1;OSC_CONF;RESERVED
CPU_MMAP;FCFG1;OSC_CONF;ADC_SH_VBUF_EN
CPU_MMAP;FCFG1;OSC_CONF;ADC_SH_MODE_EN
CPU_MMAP;FCFG1;OSC_CONF;ATESTLF_RCOSCLF_IBIAS_TRIM
CPU_MMAP;FCFG1;OSC_CONF;XOSCLF_REGULATOR_TRIM
CPU_MMAP;FCFG1;OSC_CONF;XOSCLF_CMIRRWR_RATIO
CPU_MMAP;FCFG1;OSC_CONF;XOSC_HF_FAST_START
CPU_MMAP;FCFG1;OSC_CONF;XOSC_OPTION
CPU_MMAP;FCFG1;OSC_CONF;BAW_OPTION
CPU_MMAP;FCFG1;OSC_CONF;BAW_FREQ
CPU_MMAP;FCFG1;OSC_CONF;BAW_TRIM
CPU_MMAP;FCFG1;FREQ_OFFSET
CPU_MMAP;FCFG1;FREQ_OFFSET;BAW_COMP_P0
CPU_MMAP;FCFG1;FREQ_OFFSET;BAW_COMP_P1
CPU_MMAP;FCFG1;FREQ_OFFSET;BAW_COMP_P2
CPU_MMAP;FCFG1;CAP_TRIM
CPU_MMAP;FCFG1;CAP_TRIM;FLUX_CAP_0P28_TRIM
CPU_MMAP;FCFG1;CAP_TRIM;FLUX_CAP_0P4_TRIM
CPU_MMAP;FCFG1;MISC_OTP_DATA_1
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;RESERVED
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;PEAK_DET_ITRIM
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;HP_BUF_ITRIM
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;LP_BUF_ITRIM
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;DBLR_LOOP_FILTER_RESET_VOLTAGE
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;HPM_IBIAS_WAIT_CNT
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;LPM_IBIAS_WAIT_CNT
CPU_MMAP;FCFG1;MISC_OTP_DATA_1;IDAC_STEP
CPU_MMAP;FCFG1;PWD_CURR_20C
CPU_MMAP;FCFG1;PWD_CURR_20C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_20C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_20C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_20C;BASELINE
CPU_MMAP;FCFG1;PWD_CURR_35C
CPU_MMAP;FCFG1;PWD_CURR_35C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_35C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_35C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_35C;BASELINE
CPU_MMAP;FCFG1;PWD_CURR_50C
CPU_MMAP;FCFG1;PWD_CURR_50C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_50C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_50C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_50C;BASELINE
CPU_MMAP;FCFG1;PWD_CURR_65C
CPU_MMAP;FCFG1;PWD_CURR_65C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_65C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_65C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_65C;BASELINE
CPU_MMAP;FCFG1;PWD_CURR_80C
CPU_MMAP;FCFG1;PWD_CURR_80C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_80C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_80C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_80C;BASELINE
CPU_MMAP;FCFG1;PWD_CURR_95C
CPU_MMAP;FCFG1;PWD_CURR_95C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_95C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_95C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_95C;BASELINE
CPU_MMAP;FCFG1;PWD_CURR_110C
CPU_MMAP;FCFG1;PWD_CURR_110C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_110C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_110C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_110C;BASELINE
CPU_MMAP;FCFG1;PWD_CURR_125C
CPU_MMAP;FCFG1;PWD_CURR_125C;DELTA_CACHE_REF
CPU_MMAP;FCFG1;PWD_CURR_125C;DELTA_RFMEM_RET
CPU_MMAP;FCFG1;PWD_CURR_125C;DELTA_XOSC_LPM
CPU_MMAP;FCFG1;PWD_CURR_125C;BASELINE
CPU_MMAP;FCFG2
CPU_MMAP;CCFG
CPU_MMAP;CCFG;MODE_CONF_1
CPU_MMAP;CCFG;MODE_CONF_1;RESERVED
CPU_MMAP;CCFG;MODE_CONF_1;ALT_DCDC_VMIN
CPU_MMAP;CCFG;MODE_CONF_1;ALT_DCDC_DITHER_EN
CPU_MMAP;CCFG;MODE_CONF_1;ALT_DCDC_IPEAK
CPU_MMAP;CCFG;MODE_CONF_1;DELTA_IBIAS_INIT
CPU_MMAP;CCFG;MODE_CONF_1;DELTA_IBIAS_OFFSET
CPU_MMAP;CCFG;MODE_CONF_1;XOSC_MAX_START
CPU_MMAP;CCFG;SIZE_AND_DIS_FLAGS
CPU_MMAP;CCFG;SIZE_AND_DIS_FLAGS;SIZE_OF_CCFG
CPU_MMAP;CCFG;SIZE_AND_DIS_FLAGS;DISABLE_FLAGS
CPU_MMAP;CCFG;SIZE_AND_DIS_FLAGS;DIS_ALT_DCDC_SETTING
CPU_MMAP;CCFG;SIZE_AND_DIS_FLAGS;DIS_XOSC_OVR
CPU_MMAP;CCFG;MODE_CONF
CPU_MMAP;CCFG;MODE_CONF;RESERVED1
CPU_MMAP;CCFG;MODE_CONF;DCDC_RECHARGE
CPU_MMAP;CCFG;MODE_CONF;DCDC_ACTIVE
CPU_MMAP;CCFG;MODE_CONF;VDDR_EXT_LOAD
CPU_MMAP;CCFG;MODE_CONF;VDDS_BOD_LEVEL
CPU_MMAP;CCFG;MODE_CONF;SCLK_LF_OPTION
CPU_MMAP;CCFG;MODE_CONF;RESERVED0
CPU_MMAP;CCFG;MODE_CONF;RTC_COMP
CPU_MMAP;CCFG;MODE_CONF;XOSC_FREQ
CPU_MMAP;CCFG;MODE_CONF;XOSC_CAP_MOD
CPU_MMAP;CCFG;MODE_CONF;HF_COMP
CPU_MMAP;CCFG;MODE_CONF;XOSC_CAPARRAY_DELTA
CPU_MMAP;CCFG;MODE_CONF;VDDR_CAP
CPU_MMAP;CCFG;VOLT_LOAD_0
CPU_MMAP;CCFG;VOLT_LOAD_0;VDDR_EXT_TP45
CPU_MMAP;CCFG;VOLT_LOAD_0;VDDR_EXT_TP25
CPU_MMAP;CCFG;VOLT_LOAD_0;VDDR_EXT_TP5
CPU_MMAP;CCFG;VOLT_LOAD_0;VDDR_EXT_TM15
CPU_MMAP;CCFG;VOLT_LOAD_1
CPU_MMAP;CCFG;VOLT_LOAD_1;VDDR_EXT_TP125
CPU_MMAP;CCFG;VOLT_LOAD_1;VDDR_EXT_TP105
CPU_MMAP;CCFG;VOLT_LOAD_1;VDDR_EXT_TP85
CPU_MMAP;CCFG;VOLT_LOAD_1;VDDR_EXT_TP65
CPU_MMAP;CCFG;RTC_OFFSET
CPU_MMAP;CCFG;RTC_OFFSET;RTC_COMP_P0
CPU_MMAP;CCFG;RTC_OFFSET;RTC_COMP_P1
CPU_MMAP;CCFG;RTC_OFFSET;RTC_COMP_P2
CPU_MMAP;CCFG;FREQ_OFFSET
CPU_MMAP;CCFG;FREQ_OFFSET;HF_COMP_P0
CPU_MMAP;CCFG;FREQ_OFFSET;HF_COMP_P1
CPU_MMAP;CCFG;FREQ_OFFSET;HF_COMP_P2
CPU_MMAP;CCFG;IEEE_MAC_0
CPU_MMAP;CCFG;IEEE_MAC_0;ADDR
CPU_MMAP;CCFG;IEEE_MAC_1
CPU_MMAP;CCFG;IEEE_MAC_1;ADDR
CPU_MMAP;CCFG;IEEE_BLE_0
CPU_MMAP;CCFG;IEEE_BLE_0;ADDR
CPU_MMAP;CCFG;IEEE_BLE_1
CPU_MMAP;CCFG;IEEE_BLE_1;ADDR
CPU_MMAP;CCFG;BL_CONFIG
CPU_MMAP;CCFG;BL_CONFIG;BOOTLOADER_ENABLE
CPU_MMAP;CCFG;BL_CONFIG;RESERVED
CPU_MMAP;CCFG;BL_CONFIG;BL_LEVEL
CPU_MMAP;CCFG;BL_CONFIG;BL_PIN_NUMBER
CPU_MMAP;CCFG;BL_CONFIG;BL_ENABLE
CPU_MMAP;CCFG;ERASE_CONF
CPU_MMAP;CCFG;ERASE_CONF;RESERVED2
CPU_MMAP;CCFG;ERASE_CONF;CHIP_ERASE_DIS_N
CPU_MMAP;CCFG;ERASE_CONF;RESERVED1
CPU_MMAP;CCFG;ERASE_CONF;BANK_ERASE_DIS_N
CPU_MMAP;CCFG;CCFG_TI_OPTIONS
CPU_MMAP;CCFG;CCFG_TI_OPTIONS;RESERVED
CPU_MMAP;CCFG;CCFG_TI_OPTIONS;TI_FA_ENABLE
CPU_MMAP;CCFG;CCFG_TAP_DAP_0
CPU_MMAP;CCFG;CCFG_TAP_DAP_0;RESERVED
CPU_MMAP;CCFG;CCFG_TAP_DAP_0;CPU_DAP_ENABLE
CPU_MMAP;CCFG;CCFG_TAP_DAP_0;PRCM_TAP_ENABLE
CPU_MMAP;CCFG;CCFG_TAP_DAP_0;TEST_TAP_ENABLE
CPU_MMAP;CCFG;CCFG_TAP_DAP_1
CPU_MMAP;CCFG;CCFG_TAP_DAP_1;RESERVED
CPU_MMAP;CCFG;CCFG_TAP_DAP_1;PBIST2_TAP_ENABLE
CPU_MMAP;CCFG;CCFG_TAP_DAP_1;PBIST1_TAP_ENABLE
CPU_MMAP;CCFG;CCFG_TAP_DAP_1;WUC_TAP_ENABLE
CPU_MMAP;CCFG;IMAGE_VALID_CONF
CPU_MMAP;CCFG;IMAGE_VALID_CONF;IMAGE_VALID
CPU_MMAP;CCFG;CCFG_PROT_31_0
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_31
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_30
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_29
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_28
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_27
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_26
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_25
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_24
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_23
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_22
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_21
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_20
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_19
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_18
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_17
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_16
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_15
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_14
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_13
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_12
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_11
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_10
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_9
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_8
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_7
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_6
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_5
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_4
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_3
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_2
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_1
CPU_MMAP;CCFG;CCFG_PROT_31_0;WRT_PROT_SEC_0
CPU_MMAP;CCFG;CCFG_PROT_63_32
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_63
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_62
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_61
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_60
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_59
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_58
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_57
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_56
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_55
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_54
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_53
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_52
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_51
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_50
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_49
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_48
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_47
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_46
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_45
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_44
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_43
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_42
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_41
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_40
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_39
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_38
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_37
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_36
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_35
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_34
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_33
CPU_MMAP;CCFG;CCFG_PROT_63_32;WRT_PROT_SEC_32
CPU_MMAP;CCFG;CCFG_PROT_95_64
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_95
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_94
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_93
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_92
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_91
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_90
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_89
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_88
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_87
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_86
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_85
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_84
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_83
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_82
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_81
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_80
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_79
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_78
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_77
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_76
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_75
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_74
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_73
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_72
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_71
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_70
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_69
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_68
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_67
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_66
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_65
CPU_MMAP;CCFG;CCFG_PROT_95_64;WRT_PROT_SEC_64
CPU_MMAP;CCFG;CCFG_PROT_127_96
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_127
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_126
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_125
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_124
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_123
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_122
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_121
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_120
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_119
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_118
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_117
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_116
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_115
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_114
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_113
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_112
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_111
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_110
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_109
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_108
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_107
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_106
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_105
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_104
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_103
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_102
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_101
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_100
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_99
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_98
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_97
CPU_MMAP;CCFG;CCFG_PROT_127_96;WRT_PROT_SEC_96
CPU_MMAP;CPU_ITM
CPU_MMAP;CPU_ITM;STIM0
CPU_MMAP;CPU_ITM;STIM0;STIM0
CPU_MMAP;CPU_ITM;STIM1
CPU_MMAP;CPU_ITM;STIM1;STIM1
CPU_MMAP;CPU_ITM;STIM2
CPU_MMAP;CPU_ITM;STIM2;STIM2
CPU_MMAP;CPU_ITM;STIM3
CPU_MMAP;CPU_ITM;STIM3;STIM3
CPU_MMAP;CPU_ITM;STIM4
CPU_MMAP;CPU_ITM;STIM4;STIM4
CPU_MMAP;CPU_ITM;STIM5
CPU_MMAP;CPU_ITM;STIM5;STIM5
CPU_MMAP;CPU_ITM;STIM6
CPU_MMAP;CPU_ITM;STIM6;STIM6
CPU_MMAP;CPU_ITM;STIM7
CPU_MMAP;CPU_ITM;STIM7;STIM7
CPU_MMAP;CPU_ITM;STIM8
CPU_MMAP;CPU_ITM;STIM8;STIM8
CPU_MMAP;CPU_ITM;STIM9
CPU_MMAP;CPU_ITM;STIM9;STIM9
CPU_MMAP;CPU_ITM;STIM10
CPU_MMAP;CPU_ITM;STIM10;STIM10
CPU_MMAP;CPU_ITM;STIM11
CPU_MMAP;CPU_ITM;STIM11;STIM11
CPU_MMAP;CPU_ITM;STIM12
CPU_MMAP;CPU_ITM;STIM12;STIM12
CPU_MMAP;CPU_ITM;STIM13
CPU_MMAP;CPU_ITM;STIM13;STIM13
CPU_MMAP;CPU_ITM;STIM14
CPU_MMAP;CPU_ITM;STIM14;STIM14
CPU_MMAP;CPU_ITM;STIM15
CPU_MMAP;CPU_ITM;STIM15;STIM15
CPU_MMAP;CPU_ITM;STIM16
CPU_MMAP;CPU_ITM;STIM16;STIM16
CPU_MMAP;CPU_ITM;STIM17
CPU_MMAP;CPU_ITM;STIM17;STIM17
CPU_MMAP;CPU_ITM;STIM18
CPU_MMAP;CPU_ITM;STIM18;STIM18
CPU_MMAP;CPU_ITM;STIM19
CPU_MMAP;CPU_ITM;STIM19;STIM19
CPU_MMAP;CPU_ITM;STIM20
CPU_MMAP;CPU_ITM;STIM20;STIM20
CPU_MMAP;CPU_ITM;STIM21
CPU_MMAP;CPU_ITM;STIM21;STIM21
CPU_MMAP;CPU_ITM;STIM22
CPU_MMAP;CPU_ITM;STIM22;STIM22
CPU_MMAP;CPU_ITM;STIM23
CPU_MMAP;CPU_ITM;STIM23;STIM23
CPU_MMAP;CPU_ITM;STIM24
CPU_MMAP;CPU_ITM;STIM24;STIM24
CPU_MMAP;CPU_ITM;STIM25
CPU_MMAP;CPU_ITM;STIM25;STIM25
CPU_MMAP;CPU_ITM;STIM26
CPU_MMAP;CPU_ITM;STIM26;STIM26
CPU_MMAP;CPU_ITM;STIM27
CPU_MMAP;CPU_ITM;STIM27;STIM27
CPU_MMAP;CPU_ITM;STIM28
CPU_MMAP;CPU_ITM;STIM28;STIM28
CPU_MMAP;CPU_ITM;STIM29
CPU_MMAP;CPU_ITM;STIM29;STIM29
CPU_MMAP;CPU_ITM;STIM30
CPU_MMAP;CPU_ITM;STIM30;STIM30
CPU_MMAP;CPU_ITM;STIM31
CPU_MMAP;CPU_ITM;STIM31;STIM31
CPU_MMAP;CPU_ITM;TER
CPU_MMAP;CPU_ITM;TER;STIMENA31
CPU_MMAP;CPU_ITM;TER;STIMENA30
CPU_MMAP;CPU_ITM;TER;STIMENA29
CPU_MMAP;CPU_ITM;TER;STIMENA28
CPU_MMAP;CPU_ITM;TER;STIMENA27
CPU_MMAP;CPU_ITM;TER;STIMENA26
CPU_MMAP;CPU_ITM;TER;STIMENA25
CPU_MMAP;CPU_ITM;TER;STIMENA24
CPU_MMAP;CPU_ITM;TER;STIMENA23
CPU_MMAP;CPU_ITM;TER;STIMENA22
CPU_MMAP;CPU_ITM;TER;STIMENA21
CPU_MMAP;CPU_ITM;TER;STIMENA20
CPU_MMAP;CPU_ITM;TER;STIMENA19
CPU_MMAP;CPU_ITM;TER;STIMENA18
CPU_MMAP;CPU_ITM;TER;STIMENA17
CPU_MMAP;CPU_ITM;TER;STIMENA16
CPU_MMAP;CPU_ITM;TER;STIMENA15
CPU_MMAP;CPU_ITM;TER;STIMENA14
CPU_MMAP;CPU_ITM;TER;STIMENA13
CPU_MMAP;CPU_ITM;TER;STIMENA12
CPU_MMAP;CPU_ITM;TER;STIMENA11
CPU_MMAP;CPU_ITM;TER;STIMENA10
CPU_MMAP;CPU_ITM;TER;STIMENA9
CPU_MMAP;CPU_ITM;TER;STIMENA8
CPU_MMAP;CPU_ITM;TER;STIMENA7
CPU_MMAP;CPU_ITM;TER;STIMENA6
CPU_MMAP;CPU_ITM;TER;STIMENA5
CPU_MMAP;CPU_ITM;TER;STIMENA4
CPU_MMAP;CPU_ITM;TER;STIMENA3
CPU_MMAP;CPU_ITM;TER;STIMENA2
CPU_MMAP;CPU_ITM;TER;STIMENA1
CPU_MMAP;CPU_ITM;TER;STIMENA0
CPU_MMAP;CPU_ITM;TPR
CPU_MMAP;CPU_ITM;TPR;RESERVED4
CPU_MMAP;CPU_ITM;TPR;PRIVMASK
CPU_MMAP;CPU_ITM;TCR
CPU_MMAP;CPU_ITM;TCR;RESERVED24
CPU_MMAP;CPU_ITM;TCR;BUSY
CPU_MMAP;CPU_ITM;TCR;ATBID
CPU_MMAP;CPU_ITM;TCR;RESERVED10
CPU_MMAP;CPU_ITM;TCR;TSPRESCALE
CPU_MMAP;CPU_ITM;TCR;TSPRESCALE;NOPRESCALING
CPU_MMAP;CPU_ITM;TCR;TSPRESCALE;DIV4
CPU_MMAP;CPU_ITM;TCR;TSPRESCALE;DIV16
CPU_MMAP;CPU_ITM;TCR;TSPRESCALE;DIV64
CPU_MMAP;CPU_ITM;TCR;RESERVED5
CPU_MMAP;CPU_ITM;TCR;SWOENA
CPU_MMAP;CPU_ITM;TCR;DWTENA
CPU_MMAP;CPU_ITM;TCR;SYNCENA
CPU_MMAP;CPU_ITM;TCR;TSENA
CPU_MMAP;CPU_ITM;TCR;ITMENA
CPU_MMAP;CPU_ITM;LAR
CPU_MMAP;CPU_ITM;LAR;LOCK_ACCESS
CPU_MMAP;CPU_ITM;LSR
CPU_MMAP;CPU_ITM;LSR;RESERVED3
CPU_MMAP;CPU_ITM;LSR;BYTEACC
CPU_MMAP;CPU_ITM;LSR;ACCESS
CPU_MMAP;CPU_ITM;LSR;PRESENT
CPU_MMAP;CPU_DWT
CPU_MMAP;CPU_DWT;CTRL
CPU_MMAP;CPU_DWT;CTRL;RESERVED26
CPU_MMAP;CPU_DWT;CTRL;NOCYCCNT
CPU_MMAP;CPU_DWT;CTRL;NOPRFCNT
CPU_MMAP;CPU_DWT;CTRL;RESERVED23
CPU_MMAP;CPU_DWT;CTRL;CYCEVTENA
CPU_MMAP;CPU_DWT;CTRL;FOLDEVTENA
CPU_MMAP;CPU_DWT;CTRL;LSUEVTENA
CPU_MMAP;CPU_DWT;CTRL;SLEEPEVTENA
CPU_MMAP;CPU_DWT;CTRL;EXCEVTENA
CPU_MMAP;CPU_DWT;CTRL;CPIEVTENA
CPU_MMAP;CPU_DWT;CTRL;EXCTRCENA
CPU_MMAP;CPU_DWT;CTRL;RESERVED13
CPU_MMAP;CPU_DWT;CTRL;PCSAMPLEENA
CPU_MMAP;CPU_DWT;CTRL;SYNCTAP
CPU_MMAP;CPU_DWT;CTRL;SYNCTAP;DIS
CPU_MMAP;CPU_DWT;CTRL;SYNCTAP;BIT24
CPU_MMAP;CPU_DWT;CTRL;SYNCTAP;BIT26
CPU_MMAP;CPU_DWT;CTRL;SYNCTAP;BIT28
CPU_MMAP;CPU_DWT;CTRL;CYCTAP
CPU_MMAP;CPU_DWT;CTRL;CYCTAP;BIT6
CPU_MMAP;CPU_DWT;CTRL;CYCTAP;BIT10
CPU_MMAP;CPU_DWT;CTRL;POSTCNT
CPU_MMAP;CPU_DWT;CTRL;POSTPRESET
CPU_MMAP;CPU_DWT;CTRL;CYCCNTENA
CPU_MMAP;CPU_DWT;CYCCNT
CPU_MMAP;CPU_DWT;CYCCNT;CYCCNT
CPU_MMAP;CPU_DWT;CPICNT
CPU_MMAP;CPU_DWT;CPICNT;RESERVED8
CPU_MMAP;CPU_DWT;CPICNT;CPICNT
CPU_MMAP;CPU_DWT;EXCCNT
CPU_MMAP;CPU_DWT;EXCCNT;RESERVED8
CPU_MMAP;CPU_DWT;EXCCNT;EXCCNT
CPU_MMAP;CPU_DWT;SLEEPCNT
CPU_MMAP;CPU_DWT;SLEEPCNT;RESERVED8
CPU_MMAP;CPU_DWT;SLEEPCNT;SLEEPCNT
CPU_MMAP;CPU_DWT;LSUCNT
CPU_MMAP;CPU_DWT;LSUCNT;RESERVED8
CPU_MMAP;CPU_DWT;LSUCNT;LSUCNT
CPU_MMAP;CPU_DWT;FOLDCNT
CPU_MMAP;CPU_DWT;FOLDCNT;RESERVED8
CPU_MMAP;CPU_DWT;FOLDCNT;FOLDCNT
CPU_MMAP;CPU_DWT;PCSR
CPU_MMAP;CPU_DWT;PCSR;EIASAMPLE
CPU_MMAP;CPU_DWT;COMP0
CPU_MMAP;CPU_DWT;COMP0;COMP
CPU_MMAP;CPU_DWT;MASK0
CPU_MMAP;CPU_DWT;MASK0;RESERVED4
CPU_MMAP;CPU_DWT;MASK0;MASK
CPU_MMAP;CPU_DWT;FUNCTION0
CPU_MMAP;CPU_DWT;FUNCTION0;RESERVED25
CPU_MMAP;CPU_DWT;FUNCTION0;MATCHED
CPU_MMAP;CPU_DWT;FUNCTION0;RESERVED8
CPU_MMAP;CPU_DWT;FUNCTION0;CYCMATCH
CPU_MMAP;CPU_DWT;FUNCTION0;RESERVED6
CPU_MMAP;CPU_DWT;FUNCTION0;EMITRANGE
CPU_MMAP;CPU_DWT;FUNCTION0;RESERVED4
CPU_MMAP;CPU_DWT;FUNCTION0;FUNCTION
CPU_MMAP;CPU_DWT;COMP1
CPU_MMAP;CPU_DWT;COMP1;COMP
CPU_MMAP;CPU_DWT;MASK1
CPU_MMAP;CPU_DWT;MASK1;RESERVED4
CPU_MMAP;CPU_DWT;MASK1;MASK
CPU_MMAP;CPU_DWT;FUNCTION1
CPU_MMAP;CPU_DWT;FUNCTION1;RESERVED25
CPU_MMAP;CPU_DWT;FUNCTION1;MATCHED
CPU_MMAP;CPU_DWT;FUNCTION1;RESERVED20
CPU_MMAP;CPU_DWT;FUNCTION1;DATAVADDR1
CPU_MMAP;CPU_DWT;FUNCTION1;DATAVADDR0
CPU_MMAP;CPU_DWT;FUNCTION1;DATAVSIZE
CPU_MMAP;CPU_DWT;FUNCTION1;LNK1ENA
CPU_MMAP;CPU_DWT;FUNCTION1;DATAVMATCH
CPU_MMAP;CPU_DWT;FUNCTION1;RESERVED6
CPU_MMAP;CPU_DWT;FUNCTION1;EMITRANGE
CPU_MMAP;CPU_DWT;FUNCTION1;RESERVED4
CPU_MMAP;CPU_DWT;FUNCTION1;FUNCTION
CPU_MMAP;CPU_DWT;COMP2
CPU_MMAP;CPU_DWT;COMP2;COMP
CPU_MMAP;CPU_DWT;MASK2
CPU_MMAP;CPU_DWT;MASK2;RESERVED4
CPU_MMAP;CPU_DWT;MASK2;MASK
CPU_MMAP;CPU_DWT;FUNCTION2
CPU_MMAP;CPU_DWT;FUNCTION2;RESERVED25
CPU_MMAP;CPU_DWT;FUNCTION2;MATCHED
CPU_MMAP;CPU_DWT;FUNCTION2;RESERVED6
CPU_MMAP;CPU_DWT;FUNCTION2;EMITRANGE
CPU_MMAP;CPU_DWT;FUNCTION2;RESERVED4
CPU_MMAP;CPU_DWT;FUNCTION2;FUNCTION
CPU_MMAP;CPU_DWT;COMP3
CPU_MMAP;CPU_DWT;COMP3;COMP
CPU_MMAP;CPU_DWT;MASK3
CPU_MMAP;CPU_DWT;MASK3;RESERVED4
CPU_MMAP;CPU_DWT;MASK3;MASK
CPU_MMAP;CPU_DWT;FUNCTION3
CPU_MMAP;CPU_DWT;FUNCTION3;RESERVED25
CPU_MMAP;CPU_DWT;FUNCTION3;MATCHED
CPU_MMAP;CPU_DWT;FUNCTION3;RESERVED6
CPU_MMAP;CPU_DWT;FUNCTION3;EMITRANGE
CPU_MMAP;CPU_DWT;FUNCTION3;RESERVED4
CPU_MMAP;CPU_DWT;FUNCTION3;FUNCTION
CPU_MMAP;CPU_FPB
CPU_MMAP;CPU_FPB;CTRL
CPU_MMAP;CPU_FPB;CTRL;RESERVED14
CPU_MMAP;CPU_FPB;CTRL;NUM_CODE2
CPU_MMAP;CPU_FPB;CTRL;NUM_LIT
CPU_MMAP;CPU_FPB;CTRL;NUM_CODE1
CPU_MMAP;CPU_FPB;CTRL;RESERVED2
CPU_MMAP;CPU_FPB;CTRL;KEY
CPU_MMAP;CPU_FPB;CTRL;ENABLE
CPU_MMAP;CPU_FPB;REMAP
CPU_MMAP;CPU_FPB;REMAP;RESERVED29
CPU_MMAP;CPU_FPB;REMAP;REMAP
CPU_MMAP;CPU_FPB;REMAP;RESERVED0
CPU_MMAP;CPU_FPB;COMP0
CPU_MMAP;CPU_FPB;COMP0;REPLACE
CPU_MMAP;CPU_FPB;COMP0;RESERVED29
CPU_MMAP;CPU_FPB;COMP0;COMP
CPU_MMAP;CPU_FPB;COMP0;RESERVED1
CPU_MMAP;CPU_FPB;COMP0;ENABLE
CPU_MMAP;CPU_FPB;COMP1
CPU_MMAP;CPU_FPB;COMP1;REPLACE
CPU_MMAP;CPU_FPB;COMP1;RESERVED29
CPU_MMAP;CPU_FPB;COMP1;COMP
CPU_MMAP;CPU_FPB;COMP1;RESERVED1
CPU_MMAP;CPU_FPB;COMP1;ENABLE
CPU_MMAP;CPU_FPB;COMP2
CPU_MMAP;CPU_FPB;COMP2;REPLACE
CPU_MMAP;CPU_FPB;COMP2;RESERVED29
CPU_MMAP;CPU_FPB;COMP2;COMP
CPU_MMAP;CPU_FPB;COMP2;RESERVED1
CPU_MMAP;CPU_FPB;COMP2;ENABLE
CPU_MMAP;CPU_FPB;COMP3
CPU_MMAP;CPU_FPB;COMP3;REPLACE
CPU_MMAP;CPU_FPB;COMP3;RESERVED29
CPU_MMAP;CPU_FPB;COMP3;COMP
CPU_MMAP;CPU_FPB;COMP3;RESERVED1
CPU_MMAP;CPU_FPB;COMP3;ENABLE
CPU_MMAP;CPU_FPB;COMP4
CPU_MMAP;CPU_FPB;COMP4;REPLACE
CPU_MMAP;CPU_FPB;COMP4;RESERVED29
CPU_MMAP;CPU_FPB;COMP4;COMP
CPU_MMAP;CPU_FPB;COMP4;RESERVED1
CPU_MMAP;CPU_FPB;COMP4;ENABLE
CPU_MMAP;CPU_FPB;COMP5
CPU_MMAP;CPU_FPB;COMP5;REPLACE
CPU_MMAP;CPU_FPB;COMP5;RESERVED29
CPU_MMAP;CPU_FPB;COMP5;COMP
CPU_MMAP;CPU_FPB;COMP5;RESERVED1
CPU_MMAP;CPU_FPB;COMP5;ENABLE
CPU_MMAP;CPU_FPB;COMP6
CPU_MMAP;CPU_FPB;COMP6;REPLACE
CPU_MMAP;CPU_FPB;COMP6;RESERVED29
CPU_MMAP;CPU_FPB;COMP6;COMP
CPU_MMAP;CPU_FPB;COMP6;RESERVED1
CPU_MMAP;CPU_FPB;COMP6;ENABLE
CPU_MMAP;CPU_FPB;COMP7
CPU_MMAP;CPU_FPB;COMP7;REPLACE
CPU_MMAP;CPU_FPB;COMP7;RESERVED29
CPU_MMAP;CPU_FPB;COMP7;COMP
CPU_MMAP;CPU_FPB;COMP7;RESERVED1
CPU_MMAP;CPU_FPB;COMP7;ENABLE
CPU_MMAP;CPU_SCS
CPU_MMAP;CPU_SCS;ICTR
CPU_MMAP;CPU_SCS;ICTR;RESERVED3
CPU_MMAP;CPU_SCS;ICTR;INTLINESNUM
CPU_MMAP;CPU_SCS;ACTLR
CPU_MMAP;CPU_SCS;ACTLR;RESERVED3
CPU_MMAP;CPU_SCS;ACTLR;DISFOLD
CPU_MMAP;CPU_SCS;ACTLR;DISDEFWBUF
CPU_MMAP;CPU_SCS;ACTLR;DISMCYCINT
CPU_MMAP;CPU_SCS;STCSR
CPU_MMAP;CPU_SCS;STCSR;RESERVED17
CPU_MMAP;CPU_SCS;STCSR;COUNTFLAG
CPU_MMAP;CPU_SCS;STCSR;RESERVED3
CPU_MMAP;CPU_SCS;STCSR;CLKSOURCE
CPU_MMAP;CPU_SCS;STCSR;TICKINT
CPU_MMAP;CPU_SCS;STCSR;ENABLE
CPU_MMAP;CPU_SCS;STRVR
CPU_MMAP;CPU_SCS;STRVR;RESERVED24
CPU_MMAP;CPU_SCS;STRVR;RELOAD
CPU_MMAP;CPU_SCS;STCVR
CPU_MMAP;CPU_SCS;STCVR;RESERVED24
CPU_MMAP;CPU_SCS;STCVR;CURRENT
CPU_MMAP;CPU_SCS;STCR
CPU_MMAP;CPU_SCS;STCR;NOREF
CPU_MMAP;CPU_SCS;STCR;SKEW
CPU_MMAP;CPU_SCS;STCR;RESERVED24
CPU_MMAP;CPU_SCS;STCR;TENMS
CPU_MMAP;CPU_SCS;NVIC_ISER0
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA31
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA30
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA29
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA28
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA27
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA26
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA25
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA24
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA23
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA22
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA21
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA20
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA19
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA18
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA17
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA16
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA15
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA14
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA13
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA12
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA11
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA10
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA9
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA8
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA7
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA6
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA5
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA4
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA3
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA2
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA1
CPU_MMAP;CPU_SCS;NVIC_ISER0;SETENA0
CPU_MMAP;CPU_SCS;NVIC_ISER1
CPU_MMAP;CPU_SCS;NVIC_ISER1;RESERVED2
CPU_MMAP;CPU_SCS;NVIC_ISER1;SETENA33
CPU_MMAP;CPU_SCS;NVIC_ISER1;SETENA32
CPU_MMAP;CPU_SCS;NVIC_ICER0
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA31
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA30
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA29
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA28
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA27
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA26
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA25
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA24
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA23
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA22
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA21
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA20
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA19
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA18
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA17
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA16
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA15
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA14
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA13
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA12
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA11
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA10
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA9
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA8
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA7
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA6
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA5
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA4
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA3
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA2
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA1
CPU_MMAP;CPU_SCS;NVIC_ICER0;CLRENA0
CPU_MMAP;CPU_SCS;NVIC_ICER1
CPU_MMAP;CPU_SCS;NVIC_ICER1;RESERVED2
CPU_MMAP;CPU_SCS;NVIC_ICER1;CLRENA33
CPU_MMAP;CPU_SCS;NVIC_ICER1;CLRENA32
CPU_MMAP;CPU_SCS;NVIC_ISPR0
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND31
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND30
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND29
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND28
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND27
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND26
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND25
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND24
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND23
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND22
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND21
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND20
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND19
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND18
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND17
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND16
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND15
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND14
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND13
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND12
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND11
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND10
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND9
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND8
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND7
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND6
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND5
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND4
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND3
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND2
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND1
CPU_MMAP;CPU_SCS;NVIC_ISPR0;SETPEND0
CPU_MMAP;CPU_SCS;NVIC_ISPR1
CPU_MMAP;CPU_SCS;NVIC_ISPR1;RESERVED2
CPU_MMAP;CPU_SCS;NVIC_ISPR1;SETPEND33
CPU_MMAP;CPU_SCS;NVIC_ISPR1;SETPEND32
CPU_MMAP;CPU_SCS;NVIC_ICPR0
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND31
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND30
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND29
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND28
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND27
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND26
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND25
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND24
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND23
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND22
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND21
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND20
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND19
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND18
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND17
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND16
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND15
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND14
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND13
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND12
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND11
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND10
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND9
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND8
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND7
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND6
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND5
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND4
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND3
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND2
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND1
CPU_MMAP;CPU_SCS;NVIC_ICPR0;CLRPEND0
CPU_MMAP;CPU_SCS;NVIC_ICPR1
CPU_MMAP;CPU_SCS;NVIC_ICPR1;RESERVED2
CPU_MMAP;CPU_SCS;NVIC_ICPR1;CLRPEND33
CPU_MMAP;CPU_SCS;NVIC_ICPR1;CLRPEND32
CPU_MMAP;CPU_SCS;NVIC_IABR0
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE31
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE30
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE29
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE28
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE27
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE26
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE25
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE24
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE23
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE22
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE21
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE20
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE19
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE18
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE17
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE16
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE15
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE14
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE13
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE12
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE11
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE10
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE9
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE8
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE7
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE6
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE5
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE4
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE3
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE2
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE1
CPU_MMAP;CPU_SCS;NVIC_IABR0;ACTIVE0
CPU_MMAP;CPU_SCS;NVIC_IABR1
CPU_MMAP;CPU_SCS;NVIC_IABR1;RESERVED2
CPU_MMAP;CPU_SCS;NVIC_IABR1;ACTIVE33
CPU_MMAP;CPU_SCS;NVIC_IABR1;ACTIVE32
CPU_MMAP;CPU_SCS;NVIC_IPR0
CPU_MMAP;CPU_SCS;NVIC_IPR0;PRI_3
CPU_MMAP;CPU_SCS;NVIC_IPR0;PRI_2
CPU_MMAP;CPU_SCS;NVIC_IPR0;PRI_1
CPU_MMAP;CPU_SCS;NVIC_IPR0;PRI_0
CPU_MMAP;CPU_SCS;NVIC_IPR1
CPU_MMAP;CPU_SCS;NVIC_IPR1;PRI_7
CPU_MMAP;CPU_SCS;NVIC_IPR1;PRI_6
CPU_MMAP;CPU_SCS;NVIC_IPR1;PRI_5
CPU_MMAP;CPU_SCS;NVIC_IPR1;PRI_4
CPU_MMAP;CPU_SCS;NVIC_IPR2
CPU_MMAP;CPU_SCS;NVIC_IPR2;PRI_11
CPU_MMAP;CPU_SCS;NVIC_IPR2;PRI_10
CPU_MMAP;CPU_SCS;NVIC_IPR2;PRI_9
CPU_MMAP;CPU_SCS;NVIC_IPR2;PRI_8
CPU_MMAP;CPU_SCS;NVIC_IPR3
CPU_MMAP;CPU_SCS;NVIC_IPR3;PRI_15
CPU_MMAP;CPU_SCS;NVIC_IPR3;PRI_14
CPU_MMAP;CPU_SCS;NVIC_IPR3;PRI_13
CPU_MMAP;CPU_SCS;NVIC_IPR3;PRI_12
CPU_MMAP;CPU_SCS;NVIC_IPR4
CPU_MMAP;CPU_SCS;NVIC_IPR4;PRI_19
CPU_MMAP;CPU_SCS;NVIC_IPR4;PRI_18
CPU_MMAP;CPU_SCS;NVIC_IPR4;PRI_17
CPU_MMAP;CPU_SCS;NVIC_IPR4;PRI_16
CPU_MMAP;CPU_SCS;NVIC_IPR5
CPU_MMAP;CPU_SCS;NVIC_IPR5;PRI_23
CPU_MMAP;CPU_SCS;NVIC_IPR5;PRI_22
CPU_MMAP;CPU_SCS;NVIC_IPR5;PRI_21
CPU_MMAP;CPU_SCS;NVIC_IPR5;PRI_20
CPU_MMAP;CPU_SCS;NVIC_IPR6
CPU_MMAP;CPU_SCS;NVIC_IPR6;PRI_27
CPU_MMAP;CPU_SCS;NVIC_IPR6;PRI_26
CPU_MMAP;CPU_SCS;NVIC_IPR6;PRI_25
CPU_MMAP;CPU_SCS;NVIC_IPR6;PRI_24
CPU_MMAP;CPU_SCS;NVIC_IPR7
CPU_MMAP;CPU_SCS;NVIC_IPR7;PRI_31
CPU_MMAP;CPU_SCS;NVIC_IPR7;PRI_30
CPU_MMAP;CPU_SCS;NVIC_IPR7;PRI_29
CPU_MMAP;CPU_SCS;NVIC_IPR7;PRI_28
CPU_MMAP;CPU_SCS;NVIC_IPR8
CPU_MMAP;CPU_SCS;NVIC_IPR8;RESERVED16
CPU_MMAP;CPU_SCS;NVIC_IPR8;PRI_33
CPU_MMAP;CPU_SCS;NVIC_IPR8;PRI_32
CPU_MMAP;CPU_SCS;CPUID
CPU_MMAP;CPU_SCS;CPUID;IMPLEMENTER
CPU_MMAP;CPU_SCS;CPUID;VARIANT
CPU_MMAP;CPU_SCS;CPUID;CONSTANT
CPU_MMAP;CPU_SCS;CPUID;PARTNO
CPU_MMAP;CPU_SCS;CPUID;REVISION
CPU_MMAP;CPU_SCS;ICSR
CPU_MMAP;CPU_SCS;ICSR;NMIPENDSET
CPU_MMAP;CPU_SCS;ICSR;RESERVED29
CPU_MMAP;CPU_SCS;ICSR;PENDSVSET
CPU_MMAP;CPU_SCS;ICSR;PENDSVCLR
CPU_MMAP;CPU_SCS;ICSR;PENDSTSET
CPU_MMAP;CPU_SCS;ICSR;PENDSTCLR
CPU_MMAP;CPU_SCS;ICSR;RESERVED24
CPU_MMAP;CPU_SCS;ICSR;ISRPREEMPT
CPU_MMAP;CPU_SCS;ICSR;ISRPENDING
CPU_MMAP;CPU_SCS;ICSR;RESERVED18
CPU_MMAP;CPU_SCS;ICSR;VECTPENDING
CPU_MMAP;CPU_SCS;ICSR;RETTOBASE
CPU_MMAP;CPU_SCS;ICSR;RESERVED9
CPU_MMAP;CPU_SCS;ICSR;VECTACTIVE
CPU_MMAP;CPU_SCS;VTOR
CPU_MMAP;CPU_SCS;VTOR;RESERVED30
CPU_MMAP;CPU_SCS;VTOR;TBLOFF
CPU_MMAP;CPU_SCS;VTOR;RESERVED0
CPU_MMAP;CPU_SCS;AIRCR
CPU_MMAP;CPU_SCS;AIRCR;VECTKEY
CPU_MMAP;CPU_SCS;AIRCR;ENDIANESS
CPU_MMAP;CPU_SCS;AIRCR;ENDIANESS;LITTLE
CPU_MMAP;CPU_SCS;AIRCR;ENDIANESS;BIG
CPU_MMAP;CPU_SCS;AIRCR;RESERVED11
CPU_MMAP;CPU_SCS;AIRCR;PRIGROUP
CPU_MMAP;CPU_SCS;AIRCR;RESERVED3
CPU_MMAP;CPU_SCS;AIRCR;SYSRESETREQ
CPU_MMAP;CPU_SCS;AIRCR;VECTCLRACTIVE
CPU_MMAP;CPU_SCS;AIRCR;VECTRESET
CPU_MMAP;CPU_SCS;SCR
CPU_MMAP;CPU_SCS;SCR;RESERVED5
CPU_MMAP;CPU_SCS;SCR;SEVONPEND
CPU_MMAP;CPU_SCS;SCR;RESERVED3
CPU_MMAP;CPU_SCS;SCR;SLEEPDEEP
CPU_MMAP;CPU_SCS;SCR;SLEEPDEEP;SLEEP
CPU_MMAP;CPU_SCS;SCR;SLEEPDEEP;DEEPSLEEP
CPU_MMAP;CPU_SCS;SCR;SLEEPONEXIT
CPU_MMAP;CPU_SCS;SCR;RESERVED0
CPU_MMAP;CPU_SCS;CCR
CPU_MMAP;CPU_SCS;CCR;RESERVED10
CPU_MMAP;CPU_SCS;CCR;STKALIGN
CPU_MMAP;CPU_SCS;CCR;BFHFNMIGN
CPU_MMAP;CPU_SCS;CCR;RESERVED5
CPU_MMAP;CPU_SCS;CCR;DIV_0_TRP
CPU_MMAP;CPU_SCS;CCR;UNALIGN_TRP
CPU_MMAP;CPU_SCS;CCR;RESERVED2
CPU_MMAP;CPU_SCS;CCR;USERSETMPEND
CPU_MMAP;CPU_SCS;CCR;NONBASETHREDENA
CPU_MMAP;CPU_SCS;SHPR1
CPU_MMAP;CPU_SCS;SHPR1;RESERVED24
CPU_MMAP;CPU_SCS;SHPR1;PRI_6
CPU_MMAP;CPU_SCS;SHPR1;PRI_5
CPU_MMAP;CPU_SCS;SHPR1;PRI_4
CPU_MMAP;CPU_SCS;SHPR2
CPU_MMAP;CPU_SCS;SHPR2;PRI_11
CPU_MMAP;CPU_SCS;SHPR2;RESERVED0
CPU_MMAP;CPU_SCS;SHPR3
CPU_MMAP;CPU_SCS;SHPR3;PRI_15
CPU_MMAP;CPU_SCS;SHPR3;PRI_14
CPU_MMAP;CPU_SCS;SHPR3;RESERVED8
CPU_MMAP;CPU_SCS;SHPR3;PRI_12
CPU_MMAP;CPU_SCS;SHCSR
CPU_MMAP;CPU_SCS;SHCSR;RESERVED19
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTENA
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTENA;DIS
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTENA;EN
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTENA
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTENA;DIS
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTENA;EN
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTENA
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTENA;DIS
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTENA;EN
CPU_MMAP;CPU_SCS;SHCSR;SVCALLPENDED
CPU_MMAP;CPU_SCS;SHCSR;SVCALLPENDED;NOTPENDING
CPU_MMAP;CPU_SCS;SHCSR;SVCALLPENDED;PENDING
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTPENDED
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTPENDED;NOTPENDING
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTPENDED;PENDING
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTPENDED
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTPENDED;NOTPENDING
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTPENDED;PENDING
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTPENDED
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTPENDED;NOTPENDING
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTPENDED;PENDING
CPU_MMAP;CPU_SCS;SHCSR;SYSTICKACT
CPU_MMAP;CPU_SCS;SHCSR;SYSTICKACT;NOTACTIVE
CPU_MMAP;CPU_SCS;SHCSR;SYSTICKACT;ACTIVE
CPU_MMAP;CPU_SCS;SHCSR;PENDSVACT
CPU_MMAP;CPU_SCS;SHCSR;RESERVED9
CPU_MMAP;CPU_SCS;SHCSR;MONITORACT
CPU_MMAP;CPU_SCS;SHCSR;MONITORACT;NOTACTIVE
CPU_MMAP;CPU_SCS;SHCSR;MONITORACT;ACTIVE
CPU_MMAP;CPU_SCS;SHCSR;SVCALLACT
CPU_MMAP;CPU_SCS;SHCSR;SVCALLACT;NOTACTIVE
CPU_MMAP;CPU_SCS;SHCSR;SVCALLACT;ACTIVE
CPU_MMAP;CPU_SCS;SHCSR;RESERVED4
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTACT
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTACT;NOTACTIVE
CPU_MMAP;CPU_SCS;SHCSR;USGFAULTACT;ACTIVE
CPU_MMAP;CPU_SCS;SHCSR;RESERVED2
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTACT
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTACT;NOTACTIVE
CPU_MMAP;CPU_SCS;SHCSR;BUSFAULTACT;ACTIVE
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTACT
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTACT;NOTACTIVE
CPU_MMAP;CPU_SCS;SHCSR;MEMFAULTACT;ACTIVE
CPU_MMAP;CPU_SCS;CFSR
CPU_MMAP;CPU_SCS;CFSR;RESERVED26
CPU_MMAP;CPU_SCS;CFSR;DIVBYZERO
CPU_MMAP;CPU_SCS;CFSR;UNALIGNED
CPU_MMAP;CPU_SCS;CFSR;RESERVED20
CPU_MMAP;CPU_SCS;CFSR;NOCP
CPU_MMAP;CPU_SCS;CFSR;INVPC
CPU_MMAP;CPU_SCS;CFSR;INVSTATE
CPU_MMAP;CPU_SCS;CFSR;UNDEFINSTR
CPU_MMAP;CPU_SCS;CFSR;BFARVALID
CPU_MMAP;CPU_SCS;CFSR;RESERVED13
CPU_MMAP;CPU_SCS;CFSR;STKERR
CPU_MMAP;CPU_SCS;CFSR;UNSTKERR
CPU_MMAP;CPU_SCS;CFSR;IMPRECISERR
CPU_MMAP;CPU_SCS;CFSR;PRECISERR
CPU_MMAP;CPU_SCS;CFSR;IBUSERR
CPU_MMAP;CPU_SCS;CFSR;MMARVALID
CPU_MMAP;CPU_SCS;CFSR;RESERVED5
CPU_MMAP;CPU_SCS;CFSR;MSTKERR
CPU_MMAP;CPU_SCS;CFSR;MUNSTKERR
CPU_MMAP;CPU_SCS;CFSR;RESERVED2
CPU_MMAP;CPU_SCS;CFSR;DACCVIOL
CPU_MMAP;CPU_SCS;CFSR;IACCVIOL
CPU_MMAP;CPU_SCS;HFSR
CPU_MMAP;CPU_SCS;HFSR;DEBUGEVT
CPU_MMAP;CPU_SCS;HFSR;FORCED
CPU_MMAP;CPU_SCS;HFSR;RESERVED2
CPU_MMAP;CPU_SCS;HFSR;VECTTBL
CPU_MMAP;CPU_SCS;HFSR;RESERVED0
CPU_MMAP;CPU_SCS;DFSR
CPU_MMAP;CPU_SCS;DFSR;RESERVED5
CPU_MMAP;CPU_SCS;DFSR;EXTERNAL
CPU_MMAP;CPU_SCS;DFSR;VCATCH
CPU_MMAP;CPU_SCS;DFSR;DWTTRAP
CPU_MMAP;CPU_SCS;DFSR;BKPT
CPU_MMAP;CPU_SCS;DFSR;HALTED
CPU_MMAP;CPU_SCS;MMFAR
CPU_MMAP;CPU_SCS;MMFAR;ADDRESS
CPU_MMAP;CPU_SCS;BFAR
CPU_MMAP;CPU_SCS;BFAR;ADDRESS
CPU_MMAP;CPU_SCS;AFSR
CPU_MMAP;CPU_SCS;AFSR;IMPDEF
CPU_MMAP;CPU_SCS;ID_PFR0
CPU_MMAP;CPU_SCS;ID_PFR0;RESERVED8
CPU_MMAP;CPU_SCS;ID_PFR0;STATE1
CPU_MMAP;CPU_SCS;ID_PFR0;STATE0
CPU_MMAP;CPU_SCS;ID_PFR1
CPU_MMAP;CPU_SCS;ID_PFR1;RESERVED12
CPU_MMAP;CPU_SCS;ID_PFR1;MICROCONTROLLER_PROGRAMMERS_MODEL
CPU_MMAP;CPU_SCS;ID_PFR1;RESERVED0
CPU_MMAP;CPU_SCS;ID_DFR0
CPU_MMAP;CPU_SCS;ID_DFR0;RESERVED24
CPU_MMAP;CPU_SCS;ID_DFR0;MICROCONTROLLER_DEBUG_MODEL
CPU_MMAP;CPU_SCS;ID_DFR0;RESERVED0
CPU_MMAP;CPU_SCS;ID_AFR0
CPU_MMAP;CPU_SCS;ID_AFR0;RESERVED0
CPU_MMAP;CPU_SCS;ID_MMFR0
CPU_MMAP;CPU_SCS;ID_MMFR0;RESERVED0
CPU_MMAP;CPU_SCS;ID_MMFR1
CPU_MMAP;CPU_SCS;ID_MMFR1;RESERVED0
CPU_MMAP;CPU_SCS;ID_MMFR2
CPU_MMAP;CPU_SCS;ID_MMFR2;RESERVED28
CPU_MMAP;CPU_SCS;ID_MMFR2;WAIT_FOR_INTERRUPT_STALLING
CPU_MMAP;CPU_SCS;ID_MMFR2;RESERVED0
CPU_MMAP;CPU_SCS;ID_MMFR3
CPU_MMAP;CPU_SCS;ID_MMFR3;RESERVED0
CPU_MMAP;CPU_SCS;ID_ISAR0
CPU_MMAP;CPU_SCS;ID_ISAR0;RESERVED0
CPU_MMAP;CPU_SCS;ID_ISAR1
CPU_MMAP;CPU_SCS;ID_ISAR1;RESERVED0
CPU_MMAP;CPU_SCS;ID_ISAR2
CPU_MMAP;CPU_SCS;ID_ISAR2;RESERVED0
CPU_MMAP;CPU_SCS;ID_ISAR3
CPU_MMAP;CPU_SCS;ID_ISAR3;RESERVED0
CPU_MMAP;CPU_SCS;ID_ISAR4
CPU_MMAP;CPU_SCS;ID_ISAR4;RESERVED0
CPU_MMAP;CPU_SCS;CPACR
CPU_MMAP;CPU_SCS;CPACR;RESERVED0
CPU_MMAP;CPU_SCS;DHCSR
CPU_MMAP;CPU_SCS;DHCSR;RESERVED26
CPU_MMAP;CPU_SCS;DHCSR;S_RESET_ST
CPU_MMAP;CPU_SCS;DHCSR;S_RETIRE_ST
CPU_MMAP;CPU_SCS;DHCSR;RESERVED20
CPU_MMAP;CPU_SCS;DHCSR;S_LOCKUP
CPU_MMAP;CPU_SCS;DHCSR;S_SLEEP
CPU_MMAP;CPU_SCS;DHCSR;S_HALT
CPU_MMAP;CPU_SCS;DHCSR;S_REGRDY
CPU_MMAP;CPU_SCS;DHCSR;RESERVED6
CPU_MMAP;CPU_SCS;DHCSR;C_SNAPSTALL
CPU_MMAP;CPU_SCS;DHCSR;RESERVED4
CPU_MMAP;CPU_SCS;DHCSR;C_MASKINTS
CPU_MMAP;CPU_SCS;DHCSR;C_STEP
CPU_MMAP;CPU_SCS;DHCSR;C_HALT
CPU_MMAP;CPU_SCS;DHCSR;C_DEBUGEN
CPU_MMAP;CPU_SCS;DCRSR
CPU_MMAP;CPU_SCS;DCRSR;RESERVED17
CPU_MMAP;CPU_SCS;DCRSR;REGWNR
CPU_MMAP;CPU_SCS;DCRSR;RESERVED5
CPU_MMAP;CPU_SCS;DCRSR;REGSEL
CPU_MMAP;CPU_SCS;DCRDR
CPU_MMAP;CPU_SCS;DCRDR;DCRDR
CPU_MMAP;CPU_SCS;DEMCR
CPU_MMAP;CPU_SCS;DEMCR;RESERVED25
CPU_MMAP;CPU_SCS;DEMCR;TRCENA
CPU_MMAP;CPU_SCS;DEMCR;RESERVED20
CPU_MMAP;CPU_SCS;DEMCR;MON_REQ
CPU_MMAP;CPU_SCS;DEMCR;MON_STEP
CPU_MMAP;CPU_SCS;DEMCR;MON_PEND
CPU_MMAP;CPU_SCS;DEMCR;MON_EN
CPU_MMAP;CPU_SCS;DEMCR;RESERVED11
CPU_MMAP;CPU_SCS;DEMCR;VC_HARDERR
CPU_MMAP;CPU_SCS;DEMCR;VC_INTERR
CPU_MMAP;CPU_SCS;DEMCR;VC_BUSERR
CPU_MMAP;CPU_SCS;DEMCR;VC_STATERR
CPU_MMAP;CPU_SCS;DEMCR;VC_CHKERR
CPU_MMAP;CPU_SCS;DEMCR;VC_NOCPERR
CPU_MMAP;CPU_SCS;DEMCR;VC_MMERR
CPU_MMAP;CPU_SCS;DEMCR;RESERVED1
CPU_MMAP;CPU_SCS;DEMCR;VC_CORERESET
CPU_MMAP;CPU_SCS;STIR
CPU_MMAP;CPU_SCS;STIR;RESERVED9
CPU_MMAP;CPU_SCS;STIR;INTID
CPU_MMAP;CPU_TPIU
CPU_MMAP;CPU_TPIU;SSPSR
CPU_MMAP;CPU_TPIU;SSPSR;RESERVED4
CPU_MMAP;CPU_TPIU;SSPSR;FOUR
CPU_MMAP;CPU_TPIU;SSPSR;THREE
CPU_MMAP;CPU_TPIU;SSPSR;TWO
CPU_MMAP;CPU_TPIU;SSPSR;ONE
CPU_MMAP;CPU_TPIU;CSPSR
CPU_MMAP;CPU_TPIU;CSPSR;RESERVED4
CPU_MMAP;CPU_TPIU;CSPSR;FOUR
CPU_MMAP;CPU_TPIU;CSPSR;THREE
CPU_MMAP;CPU_TPIU;CSPSR;TWO
CPU_MMAP;CPU_TPIU;CSPSR;ONE
CPU_MMAP;CPU_TPIU;ACPR
CPU_MMAP;CPU_TPIU;ACPR;RESERVED13
CPU_MMAP;CPU_TPIU;ACPR;PRESCALER
CPU_MMAP;CPU_TPIU;SPPR
CPU_MMAP;CPU_TPIU;SPPR;RESERVED2
CPU_MMAP;CPU_TPIU;SPPR;PROTOCOL
CPU_MMAP;CPU_TPIU;SPPR;PROTOCOL;TRACEPORT
CPU_MMAP;CPU_TPIU;SPPR;PROTOCOL;SWO_MANCHESTER
CPU_MMAP;CPU_TPIU;SPPR;PROTOCOL;SWO_NRZ
CPU_MMAP;CPU_TPIU;FFSR
CPU_MMAP;CPU_TPIU;FFSR;RESERVED4
CPU_MMAP;CPU_TPIU;FFSR;FTNONSTOP
CPU_MMAP;CPU_TPIU;FFSR;RESERVED0
CPU_MMAP;CPU_TPIU;FFCR
CPU_MMAP;CPU_TPIU;FFCR;RESERVED9
CPU_MMAP;CPU_TPIU;FFCR;TRIGIN
CPU_MMAP;CPU_TPIU;FFCR;RESERVED2
CPU_MMAP;CPU_TPIU;FFCR;ENFCONT
CPU_MMAP;CPU_TPIU;FFCR;RESERVED0
CPU_MMAP;CPU_TPIU;FSCR
CPU_MMAP;CPU_TPIU;FSCR;FSCR
CPU_MMAP;CPU_TPIU;CLAIMMASK
CPU_MMAP;CPU_TPIU;CLAIMMASK;CLAIMMASK
CPU_MMAP;CPU_TPIU;CLAIMSET
CPU_MMAP;CPU_TPIU;CLAIMSET;CLAIMSET
CPU_MMAP;CPU_TPIU;CLAIMTAG
CPU_MMAP;CPU_TPIU;CLAIMTAG;CLAIMTAG
CPU_MMAP;CPU_TPIU;CLAIMCLR
CPU_MMAP;CPU_TPIU;CLAIMCLR;CLAIMCLR
CPU_MMAP;CPU_TPIU;DEVID
CPU_MMAP;CPU_TPIU;DEVID;DEVID
CPU_MMAP;CPU_TIPROP
CPU_MMAP;CPU_TIPROP;TRACECLKMUX
CPU_MMAP;CPU_TIPROP;TRACECLKMUX;RESERVED
CPU_MMAP;CPU_TIPROP;TRACECLKMUX;TRACECLK_N_SWV
CPU_MMAP;CPU_TIPROP;TRACECLKMUX;TRACECLK_N_SWV;SWV
CPU_MMAP;CPU_TIPROP;TRACECLKMUX;TRACECLK_N_SWV;TRACECLK
CPU_MMAP;CPU_TIPROP;DYN_CG
CPU_MMAP;CPU_TIPROP;DYN_CG;RESERVED
CPU_MMAP;CPU_TIPROP;DYN_CG;DYN_CG
CPU_MMAP;CPU_ROM_TABLE
CPU_MMAP;CPU_ROM_TABLE;SCS
CPU_MMAP;CPU_ROM_TABLE;SCS;SCS
CPU_MMAP;CPU_ROM_TABLE;DWT
CPU_MMAP;CPU_ROM_TABLE;DWT;DWT
CPU_MMAP;CPU_ROM_TABLE;DWT;DWT_PRESENT
CPU_MMAP;CPU_ROM_TABLE;FPB
CPU_MMAP;CPU_ROM_TABLE;FPB;FPB
CPU_MMAP;CPU_ROM_TABLE;FPB;FPB_PRESENT
CPU_MMAP;CPU_ROM_TABLE;ITM
CPU_MMAP;CPU_ROM_TABLE;ITM;ITM
CPU_MMAP;CPU_ROM_TABLE;ITM;ITM_PRESENT
CPU_MMAP;CPU_ROM_TABLE;TPIU
CPU_MMAP;CPU_ROM_TABLE;TPIU;TPIU
CPU_MMAP;CPU_ROM_TABLE;TPIU;TPIU_PRESENT
CPU_MMAP;CPU_ROM_TABLE;ETM
CPU_MMAP;CPU_ROM_TABLE;ETM;ETM
CPU_MMAP;CPU_ROM_TABLE;ETM;ETM_PRESENT
CPU_MMAP;CPU_ROM_TABLE;END
CPU_MMAP;CPU_ROM_TABLE;END;END
CPU_MMAP;CPU_ROM_TABLE;SYSTEM_ACCESS
CPU_MMAP;CPU_ROM_TABLE;SYSTEM_ACCESS;RESERVED1
CPU_MMAP;CPU_ROM_TABLE;SYSTEM_ACCESS;SYSTEM_ACCESS
