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uart.h
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1 /******************************************************************************
2 * Filename: uart.h
3 * Revised: 2015-01-14 12:12:44 +0100 (on, 14 jan 2015)
4 * Revision: 42373
5 *
6 * Description: Defines and prototypes for the UART.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
43 //
44 //*****************************************************************************
45
46 #ifndef __UART_H__
47 #define __UART_H__
48
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include <inc/hw_types.h>
63 #include <inc/hw_uart.h>
64 #include <inc/hw_memmap.h>
65 #include <inc/hw_ints.h>
66 #include <driverlib/interrupt.h>
67 #include <driverlib/debug.h>
68
69 //*****************************************************************************
70 //
71 // Support for DriverLib in ROM:
72 // This section renames all functions that are not "static inline", so that
73 // calling these functions will default to implementation in flash. At the end
74 // of this file a second renaming will change the defaults to implementation in
75 // ROM for available functions.
76 //
77 // To force use of the implementation in flash, e.g. for debugging:
78 // - Globally: Define DRIVERLIB_NOROM at project level
79 // - Per function: Use prefix "NOROM_" when calling the function
80 //
81 // Do not define DRIVERLIB_GENERATE_ROM!
82 //
83 //*****************************************************************************
84 #ifndef DRIVERLIB_GENERATE_ROM
85 #define UARTFIFOLevelGet NOROM_UARTFIFOLevelGet
86 #define UARTConfigSetExpClk NOROM_UARTConfigSetExpClk
87 #define UARTConfigGetExpClk NOROM_UARTConfigGetExpClk
88 #define UARTDisable NOROM_UARTDisable
89 #define UARTCharGetNonBlocking NOROM_UARTCharGetNonBlocking
90 #define UARTCharGet NOROM_UARTCharGet
91 #define UARTCharPutNonBlocking NOROM_UARTCharPutNonBlocking
92 #define UARTCharPut NOROM_UARTCharPut
93 #define UARTIntRegister NOROM_UARTIntRegister
94 #define UARTIntUnregister NOROM_UARTIntUnregister
95 #endif
96
97 //*****************************************************************************
98 //
99 // Values that can be passed to UARTIntEnable, UARTIntDisable, and UARTIntClear
100 // as the ui32IntFlags parameter, and returned from UARTIntStatus.
101 //
102 //*****************************************************************************
103 #define UART_INT_OE 0x400 // Overrun Error Interrupt Mask
104 #define UART_INT_BE 0x200 // Break Error Interrupt Mask
105 #define UART_INT_PE 0x100 // Parity Error Interrupt Mask
106 #define UART_INT_FE 0x080 // Framing Error Interrupt Mask
107 #define UART_INT_RT 0x040 // Receive Timeout Interrupt Mask
108 #define UART_INT_TX 0x020 // Transmit Interrupt Mask
109 #define UART_INT_RX 0x010 // Receive Interrupt Mask
110 #define UART_INT_CTS 0x002 // CTS Modem Interrupt Mask
111
112 //*****************************************************************************
113 //
114 // Values that can be passed to UARTConfigSetExpClk as the ui32Config parameter
115 // and returned by UARTConfigGetExpClk in the pui32Config parameter.
116 // Additionally, the UART_CONFIG_PAR_* subset can be passed to
117 // UARTParityModeSet as the ui32Parity parameter, and are returned by
118 // UARTParityModeGet.
119 //
120 //*****************************************************************************
121 #define UART_CONFIG_WLEN_MASK 0x00000060 // Mask for extracting word length
122 #define UART_CONFIG_WLEN_8 0x00000060 // 8 bit data
123 #define UART_CONFIG_WLEN_7 0x00000040 // 7 bit data
124 #define UART_CONFIG_WLEN_6 0x00000020 // 6 bit data
125 #define UART_CONFIG_WLEN_5 0x00000000 // 5 bit data
126 #define UART_CONFIG_STOP_MASK 0x00000008 // Mask for extracting stop bits
127 #define UART_CONFIG_STOP_ONE 0x00000000 // One stop bit
128 #define UART_CONFIG_STOP_TWO 0x00000008 // Two stop bits
129 #define UART_CONFIG_PAR_MASK 0x00000086 // Mask for extracting parity
130 #define UART_CONFIG_PAR_NONE 0x00000000 // No parity
131 #define UART_CONFIG_PAR_EVEN 0x00000006 // Even parity
132 #define UART_CONFIG_PAR_ODD 0x00000002 // Odd parity
133 #define UART_CONFIG_PAR_ONE 0x00000082 // Parity bit is one
134 #define UART_CONFIG_PAR_ZERO 0x00000086 // Parity bit is zero
135
136 //*****************************************************************************
137 //
138 // Values that can be passed to UARTFIFOLevelSet as the ui32TxLevel parameter
139 // and returned by UARTFIFOLevelGet in the pui32TxLevel.
140 //
141 //*****************************************************************************
142 #define UART_FIFO_TX1_8 0x00000000 // Transmit interrupt at 1/8 Full
143 #define UART_FIFO_TX2_8 0x00000001 // Transmit interrupt at 1/4 Full
144 #define UART_FIFO_TX4_8 0x00000002 // Transmit interrupt at 1/2 Full
145 #define UART_FIFO_TX6_8 0x00000003 // Transmit interrupt at 3/4 Full
146 #define UART_FIFO_TX7_8 0x00000004 // Transmit interrupt at 7/8 Full
147
148 //*****************************************************************************
149 //
150 // Values that can be passed to UARTFIFOLevelSet as the ui32RxLevel parameter
151 // and returned by UARTFIFOLevelGet in the pui32RxLevel.
152 //
153 //*****************************************************************************
154 #define UART_FIFO_RX1_8 0x00000000 // Receive interrupt at 1/8 Full
155 #define UART_FIFO_RX2_8 0x00000008 // Receive interrupt at 1/4 Full
156 #define UART_FIFO_RX4_8 0x00000010 // Receive interrupt at 1/2 Full
157 #define UART_FIFO_RX6_8 0x00000018 // Receive interrupt at 3/4 Full
158 #define UART_FIFO_RX7_8 0x00000020 // Receive interrupt at 7/8 Full
159
160 //*****************************************************************************
161 //
162 // Values that can be passed to UARTDMAEnable() and UARTDMADisable().
163 //
164 //*****************************************************************************
165 #define UART_DMA_ERR_RXSTOP 0x00000004 // Stop DMA receive if UART error
166 #define UART_DMA_TX 0x00000002 // Enable DMA for transmit
167 #define UART_DMA_RX 0x00000001 // Enable DMA for receive
168
169 //*****************************************************************************
170 //
171 // Values returned from UARTRxErrorGet().
172 //
173 //*****************************************************************************
174 #define UART_RXERROR_OVERRUN 0x00000008
175 #define UART_RXERROR_BREAK 0x00000004
176 #define UART_RXERROR_PARITY 0x00000002
177 #define UART_RXERROR_FRAMING 0x00000001
178
179 //*****************************************************************************
180 //
181 // Values that can be passed to UARTTxIntModeSet() or returned from
182 // UARTTxIntModeGet().
183 //
184 //*****************************************************************************
185 #define UART_TXINT_MODE_FIFO 0x00000000
186 #define UART_TXINT_MODE_EOT 0x00000010
187
188 //*****************************************************************************
189 //
190 // Values returned from the UARTBusy().
191 //
192 //*****************************************************************************
193 #define UART_BUSY 0x00000001
194 #define UART_IDLE 0x00000000
195
196 //*****************************************************************************
197 //
198 // API Functions and prototypes
199 //
200 //*****************************************************************************
201
202 #ifdef DRIVERLIB_DEBUG
203 //*****************************************************************************
204 //
215 //
216 //*****************************************************************************
217 static bool
218 UARTBaseValid(uint32_t ui32Base)
219 {
220 return(ui32Base == UART0_BASE);
221 }
222 #endif
223
224 //*****************************************************************************
225 //
242 //
243 //*****************************************************************************
244 __STATIC_INLINE void
245 UARTParityModeSet(uint32_t ui32Base, uint32_t ui32Parity)
246 {
247 //
248 // Check the arguments.
249 //
250 ASSERT(UARTBaseValid(ui32Base));
251 ASSERT((ui32Parity == UART_CONFIG_PAR_NONE) ||
252 (ui32Parity == UART_CONFIG_PAR_EVEN) ||
253 (ui32Parity == UART_CONFIG_PAR_ODD) ||
254 (ui32Parity == UART_CONFIG_PAR_ONE) ||
255 (ui32Parity == UART_CONFIG_PAR_ZERO));
256
257 //
258 // Set the parity mode.
259 //
260 HWREG(ui32Base + UART_O_LCRH) = ((HWREG(ui32Base + UART_O_LCRH) &
261 ~(UART_LCRH_SPS | UART_LCRH_EPS |
262 UART_LCRH_PEN)) | ui32Parity);
263 }
264
265 //*****************************************************************************
266 //
280 //
281 //*****************************************************************************
282 __STATIC_INLINE uint32_t
283 UARTParityModeGet(uint32_t ui32Base)
284 {
285 //
286 // Check the arguments.
287 //
288 ASSERT(UARTBaseValid(ui32Base));
289
290 //
291 // Return the current parity setting
292 //
293 return(HWREG(ui32Base + UART_O_LCRH) &
294 (UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN));
295 }
296
297 //*****************************************************************************
298 //
319 //
320 //*****************************************************************************
321 __STATIC_INLINE void
322 UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel,
323 uint32_t ui32RxLevel)
324 {
325 //
326 // Check the arguments.
327 //
328 ASSERT(UARTBaseValid(ui32Base));
329 ASSERT((ui32TxLevel == UART_FIFO_TX1_8) ||
330 (ui32TxLevel == UART_FIFO_TX2_8) ||
331 (ui32TxLevel == UART_FIFO_TX4_8) ||
332 (ui32TxLevel == UART_FIFO_TX6_8) ||
333 (ui32TxLevel == UART_FIFO_TX7_8));
334 ASSERT((ui32RxLevel == UART_FIFO_RX1_8) ||
335 (ui32RxLevel == UART_FIFO_RX2_8) ||
336 (ui32RxLevel == UART_FIFO_RX4_8) ||
337 (ui32RxLevel == UART_FIFO_RX6_8) ||
338 (ui32RxLevel == UART_FIFO_RX7_8));
339
340 //
341 // Set the FIFO interrupt levels.
342 //
343 HWREG(ui32Base + UART_O_IFLS) = ui32TxLevel | ui32RxLevel;
344 }
345
346 //*****************************************************************************
347 //
370 //
371 //*****************************************************************************
372 extern void UARTFIFOLevelGet(uint32_t ui32Base, uint32_t *pui32TxLevel,
373 uint32_t *pui32RxLevel);
374
375 //*****************************************************************************
376 //
406 //
407 //*****************************************************************************
408 extern void UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk,
409 uint32_t ui32Baud, uint32_t ui32Config);
410
411 //*****************************************************************************
412 //
431 //
432 //*****************************************************************************
433 extern void UARTConfigGetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk,
434 uint32_t *pui32Baud, uint32_t *pui32Config);
435
436 //*****************************************************************************
437 //
446 //
447 //*****************************************************************************
448 __STATIC_INLINE void
449 UARTEnable(uint32_t ui32Base)
450 {
451 //
452 // Check the arguments.
453 //
454 ASSERT(UARTBaseValid(ui32Base));
455
456 //
457 // Enable the FIFO.
458 //
459 HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;
460
461 //
462 // Enable RX, TX, and the UART.
463 //
464 HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |
465 UART_CTL_RXE);
466 }
467
468 //*****************************************************************************
469 //
478 //
479 //*****************************************************************************
480 extern void UARTDisable(uint32_t ui32Base);
481
482 //*****************************************************************************
483 //
491 //
492 //*****************************************************************************
493 __STATIC_INLINE void
494 UARTFIFOEnable(uint32_t ui32Base)
495 {
496 //
497 // Check the arguments.
498 //
499 ASSERT(UARTBaseValid(ui32Base));
500
501 //
502 // Enable the FIFO.
503 //
504 HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;
505 }
506
507 //*****************************************************************************
508 //
516 //
517 //*****************************************************************************
518 __STATIC_INLINE void
519 UARTFIFODisable(uint32_t ui32Base)
520 {
521 //
522 // Check the arguments.
523 //
524 ASSERT(UARTBaseValid(ui32Base));
525
526 //
527 // Disable the FIFO.
528 //
529 HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN);
530 }
531
532 //*****************************************************************************
533 //
550 //
551 //*****************************************************************************
552 __STATIC_INLINE void
553 UARTTxIntModeSet(uint32_t ui32Base, uint32_t ui32Mode)
554 {
555 //
556 // Check the arguments.
557 //
558 ASSERT(UARTBaseValid(ui32Base));
559 ASSERT((ui32Mode == UART_TXINT_MODE_EOT) ||
560 (ui32Mode == UART_TXINT_MODE_FIFO));
561
562 //
563 // Set or clear the EOT bit of the UART control register as appropriate.
564 //
565 HWREG(ui32Base + UART_O_CTL) = ((HWREG(ui32Base + UART_O_CTL) &
566 ~(UART_TXINT_MODE_EOT |
567 UART_TXINT_MODE_FIFO)) | ui32Mode);
568 }
569
570 //*****************************************************************************
571 //
585 //
586 //*****************************************************************************
587 __STATIC_INLINE uint32_t
588 UARTTxIntModeGet(uint32_t ui32Base)
589 {
590 //
591 // Check the arguments.
592 //
593 ASSERT(UARTBaseValid(ui32Base));
594
595 //
596 // Return the current transmit interrupt mode.
597 //
598 return(HWREG(ui32Base + UART_O_CTL) & (UART_TXINT_MODE_EOT |
599 UART_TXINT_MODE_FIFO));
600 }
601
602 //*****************************************************************************
603 //
614 //
615 //*****************************************************************************
616 __STATIC_INLINE bool
617 UARTCharsAvail(uint32_t ui32Base)
618 {
619 //
620 // Check the arguments.
621 //
622 ASSERT(UARTBaseValid(ui32Base));
623
624 //
625 // Return the availability of characters.
626 //
627 return((HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE) ? false : true);
628 }
629
630 //*****************************************************************************
631 //
642 //
643 //*****************************************************************************
644 __STATIC_INLINE bool
645 UARTSpaceAvail(uint32_t ui32Base)
646 {
647 //
648 // Check the arguments.
649 //
650 ASSERT(UARTBaseValid(ui32Base));
651
652 //
653 // Return the availability of space.
654 //
655 return((HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF) ? false : true);
656 }
657
658 //*****************************************************************************
659 //
675 //
676 //*****************************************************************************
677 extern int32_t UARTCharGetNonBlocking(uint32_t ui32Base);
678
679 //*****************************************************************************
680 //
691 //
692 //*****************************************************************************
693 extern int32_t UARTCharGet(uint32_t ui32Base);
694
695 //*****************************************************************************
696 //
710 //
711 //*****************************************************************************
712 extern bool UARTCharPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data);
713
714 //*****************************************************************************
715 //
726 //
727 //*****************************************************************************
728 extern void UARTCharPut(uint32_t ui32Base, uint8_t ui8Data);
729
730 //*****************************************************************************
731 //
744 //
745 //*****************************************************************************
746 __STATIC_INLINE bool
747 UARTBusy(uint32_t ui32Base)
748 {
749 //
750 // Check the argument.
751 //
752 ASSERT(UARTBaseValid(ui32Base));
753
754 //
755 // Determine if the UART is busy.
756 //
757 return((HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY) ?
758 UART_BUSY : UART_IDLE);
759 }
760
761 //*****************************************************************************
762 //
774 //
775 //*****************************************************************************
776 __STATIC_INLINE void
777 UARTBreakCtl(uint32_t ui32Base, bool bBreakState)
778 {
779 //
780 // Check the arguments.
781 //
782 ASSERT(UARTBaseValid(ui32Base));
783
784 //
785 // Set the break condition as requested.
786 //
787 HWREG(ui32Base + UART_O_LCRH) =
788 (bBreakState ?
789 (HWREG(ui32Base + UART_O_LCRH) | UART_LCRH_BRK) :
790 (HWREG(ui32Base + UART_O_LCRH) & ~(UART_LCRH_BRK)));
791 }
792
793 //*****************************************************************************
794 //
810 //
811 //*****************************************************************************
812 extern void UARTIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
813
814 //*****************************************************************************
815 //
829 //
830 //*****************************************************************************
831 extern void UARTIntUnregister(uint32_t ui32Base);
832
833 //*****************************************************************************
834 //
854 //
855 //*****************************************************************************
856 __STATIC_INLINE void
857 UARTIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
858 {
859 //
860 // Check the arguments.
861 //
862 ASSERT(UARTBaseValid(ui32Base));
863
864 //
865 // Enable the specified interrupts.
866 //
867 HWREG(ui32Base + UART_O_IMSC) |= ui32IntFlags;
868 }
869
870 //*****************************************************************************
871 //
890 //
891 //*****************************************************************************
892 __STATIC_INLINE void
893 UARTIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
894 {
895 //
896 // Check the arguments.
897 //
898 ASSERT(UARTBaseValid(ui32Base));
899
900 //
901 // Disable the specified interrupts.
902 //
903 HWREG(ui32Base + UART_O_IMSC) &= ~(ui32IntFlags);
904 }
905
906 //*****************************************************************************
907 //
928 //
929 //*****************************************************************************
930 __STATIC_INLINE uint32_t
931 UARTIntStatus(uint32_t ui32Base, bool bMasked)
932 {
933 //
934 // Check the arguments.
935 //
936 ASSERT(UARTBaseValid(ui32Base));
937
938 //
939 // Return either the interrupt status or the raw interrupt status as
940 // requested.
941 //
942 if(bMasked)
943 {
944 return(HWREG(ui32Base + UART_O_MIS));
945 }
946 else
947 {
948 return(HWREG(ui32Base + UART_O_RIS));
949 }
950 }
951
952 //*****************************************************************************
953 //
981 //
982 //*****************************************************************************
983 __STATIC_INLINE void
984 UARTIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
985 {
986 //
987 // Check the arguments
988 //
989 ASSERT(UARTBaseValid(ui32Base));
990
991 //
992 // Clear the requested interrupt sources
993 //
994 HWREG(ui32Base + UART_O_ICR) = ui32IntFlags;
995 }
996
997 //*****************************************************************************
998 //
1016 //
1017 //*****************************************************************************
1018 __STATIC_INLINE void
1019 UARTDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags)
1020 {
1021 //
1022 // Check the arguments.
1023 //
1024 ASSERT(UARTBaseValid(ui32Base));
1025
1026 //
1027 // Set the requested bits in the UART DMA control register.
1028 //
1029 HWREG(ui32Base + UART_O_DMACTL) |= ui32DMAFlags;
1030 }
1031
1032 //*****************************************************************************
1033 //
1047 //
1048 //*****************************************************************************
1049 __STATIC_INLINE void
1050 UARTDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags)
1051 {
1052 //
1053 // Check the arguments.
1054 //
1055 ASSERT(UARTBaseValid(ui32Base));
1056
1057 //
1058 // Clear the requested bits in the UART DMA control register.
1059 //
1060 HWREG(ui32Base + UART_O_DMACTL) &= ~ui32DMAFlags;
1061 }
1062
1063 //*****************************************************************************
1064 //
1080 //
1081 //*****************************************************************************
1082 __STATIC_INLINE uint32_t
1083 UARTRxErrorGet(uint32_t ui32Base)
1084 {
1085 //
1086 // Check the arguments.
1087 //
1088 ASSERT(UARTBaseValid(ui32Base));
1089
1090 //
1091 // Return the current value of the receive status register.
1092 //
1093 return(HWREG(ui32Base + UART_O_RSR) & 0x0000000F);
1094 }
1095
1096 //*****************************************************************************
1097 //
1108 //
1109 //*****************************************************************************
1110 __STATIC_INLINE void
1111 UARTRxErrorClear(uint32_t ui32Base)
1112 {
1113 //
1114 // Check the arguments.
1115 //
1116 ASSERT(UARTBaseValid(ui32Base));
1117
1118 //
1119 // Any write to the Error Clear Register will clear all bits which are
1120 // currently set.
1121 //
1122 HWREG(ui32Base + UART_O_ECR) = 0;
1123 }
1124
1125 //*****************************************************************************
1126 //
1127 // Support for DriverLib in ROM:
1128 // Redirect to implementation in ROM when available.
1129 //
1130 //*****************************************************************************
1131 #ifndef DRIVERLIB_NOROM
1132 #include <driverlib/rom.h>
1133 #ifdef ROM_UARTFIFOLevelGet
1134 #undef UARTFIFOLevelGet
1135 #define UARTFIFOLevelGet ROM_UARTFIFOLevelGet
1136 #endif
1137 #ifdef ROM_UARTConfigSetExpClk
1138 #undef UARTConfigSetExpClk
1139 #define UARTConfigSetExpClk ROM_UARTConfigSetExpClk
1140 #endif
1141 #ifdef ROM_UARTConfigGetExpClk
1142 #undef UARTConfigGetExpClk
1143 #define UARTConfigGetExpClk ROM_UARTConfigGetExpClk
1144 #endif
1145 #ifdef ROM_UARTDisable
1146 #undef UARTDisable
1147 #define UARTDisable ROM_UARTDisable
1148 #endif
1149 #ifdef ROM_UARTCharGetNonBlocking
1150 #undef UARTCharGetNonBlocking
1151 #define UARTCharGetNonBlocking ROM_UARTCharGetNonBlocking
1152 #endif
1153 #ifdef ROM_UARTCharGet
1154 #undef UARTCharGet
1155 #define UARTCharGet ROM_UARTCharGet
1156 #endif
1157 #ifdef ROM_UARTCharPutNonBlocking
1158 #undef UARTCharPutNonBlocking
1159 #define UARTCharPutNonBlocking ROM_UARTCharPutNonBlocking
1160 #endif
1161 #ifdef ROM_UARTCharPut
1162 #undef UARTCharPut
1163 #define UARTCharPut ROM_UARTCharPut
1164 #endif
1165 #ifdef ROM_UARTIntRegister
1166 #undef UARTIntRegister
1167 #define UARTIntRegister ROM_UARTIntRegister
1168 #endif
1169 #ifdef ROM_UARTIntUnregister
1170 #undef UARTIntUnregister
1171 #define UARTIntUnregister ROM_UARTIntUnregister
1172 #endif
1173 #endif
1174
1175 //*****************************************************************************
1176 //
1177 // Mark the end of the C bindings section for C++ compilers.
1178 //
1179 //*****************************************************************************
1180 #ifdef __cplusplus
1181 }
1182 #endif
1183
1184 #endif // __UART_H__
1185
1186 //*****************************************************************************
1187 //
1190 //
1191 //*****************************************************************************
UART_TXINT_MODE_FIFO
#define UART_TXINT_MODE_FIFO
Definition: uart.h:185
UARTCharPut
void UARTCharPut(uint32_t ui32Base, uint8_t ui8Data)
Waits to send a character from the specified port.
Definition: uart.c:307
UART_CONFIG_PAR_ODD
#define UART_CONFIG_PAR_ODD
Definition: uart.h:132
UART_FIFO_RX2_8
#define UART_FIFO_RX2_8
Definition: uart.h:155
UARTIntStatus
__STATIC_INLINE uint32_t UARTIntStatus(uint32_t ui32Base, bool bMasked)
Gets the current interrupt status.
Definition: uart.h:931
debug.h
UARTIntClear
__STATIC_INLINE void UARTIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
Clears UART interrupt sources.
Definition: uart.h:984
UART_FIFO_TX7_8
#define UART_FIFO_TX7_8
Definition: uart.h:146
UARTRxErrorClear
__STATIC_INLINE void UARTRxErrorClear(uint32_t ui32Base)
Clears all reported receiver errors.
Definition: uart.h:1111
UART_FIFO_RX6_8
#define UART_FIFO_RX6_8
Definition: uart.h:157
UARTTxIntModeSet
__STATIC_INLINE void UARTTxIntModeSet(uint32_t ui32Base, uint32_t ui32Mode)
Sets the operating mode for the UART transmit interrupt.
Definition: uart.h:553
UARTConfigSetExpClk
void UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t ui32Baud, uint32_t ui32Config)
Sets the configuration of a UART.
Definition: uart.c:104
UARTIntEnable
__STATIC_INLINE void UARTIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
Enables individual UART interrupt sources.
Definition: uart.h:857
UARTTxIntModeGet
__STATIC_INLINE uint32_t UARTTxIntModeGet(uint32_t ui32Base)
Returns the current operating mode for the UART transmit interrupt.
Definition: uart.h:588
UART_FIFO_RX7_8
#define UART_FIFO_RX7_8
Definition: uart.h:158
ASSERT
#define ASSERT(expr)
Definition: debug.h:65
UARTFIFOLevelSet
__STATIC_INLINE void UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel, uint32_t ui32RxLevel)
Sets the FIFO level at which interrupts are generated.
Definition: uart.h:322
UARTBusy
__STATIC_INLINE bool UARTBusy(uint32_t ui32Base)
Determines whether the UART transmitter is busy or not.
Definition: uart.h:747
UARTFIFODisable
__STATIC_INLINE void UARTFIFODisable(uint32_t ui32Base)
Disables the transmit and receive FIFOs.
Definition: uart.h:519
UARTIntRegister
void UARTIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
Registers an interrupt handler for a UART interrupt.
Definition: uart.c:333
UARTDisable
void UARTDisable(uint32_t ui32Base)
Disables transmitting and receiving.
Definition: uart.c:179
UARTDMADisable
__STATIC_INLINE void UARTDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags)
Disable UART DMA operation.
Definition: uart.h:1050
UART_BUSY
#define UART_BUSY
Definition: uart.h:193
UARTParityModeSet
__STATIC_INLINE void UARTParityModeSet(uint32_t ui32Base, uint32_t ui32Parity)
Sets the type of parity.
Definition: uart.h:245
UART_TXINT_MODE_EOT
#define UART_TXINT_MODE_EOT
Definition: uart.h:186
UARTCharGetNonBlocking
int32_t UARTCharGetNonBlocking(uint32_t ui32Base)
Receives a character from the specified port.
Definition: uart.c:212
UART_CONFIG_PAR_EVEN
#define UART_CONFIG_PAR_EVEN
Definition: uart.h:131
UARTDMAEnable
__STATIC_INLINE void UARTDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags)
Enable UART DMA operation.
Definition: uart.h:1019
UART_FIFO_TX6_8
#define UART_FIFO_TX6_8
Definition: uart.h:145
UART_FIFO_TX4_8
#define UART_FIFO_TX4_8
Definition: uart.h:144
UARTConfigGetExpClk
void UARTConfigGetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t *pui32Baud, uint32_t *pui32Config)
Gets the current configuration of a UART.
Definition: uart.c:148
UART_FIFO_TX1_8
#define UART_FIFO_TX1_8
Definition: uart.h:142
UARTEnable
__STATIC_INLINE void UARTEnable(uint32_t ui32Base)
Enables transmitting and receiving.
Definition: uart.h:449
UART_FIFO_RX4_8
#define UART_FIFO_RX4_8
Definition: uart.h:156
UARTFIFOEnable
__STATIC_INLINE void UARTFIFOEnable(uint32_t ui32Base)
Enables the transmit and receive FIFOs.
Definition: uart.h:494
interrupt.h
UART_CONFIG_PAR_NONE
#define UART_CONFIG_PAR_NONE
Definition: uart.h:130
UARTCharGet
int32_t UARTCharGet(uint32_t ui32Base)
Waits for a character from the specified port.
Definition: uart.c:244
UART_CONFIG_PAR_ZERO
#define UART_CONFIG_PAR_ZERO
Definition: uart.h:134
UART_FIFO_RX1_8
#define UART_FIFO_RX1_8
Definition: uart.h:154
UARTSpaceAvail
__STATIC_INLINE bool UARTSpaceAvail(uint32_t ui32Base)
Determines if there is any space in the transmit FIFO.
Definition: uart.h:645
UARTCharPutNonBlocking
bool UARTCharPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data)
Sends a character to the specified port.
Definition: uart.c:270
UARTRxErrorGet
__STATIC_INLINE uint32_t UARTRxErrorGet(uint32_t ui32Base)
Gets current receiver errors.
Definition: uart.h:1083
UART_FIFO_TX2_8
#define UART_FIFO_TX2_8
Definition: uart.h:143
UARTCharsAvail
__STATIC_INLINE bool UARTCharsAvail(uint32_t ui32Base)
Determines if there are any characters in the receive FIFO.
Definition: uart.h:617
UARTIntDisable
__STATIC_INLINE void UARTIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
Disables individual UART interrupt sources.
Definition: uart.h:893
UARTBreakCtl
__STATIC_INLINE void UARTBreakCtl(uint32_t ui32Base, bool bBreakState)
Causes a BREAK to be sent.
Definition: uart.h:777
UARTFIFOLevelGet
void UARTFIFOLevelGet(uint32_t ui32Base, uint32_t *pui32TxLevel, uint32_t *pui32RxLevel)
Gets the FIFO level at which interrupts are generated.
Definition: uart.c:76
rom.h
UART_IDLE
#define UART_IDLE
Definition: uart.h:194
UARTParityModeGet
__STATIC_INLINE uint32_t UARTParityModeGet(uint32_t ui32Base)
Gets the type of parity currently being used.
Definition: uart.h:283
UARTIntUnregister
void UARTIntUnregister(uint32_t ui32Base)
Unregisters an interrupt handler for a UART interrupt.
Definition: uart.c:357
UART_CONFIG_PAR_ONE
#define UART_CONFIG_PAR_ONE
Definition: uart.h:133