## RFC_DBELL

Instance: RFC_DBELL
Component: RFC_DBELL
Base address: 0x40041000

Component for rdbell register bank

### TOP:RFC_DBELL Register Summary

Register Name | Type | Register Width (Bits) | Register Reset | Address Offset | Physical Address
CMDR | RW | 32 | 0x0000 0000 | 0x0000 0000 | 0x4004 1000
CMDSTA | RO | 32 | 0x0000 0000 | 0x0000 0004 | 0x4004 1004
RFHWIFG | RW | 32 | 0x0000 0000 | 0x0000 0008 | 0x4004 1008
RFHWIEN | RW | 32 | 0x0000 0000 | 0x0000 000C | 0x4004 100C
RFCPEIFG | RW | 32 | 0x0000 0000 | 0x0000 0010 | 0x4004 1010
RFCPEIEN | RW | 32 | 0xFFFF FFFF | 0x0000 0014 | 0x4004 1014
RFCPEISL | RW | 32 | 0xFFFF 0000 | 0x0000 0018 | 0x4004 1018
RFACKIFG | RW | 32 | 0x0000 0000 | 0x0000 001C | 0x4004 101C
SYSGPOCTL | RW | 32 | 0x0000 0000 | 0x0000 0020 | 0x4004 1020

### TOP:RFC_DBELL Register Descriptions

### TOP:RFC_DBELL:CMDR

Address offset | 0x0000 0000
Physical address | 0x4004 1000 | Instance | RFC_DBELL
Description | Doorbell Command Register
Type | RW

Bits | Field Name | Description | Type | Reset
31:0 | CMD | Command register. Raises an interrupt to the Command and packet engine (CPE) upon write. | RW | 0x0000 0000

### TOP:RFC_DBELL:CMDSTA

Address offset | 0x0000 0004
Physical address | 0x4004 1004 | Instance | RFC_DBELL
Description | Doorbell Command Status Register
Type | RO

Bits | Field Name | Description | Type | Reset
31:0 | STAT | Status of the last command used | RO | 0x0000 0000

### TOP:RFC_DBELL:RFHWIFG

Address offset | 0x0000 0008
Physical address | 0x4004 1008 | Instance | RFC_DBELL
Description | Interrupt Flags From RF Hardware Modules
Type | RW

Bits | Field Name | Description | Type | Reset
31:20 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x000
19 | RATCH7 | Radio timer channel 7 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
18 | RATCH6 | Radio timer channel 6 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
17 | RATCH5 | Radio timer channel 5 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
16 | RATCH4 | Radio timer channel 4 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
15 | RATCH3 | Radio timer channel 3 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
14 | RATCH2 | Radio timer channel 2 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
13 | RATCH1 | Radio timer channel 1 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
12 | RATCH0 | Radio timer channel 0 interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
11 | RFESOFT2 | RF engine software defined interrupt 2 flag. Write zero to clear flag. Write to one has no effect. | RW | 0
10 | RFESOFT1 | RF engine software defined interrupt 1 flag. Write zero to clear flag. Write to one has no effect. | RW | 0
9 | RFESOFT0 | RF engine software defined interrupt 0 flag. Write zero to clear flag. Write to one has no effect. | RW | 0
8 | RFEDONE | RF engine command done interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
7 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RW std text) | RW | 0
6 | TRCTK | Debug tracer system tick interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
5 | MDMSOFT | Modem software defined interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
4 | MDMOUT | Modem FIFO output interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
3 | MDMIN | Modem FIFO input interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
2 | MDMDONE | Modem command done interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
1 | FSCA | Frequency synthesizer calibration accelerator interrupt flag. Write zero to clear flag. Write to one has no effect. | RW | 0
0 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RW std text) | RW | 0

### TOP:RFC_DBELL:RFHWIEN

Address offset | 0x0000 000C
Physical address | 0x4004 100C | Instance | RFC_DBELL
Description | Interrupt Enable For RF Hardware Modules
Type | RW

Bits | Field Name | Description | Type | Reset
31:20 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x000
19 | RATCH7 | Interrupt enable for RFHWIFG.RATCH7. | RW | 0
18 | RATCH6 | Interrupt enable for RFHWIFG.RATCH6. | RW | 0
17 | RATCH5 | Interrupt enable for RFHWIFG.RATCH5. | RW | 0
16 | RATCH4 | Interrupt enable for RFHWIFG.RATCH4. | RW | 0
15 | RATCH3 | Interrupt enable for RFHWIFG.RATCH3. | RW | 0
14 | RATCH2 | Interrupt enable for RFHWIFG.RATCH2. | RW | 0
13 | RATCH1 | Interrupt enable for RFHWIFG.RATCH1. | RW | 0
12 | RATCH0 | Interrupt enable for RFHWIFG.RATCH0. | RW | 0
11 | RFESOFT2 | Interrupt enable for RFHWIFG.RFESOFT2. | RW | 0
10 | RFESOFT1 | Interrupt enable for RFHWIFG.RFESOFT1. | RW | 0
9 | RFESOFT0 | Interrupt enable for RFHWIFG.RFESOFT0. | RW | 0
8 | RFEDONE | Interrupt enable for RFHWIFG.RFEDONE. | RW | 0
7 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RW std text) | RW | 0
6 | TRCTK | Interrupt enable for RFHWIFG.TRCTK. | RW | 0
5 | MDMSOFT | Interrupt enable for RFHWIFG.MDMSOFT. | RW | 0
4 | MDMOUT | Interrupt enable for RFHWIFG.MDMOUT. | RW | 0
3 | MDMIN | Interrupt enable for RFHWIFG.MDMIN. | RW | 0
2 | MDMDONE | Interrupt enable for RFHWIFG.MDMDONE. | RW | 0
1 | FSCA | Interrupt enable for RFHWIFG.FSCA. | RW | 0
0 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RW std text) | RW | 0

### TOP:RFC_DBELL:RFCPEIFG

Address offset | 0x0000 0010
Physical address | 0x4004 1010 | Instance | RFC_DBELL
Description | Interrupt Flags For Command and Packet Engine Generated Interrupts
Type | RW

Bits | Field Name | Description | Type | Reset
31 | INTERNAL_ERROR | Interrupt flag 31. The command and packet engine (CPE) has observed an unexpected error. A reset of the CPE is needed. This can be done by switching the RF Core power domain off and on in PRCM:PDCTL1RFC. Write zero to clear flag. Write to one has no effect. | RW | 0
30 | BOOT_DONE | Interrupt flag 30. The command and packet engine (CPE) boot is finished. Write zero to clear flag. Write to one has no effect. | RW | 0
29 | MODULES_UNLOCKED | Interrupt flag 29. As part of command and packet engine (CPE) boot process, it has opened access to RF Core modules and memories. Write zero to clear flag. Write to one has no effect. | RW | 0
28 | SYNTH_NO_LOCK | Interrupt flag 28. The phase-locked loop in frequency synthesizer has reported loss of lock. Write zero to clear flag. Write to one has no effect. | RW | 0
27 | IRQ27 | Interrupt flag 27. Write zero to clear flag. Write to one has no effect. | RW | 0
26 | RX_ABORTED | Interrupt flag 26. Packet reception stopped before packet was done. Write zero to clear flag. Write to one has no effect. | RW | 0
25 | RX_N_DATA_WRITTEN | Interrupt flag 25. Specified number of bytes written to partial read Rx buffer. Write zero to clear flag. Write to one has no effect. | RW | 0
24 | RX_DATA_WRITTEN | Interrupt flag 24. Data written to partial read Rx buffer. Write zero to clear flag. Write to one has no effect. | RW | 0
23 | RX_ENTRY_DONE | Interrupt flag 23. Rx queue data entry changing state to finished. Write zero to clear flag. Write to one has no effect. | RW | 0
22 | RX_BUF_FULL | Interrupt flag 22. Packet received that did not fit in Rx queue. BLE mode: Packet received that did not fit in the Rx queue. IEEE 802.15.4 mode: Frame received that did not fit in the Rx queue. Write zero to clear flag. Write to one has no effect. | RW | 0
21 | RX_CTRL_ACK | Interrupt flag 21. BLE mode only: LL control packet received with CRC OK, not to be ignored, then acknowledgement sent. Write zero to clear flag. Write to one has no effect. | RW | 0
20 | RX_CTRL | Interrupt flag 20. BLE mode only: LL control packet received with CRC OK, not to be ignored. Write zero to clear flag. Write to one has no effect. | RW | 0
19 | RX_EMPTY | Interrupt flag 19. BLE mode only: Packet received with CRC OK, not to be ignored, no payload. Write zero to clear flag. Write to one has no effect. | RW | 0
18 | RX_IGNORED | Interrupt flag 18. Packet received, but can be ignored. BLE mode: Packet received with CRC OK, but to be ignored. IEEE 802.15.4 mode: Frame received with ignore flag set. Write zero to clear flag. Write to one has no effect. | RW | 0
17 | RX_NOK | Interrupt flag 17. Packet received with CRC error. BLE mode: Packet received with CRC error. IEEE 802.15.4 mode: Frame received with CRC error. Write zero to clear flag. Write to one has no effect. | RW | 0
16 | RX_OK | Interrupt flag 16. Packet received correctly. BLE mode: Packet received with CRC OK, payload, and not to be ignored. IEEE 802.15.4 mode: Frame received with CRC OK. Write zero to clear flag. Write to one has no effect. | RW | 0
15 | IRQ15 | Interrupt flag 15. Write zero to clear flag. Write to one has no effect. | RW | 0
14 | IRQ14 | Interrupt flag 14. Write zero to clear flag. Write to one has no effect. | RW | 0
13 | IRQ13 | Interrupt flag 13. Write zero to clear flag. Write to one has no effect. | RW | 0
12 | BG_COMMAND_SUSPENDED | Interrupt flag 12. IEEE 802.15.4 mode only: A background level radio operation command has been suspended. Write zero to clear flag. Write to one has no effect. | RW | 0
11 | TX_BUFFER_CHANGED | Interrupt flag 11. BLE mode only: A buffer change is complete after CMD_BLE_ADV_PAYLOAD. Write zero to clear flag. Write to one has no effect. | RW | 0
10 | TX_ENTRY_DONE | Interrupt flag 10. Tx queue data entry state changed to finished. Write zero to clear flag. Write to one has no effect. | RW | 0
9 | TX_RETRANS | Interrupt flag 9. BLE mode only: Packet retransmitted. Write zero to clear flag. Write to one has no effect. | RW | 0
8 | TX_CTRL_ACK_ACK | Interrupt flag 8. BLE mode only: Acknowledgement received on a transmitted LL control packet, and acknowledgement transmitted for that packet. Write zero to clear flag. Write to one has no effect. | RW | 0
7 | TX_CTRL_ACK | Interrupt flag 7. BLE mode: Acknowledgement received on a transmitted LL control packet. Write zero to clear flag. Write to one has no effect. | RW | 0
6 | TX_CTRL | Interrupt flag 6. BLE mode: Transmitted LL control packet. Write zero to clear flag. Write to one has no effect. | RW | 0
5 | TX_ACK | Interrupt flag 5. BLE mode: Acknowledgement received on a transmitted packet. IEEE 802.15.4 mode: Transmitted automatic ACK frame. Write zero to clear flag. Write to one has no effect. | RW | 0
4 | TX_DONE | Interrupt flag 4. Packet transmitted. (BLE mode: A packet has been transmitted.) (IEEE 802.15.4 mode: A frame has been transmitted). Write zero to clear flag. Write to one has no effect. | RW | 0
3 | LAST_FG_COMMAND_DONE | Interrupt flag 3. IEEE 802.15.4 mode only: The last foreground radio operation command in a chain of commands has finished. Write zero to clear flag. Write to one has no effect. | RW | 0
2 | FG_COMMAND_DONE | Interrupt flag 2. IEEE 802.15.4 mode only: A foreground radio operation command has finished. Write zero to clear flag. Write to one has no effect. | RW | 0
1 | LAST_COMMAND_DONE | Interrupt flag 1. The last radio operation command in a chain of commands has finished. (IEEE 802.15.4 mode: The last background level radio operation command in a chain of commands has finished.) Write zero to clear flag. Write to one has no effect. | RW | 0
0 | COMMAND_DONE | Interrupt flag 0. A radio operation has finished. (IEEE 802.15.4 mode: A background level radio operation command has finished.) Write zero to clear flag. Write to one has no effect. | RW | 0

### TOP:RFC_DBELL:RFCPEIEN

Address offset | 0x0000 0014
Physical address | 0x4004 1014 | Instance | RFC_DBELL
Description | Interrupt Enable For Command and Packet Engine Generated Interrupts
Type | RW

Bits | Field Name | Description | Type | Reset
31 | INTERNAL_ERROR | Interrupt enable for RFCPEIFG.INTERNAL_ERROR. | RW | 1
30 | BOOT_DONE | Interrupt enable for RFCPEIFG.BOOT_DONE. | RW | 1
29 | MODULES_UNLOCKED | Interrupt enable for RFCPEIFG.MODULES_UNLOCKED. | RW | 1
28 | SYNTH_NO_LOCK | Interrupt enable for RFCPEIFG.SYNTH_NO_LOCK. | RW | 1
27 | IRQ27 | Interrupt enable for RFCPEIFG.IRQ27. | RW | 1
26 | RX_ABORTED | Interrupt enable for RFCPEIFG.RX_ABORTED. | RW | 1
25 | RX_N_DATA_WRITTEN | Interrupt enable for RFCPEIFG.RX_N_DATA_WRITTEN. | RW | 1
24 | RX_DATA_WRITTEN | Interrupt enable for RFCPEIFG.RX_DATA_WRITTEN. | RW | 1
23 | RX_ENTRY_DONE | Interrupt enable for RFCPEIFG.RX_ENTRY_DONE. | RW | 1
22 | RX_BUF_FULL | Interrupt enable for RFCPEIFG.RX_BUF_FULL. | RW | 1
21 | RX_CTRL_ACK | Interrupt enable for RFCPEIFG.RX_CTRL_ACK. | RW | 1
20 | RX_CTRL | Interrupt enable for RFCPEIFG.RX_CTRL. | RW | 1
19 | RX_EMPTY | Interrupt enable for RFCPEIFG.RX_EMPTY. | RW | 1
18 | RX_IGNORED | Interrupt enable for RFCPEIFG.RX_IGNORED. | RW | 1
17 | RX_NOK | Interrupt enable for RFCPEIFG.RX_NOK. | RW | 1
16 | RX_OK | Interrupt enable for RFCPEIFG.RX_OK. | RW | 1
15 | IRQ15 | Interrupt enable for RFCPEIFG.IRQ15. | RW | 1
14 | IRQ14 | Interrupt enable for RFCPEIFG.IRQ14. | RW | 1
13 | IRQ13 | Interrupt enable for RFCPEIFG.IRQ13. | RW | 1
12 | BG_COMMAND_SUSPENDED | Interrupt enable for RFCPEIFG.BG_COMMAND_SUSPENDED. | RW | 1
11 | TX_BUFFER_CHANGED | Interrupt enable for RFCPEIFG.TX_BUFFER_CHANGED. | RW | 1
10 | TX_ENTRY_DONE | Interrupt enable for RFCPEIFG.TX_ENTRY_DONE. | RW | 1
9 | TX_RETRANS | Interrupt enable for RFCPEIFG.TX_RETRANS. | RW | 1
8 | TX_CTRL_ACK_ACK | Interrupt enable for RFCPEIFG.TX_CTRL_ACK_ACK. | RW | 1
7 | TX_CTRL_ACK | Interrupt enable for RFCPEIFG.TX_CTRL_ACK. | RW | 1
6 | TX_CTRL | Interrupt enable for RFCPEIFG.TX_CTRL. | RW | 1
5 | TX_ACK | Interrupt enable for RFCPEIFG.TX_ACK. | RW | 1
4 | TX_DONE | Interrupt enable for RFCPEIFG.TX_DONE. | RW | 1
3 | LAST_FG_COMMAND_DONE | Interrupt enable for RFCPEIFG.LAST_FG_COMMAND_DONE. | RW | 1
2 | FG_COMMAND_DONE | Interrupt enable for RFCPEIFG.FG_COMMAND_DONE. | RW | 1
1 | LAST_COMMAND_DONE | Interrupt enable for RFCPEIFG.LAST_COMMAND_DONE. | RW | 1
0 | COMMAND_DONE | Interrupt enable for RFCPEIFG.COMMAND_DONE. | RW | 1

### TOP:RFC_DBELL:RFCPEISL

Address offset | 0x0000 0018
Physical address | 0x4004 1018 | Instance | RFC_DBELL
Description | Interrupt Vector Selection For Command and Packet Engine Generated Interrupts
Type | RW

Bits | Field Name | Description | Type | Reset
31 | INTERNAL_ERROR | Select which CPU interrupt vector the RFCPEIFG.INTERNAL_ERROR interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
30 | BOOT_DONE | Select which CPU interrupt vector the RFCPEIFG.BOOT_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
29 | MODULES_UNLOCKED | Select which CPU interrupt vector the RFCPEIFG.MODULES_UNLOCKED interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
28 | SYNTH_NO_LOCK | Select which CPU interrupt vector the RFCPEIFG.SYNTH_NO_LOCK interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
27 | IRQ27 | Select which CPU interrupt vector the RFCPEIFG.IRQ27 interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
26 | RX_ABORTED | Select which CPU interrupt vector the RFCPEIFG.RX_ABORTED interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
25 | RX_N_DATA_WRITTEN | Select which CPU interrupt vector the RFCPEIFG.RX_N_DATA_WRITTEN interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
24 | RX_DATA_WRITTEN | Select which CPU interrupt vector the RFCPEIFG.RX_DATA_WRITTEN interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
23 | RX_ENTRY_DONE | Select which CPU interrupt vector the RFCPEIFG.RX_ENTRY_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
22 | RX_BUF_FULL | Select which CPU interrupt vector the RFCPEIFG.RX_BUF_FULL interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
21 | RX_CTRL_ACK | Select which CPU interrupt vector the RFCPEIFG.RX_CTRL_ACK interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
20 | RX_CTRL | Select which CPU interrupt vector the RFCPEIFG.RX_CTRL interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
19 | RX_EMPTY | Select which CPU interrupt vector the RFCPEIFG.RX_EMPTY interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
18 | RX_IGNORED | Select which CPU interrupt vector the RFCPEIFG.RX_IGNORED interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
17 | RX_NOK | Select which CPU interrupt vector the RFCPEIFG.RX_NOK interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
16 | RX_OK | Select which CPU interrupt vector the RFCPEIFG.RX_OK interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 1
15 | IRQ15 | Select which CPU interrupt vector the RFCPEIFG.IRQ15 interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
14 | IRQ14 | Select which CPU interrupt vector the RFCPEIFG.IRQ14 interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
13 | IRQ13 | Select which CPU interrupt vector the RFCPEIFG.IRQ13 interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
12 | BG_COMMAND_SUSPENDED | Select which CPU interrupt vector the RFCPEIFG.BG_COMMAND_SUSPENDED interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
11 | TX_BUFFER_CHANGED | Select which CPU interrupt vector the RFCPEIFG.TX_BUFFER_CHANGED interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
10 | TX_ENTRY_DONE | Select which CPU interrupt vector the RFCPEIFG.TX_ENTRY_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
9 | TX_RETRANS | Select which CPU interrupt vector the RFCPEIFG.TX_RETRANS interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
8 | TX_CTRL_ACK_ACK | Select which CPU interrupt vector the RFCPEIFG.TX_CTRL_ACK_ACK interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
7 | TX_CTRL_ACK | Select which CPU interrupt vector the RFCPEIFG.TX_CTRL_ACK interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
6 | TX_CTRL | Select which CPU interrupt vector the RFCPEIFG.TX_CTRL interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
5 | TX_ACK | Select which CPU interrupt vector the RFCPEIFG.TX_ACK interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
4 | TX_DONE | Select which CPU interrupt vector the RFCPEIFG.TX_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
3 | LAST_FG_COMMAND_DONE | Select which CPU interrupt vector the RFCPEIFG.LAST_FG_COMMAND_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
2 | FG_COMMAND_DONE | Select which CPU interrupt vector the RFCPEIFG.FG_COMMAND_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
1 | LAST_COMMAND_DONE | Select which CPU interrupt vector the RFCPEIFG.LAST_COMMAND_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0
0 | COMMAND_DONE | Select which CPU interrupt vector the RFCPEIFG.COMMAND_DONE interrupt should use.
Value | ENUM name | Description
0 | CPE0 | Associate this interrupt line with INT_RF_CPE0 interrupt vector
1 | CPE1 | Associate this interrupt line with INT_RF_CPE1 interrupt vector
| RW | 0

### TOP:RFC_DBELL:RFACKIFG

Address offset | 0x0000 001C
Physical address | 0x4004 101C | Instance | RFC_DBELL
Description | Doorbell Command Acknowledgement Interrupt Flag
Type | RW

Bits | Field Name | Description | Type | Reset
31:1 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x0000 0000
0 | ACKFLAG | Interrupt flag for Command ACK | RW | 0

### TOP:RFC_DBELL:SYSGPOCTL

Address offset | 0x0000 0020
Physical address | 0x4004 1020 | Instance | RFC_DBELL
Description | RF Core General Purpose Output Control
Type | RW

Bits | Field Name | Description | Type | Reset
31:16 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x0000
15:12 | GPOCTL3 | RF Core GPO control bit 3. Selects which signal to output on the RF Core GPO line 3.
Value | ENUM name | Description
0x0 | CPEGPO0 | CPE GPO line 0
0x1 | CPEGPO1 | CPE GPO line 1
0x2 | CPEGPO2 | CPE GPO line 2
0x3 | CPEGPO3 | CPE GPO line 3
0x4 | MCEGPO0 | MCE GPO line 0
0x5 | MCEGPO1 | MCE GPO line 1
0x6 | MCEGPO2 | MCE GPO line 2
0x7 | MCEGPO3 | MCE GPO line 3
0x8 | RFEGPO0 | RFE GPO line 0
0x9 | RFEGPO1 | RFE GPO line 1
0xA | RFEGPO2 | RFE GPO line 2
0xB | RFEGPO3 | RFE GPO line 3
0xC | RATGPO0 | RAT GPO line 0
0xD | RATGPO1 | RAT GPO line 1
0xE | RATGPO2 | RAT GPO line 2
0xF | RATGPO3 | RAT GPO line 3
| RW | 0x0
11:8 | GPOCTL2 | RF Core GPO control bit 2. Selects which signal to output on the RF Core GPO line 2.
Value | ENUM name | Description
0x0 | CPEGPO0 | CPE GPO line 0
0x1 | CPEGPO1 | CPE GPO line 1
0x2 | CPEGPO2 | CPE GPO line 2
0x3 | CPEGPO3 | CPE GPO line 3
0x4 | MCEGPO0 | MCE GPO line 0
0x5 | MCEGPO1 | MCE GPO line 1
0x6 | MCEGPO2 | MCE GPO line 2
0x7 | MCEGPO3 | MCE GPO line 3
0x8 | RFEGPO0 | RFE GPO line 0
0x9 | RFEGPO1 | RFE GPO line 1
0xA | RFEGPO2 | RFE GPO line 2
0xB | RFEGPO3 | RFE GPO line 3
0xC | RATGPO0 | RAT GPO line 0
0xD | RATGPO1 | RAT GPO line 1
0xE | RATGPO2 | RAT GPO line 2
0xF | RATGPO3 | RAT GPO line 3
| RW | 0x0
7:4 | GPOCTL1 | RF Core GPO control bit 1. Selects which signal to output on the RF Core GPO line 1.
Value | ENUM name | Description
0x0 | CPEGPO0 | CPE GPO line 0
0x1 | CPEGPO1 | CPE GPO line 1
0x2 | CPEGPO2 | CPE GPO line 2
0x3 | CPEGPO3 | CPE GPO line 3
0x4 | MCEGPO0 | MCE GPO line 0
0x5 | MCEGPO1 | MCE GPO line 1
0x6 | MCEGPO2 | MCE GPO line 2
0x7 | MCEGPO3 | MCE GPO line 3
0x8 | RFEGPO0 | RFE GPO line 0
0x9 | RFEGPO1 | RFE GPO line 1
0xA | RFEGPO2 | RFE GPO line 2
0xB | RFEGPO3 | RFE GPO line 3
0xC | RATGPO0 | RAT GPO line 0
0xD | RATGPO1 | RAT GPO line 1
0xE | RATGPO2 | RAT GPO line 2
0xF | RATGPO3 | RAT GPO line 3
| RW | 0x0
3:0 | GPOCTL0 | RF Core GPO control bit 0. Selects which signal to output on the RF Core GPO line 0.
Value | ENUM name | Description
0x0 | CPEGPO0 | CPE GPO line 0
0x1 | CPEGPO1 | CPE GPO line 1
0x2 | CPEGPO2 | CPE GPO line 2
0x3 | CPEGPO3 | CPE GPO line 3
0x4 | MCEGPO0 | MCE GPO line 0
0x5 | MCEGPO1 | MCE GPO line 1
0x6 | MCEGPO2 | MCE GPO line 2
0x7 | MCEGPO3 | MCE GPO line 3
0x8 | RFEGPO0 | RFE GPO line 0
0x9 | RFEGPO1 | RFE GPO line 1
0xA | RFEGPO2 | RFE GPO line 2
0xB | RFEGPO3 | RFE GPO line 3
0xC | RATGPO0 | RAT GPO line 0
0xD | RATGPO1 | RAT GPO line 1
0xE | RATGPO2 | RAT GPO line 2
0xF | RATGPO3 | RAT GPO line 3
| RW | 0x0