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event.h
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1 /******************************************************************************
2 * Filename: event.h
3 * Revised: 2015-01-14 12:12:44 +0100 (on, 14 jan 2015)
4 * Revision: 42373
5 *
6 * Description: Defines and prototypes for the Event Handler.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
43 //
44 //*****************************************************************************
45
46 #ifndef __EVENT_H__
47 #define __EVENT_H__
48
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include <inc/hw_types.h>
63 #include <inc/hw_memmap.h>
64 #include <inc/hw_event.h>
65 #include <driverlib/debug.h>
66
67 //*****************************************************************************
68 //
69 // Common input event list for the event module (TBD : Remember to update list)
70 //
71 //*****************************************************************************
72 #define EVENT_ALWAYS_0 0 // Unused - always '0'
73 #define EVENT_AON_PROG_0 1 // AON Programmable 0
74 #define EVENT_AON_PROG_1 2 // AON Programmable 1
75 #define EVENT_AON_PROG_2 3 // AON Programmable 2
76 #define EVENT_AON_EDGE_DETECT 4 // AON Edge Detect
77 #define EVENT_AON_SPIS_RTX 5 // AON SPIS RTX
78 #define EVENT_AON_SPIS_CS 6 // AON SPIS Chip Select
79 #define EVENT_AON_RTCCOMDLY 7 // AON Real Time Clock Combined Delayed
80 #define EVENT_AUX_SM 8 // AUX State Machine
81 #define EVENT_I2C_INTERRUPT 9 // I2C Interrupt
82 #define EVENT_AON_AUX0 10 // AON event for AUX
83 #define EVENT_PTIM_RTX 11 // MCU Combined
84 #define EVENT_TIMER2_A 12 // General Purpose Timer 2A
85 #define EVENT_TIMER2_B 13 // General Purpose Timer 2B
86 #define EVENT_TIMER3_A 14 // General Purpose Timer 3A
87 #define EVENT_TIMER3_B 15 // General Purpose Timer 3B
88 #define EVENT_TIMER0_A 16 // General Purpose Timer 0A
89 #define EVENT_TIMER0_B 17 // General Purpose Timer 0B
90 #define EVENT_TIMER1_A 18 // General Purpose Timer 1A
91 #define EVENT_TIMER1_B 19 // General Purpose Timer 1B
92 #define EVENT_SW0_DONE 20 // Software Event 0 Done
93 #define EVENT_FLASH 21 // Flash event
94 #define EVENT_SW1_DMA_DONE 22 // Software event 1 DMA done
95 #define EVENT_ADC 23 // ADC event
96 #define EVENT_WATCHDOG 24 // Watchdog Timer
97 #define EVENT_RFCORE_CMD_ACK 25 // RF command acknowledge
98 #define EVENT_RFCORE_HW 26 // RF Hardware Event
99 #define EVENT_RFCORE_CPE0 27 // RF Core Packet Engine 0
100 #define EVENT_PRCM_BUSON 28 // PRCM
101 #define EVENT_AUX_CMP 29 // AUX Compare
102 #define EVENT_RFCORE_CPE1 30 // RF Core Packet Engine 1
103 #define EVENT_PRCM 31 // Power Reset Clock Management
104 #define EVENT_AUX_ERR 32 // AUX Error Event
105 #define EVENT_AUX_ADC 33 // AUX_ADC
106 #define EVENT_SSI0 34 // SSI0 combined
107 #define EVENT_SSI1 35 // SSI1 combined
108 #define EVENT_UART0 36 // UART0 combined
109 #define EVENT_UART1 37 // UART1 combined
110 #define EVENT_DMA_ERR 38 // Error event from DMA
111 #define EVENT_DMA_DONE 39 // Combined done event from DMA
112 #define EVENT_SSI0_RX_BURST 40 // SSI0 Rx burst
113 #define EVENT_SSI0_RX_SINGLE 41 // SSI0 Rx single
114 #define EVENT_SSI0_TX_BURST 42 // SSI0 Tx burst
115 #define EVENT_SSI0_TX_SINGLE 43 // SSI0 Tx single
116 #define EVENT_SSI1_RX_BURST 44 // SSI1 Rx burst
117 #define EVENT_SSI1_RX_SINGLE 45 // SSI1 Rx single
118 #define EVENT_SSI1_TX_BURST 46 // SSI1 Tx burst
119 #define EVENT_SSI1_TX_SINGLE 47 // SSI1 Tx single
120 #define EVENT_UART0_RX_BURST 48 // UART0 Rx burst
121 #define EVENT_UART0_RX_SINGLE 49 // UART0 Rx single
122 #define EVENT_UART0_TX_BURST 50 // UART0 Tx burst
123 #define EVENT_UART0_TX_SINGLE 51 // UART0 Tx single
124 #define EVENT_UART1_RX_BURST 52 // UART1 Rx burst
125 #define EVENT_UART1_RX_SINGLE 53 // UART1 Rx single
126 #define EVENT_UART1_TX_BURST 54 // UART1 Tx burst
127 #define EVENT_UART1_TX_SINGLE 55 // UART1 Tx single
128 #define EVENT_SPIS 56 // SPIS Combined event
129 #define EVENT_AON_SPIS_RX_BURST 57 // AON SPIS RX burst
130 #define EVENT_AON_SPIS_RX_SINGLE 58 // AON SPIS RX single
131 #define EVENT_AON_SPIS_TX_BURST 59 // AON SPIS TX burst
132 #define EVENT_AON_SPIS_TX_SINGLE 60 // AON SPIS TX single
133 #define EVENT_TIMER0_A_COMP 61 // GPT0 compare A
134 #define EVENT_TIMER0_B_COMP 62 // GPT0 compare B
135 #define EVENT_TIMER1_A_COMP 63 // GPT1 compare A
136 #define EVENT_TIMER1_B_COMP 64 // GPT1 compare B
137 #define EVENT_TIMER2_A_COMP 65 // GPT2 compare A
138 #define EVENT_TIMER2_B_COMP 66 // GPT2 compare B
139 #define EVENT_TIMER3_A_COMP 67 // GPT3 compare A
140 #define EVENT_TIMER3_B_COMP 68 // GPT3 compare B
141 #define EVENT_TIMER0_A_SREQ_ 69 // GPT SREQ timer 0A
142 #define EVENT_TIMER0_B_SREQ 70 // GPT SREQ timer 0B
143 #define EVENT_TIMER1_A_SREQ 71 // GPT SREQ timer 1A
144 #define EVENT_TIMER1_B_SREQ 72 // GPT SREQ timer 1B
145 #define EVENT_TIMER2_A_SREQ 73 // GPT SREQ timer 2A
146 #define EVENT_TIMER2_B_SREQ 74 // GPT SREQ timer 2B
147 #define EVENT_TIMER3_A_SREQ 75 // GPT SREQ timer 3A
148 #define EVENT_TIMER3_B_SREQ 76 // GPT SREQ timer 3B
149 #define EVENT_TIMER0_A_REQ 77 // GPT REQ timer 0A
150 #define EVENT_TIMER0_B_REQ 78 // GPT REQ timer 0B
151 #define EVENT_TIMER1_A_REQ 79 // GPT REQ timer 1A
152 #define EVENT_TIMER1_B_REQ 80 // GPT REQ timer 1B
153 #define EVENT_TIMER2_A_REQ 81 // GPT REQ timer 2A
154 #define EVENT_TIMER2_B_REQ 82 // GPT REQ timer 2B
155 #define EVENT_TIMER3_A_REQ 83 // GPT REQ timer 3A
156 #define EVENT_TIMER3_B_REQ 84 // GPT REQ timer 3B
157 #define EVENT_PAD_IN_TIMER_SUB0 85 // Pad inputs for GPT subscribers - 0
158 #define EVENT_PAD_IN_TIMER_SUB1 86 // Pad inputs for GPT subscribers - 1
159 #define EVENT_PAD_IN_TIMER_SUB2 87 // Pad inputs for GPT subscribers - 2
160 #define EVENT_PAD_IN_TIMER_SUB3 88 // Pad inputs for GPT subscribers - 3
161 #define EVENT_PAD_IN_TIMER_SUB4 89 // Pad inputs for GPT subscribers - 4
162 #define EVENT_PAD_IN_TIMER_SUB5 90 // Pad inputs for GPT subscribers - 5
163 #define EVENT_PAD_IN_TIMER_SUB6 91 // Pad inputs for GPT subscribers - 6
164 #define EVENT_PAD_IN_TIMER_SUB7 92 // Pad inputs for GPT subscribers - 7
165 #define EVENT_CRYPTO_RES_RDY 93 // Crypto core result available
166 #define EVENT_CRYPTO_DMA_DONE 94 // Crypto core dma done
167 #define EVENT_RFCORE_INPUT_1 95 // RF Core input event 1
168 #define EVENT_RFCORE_INPUT_2 96 // RF Core input event 2
169 #define EVENT_RFCORE_INPUT_3 97 // RF Core input event 3
170 #define EVENT_RFCORE_INPUT_4 98 // RF Core input event 4
171 #define EVENT_NMI 99 // Maskable Interrupt
172 #define EVENT_SW0 100 // Software 0
173 #define EVENT_SW1 101 // Software 1
174 #define EVENT_SW2 102 // Software 2
175 #define EVENT_SW3 103 // Software 3
176 #define EVENT_TRNG 104 // TRNG interrupt
177 #define EVENT_AUX0 105 // AUX MCU trigger 0 event
178 #define EVENT_AUX1 106 // AUX MCU trigger 1 event
179 #define EVENT_AUX2 107 // AUX MCU trigger 2 event
180 #define EVENT_AUX3 108 // AUX MCU trigger 3 event
181 #define EVENT_AUX4 109 // AUX MCU trigger 4 event
182 #define EVENT_AUX5 110 // AUX MCU trigger 5 event
183 #define EVENT_AUX6 111 // AUX MCU trigger 6 event
184 #define EVENT_AUX7 112 // AUX MCU trigger 7 event
185 #define EVENT_AUX8 113 // AUX MCU trigger 8 event
186 #define EVENT_AUX9 114 // AUX MCU trigger 9 event
187 #define EVENT_AUX10 115 // AUX MCU trigger 10 event
188 #define EVENT_AUX_DMA_SW 116 // AUX DMA SW request
189 #define EVENT_AUX_DMA_SINGLE 117 // AUX DMA single request
190 #define EVENT_AUX_DMA_BURST 118 // AUX DMA burst request
191 #define EVENT_AON_RTC_UPD 119 // AON RTC update
192 #define EVENT_HALTED 120 // Halted
193 #define EVENT_ALWAYS_1 121 // Unused - always '1'
194
195 //*****************************************************************************
196 //
197 // Defines for the dynamic event lines that can be configured in the
198 // event controller.
199 //
200 //*****************************************************************************
201 #define EVENT_CM3_PROG EVENT_O_CPUIRQSEL30
202
203 #define EVENT_RFCORE_PROG EVENT_O_RFCSEL9
204
205 #define EVENT_TIMER0_A_PROG EVENT_O_GPT0ACAPTSEL
206 #define EVENT_TIMER0_B_PROG EVENT_O_GPT0BCAPTSEL
207 #define EVENT_TIMER1_A_PROG EVENT_O_GPT1ACAPTSEL
208 #define EVENT_TIMER1_B_PROG EVENT_O_GPT1BCAPTSEL
209 #define EVENT_TIMER2_A_PROG EVENT_O_GPT2ACAPTSEL
210 #define EVENT_TIMER2_B_PROG EVENT_O_GPT2BCAPTSEL
211 #define EVENT_TIMER3_A_PROG EVENT_O_GPT3ACAPTSEL
212 #define EVENT_TIMER3_B_PROG EVENT_O_GPT3BCAPTSEL
213
214 #define EVENT_UDMA_PROG0 EVENT_O_UDMACH9SSEL
215 #define EVENT_UDMA_PROG1 EVENT_O_UDMACH9BSEL
216 #define EVENT_UDMA_PROG2 EVENT_O_UDMACH10SSEL
217 #define EVENT_UDMA_PROG3 EVENT_O_UDMACH10BSEL
218 #define EVENT_UDMA_PROG4 EVENT_O_UDMACH11SSEL
219 #define EVENT_UDMA_PROG5 EVENT_O_UDMACH11BSEL
220 #define EVENT_UDMA_PROG6 EVENT_O_UDMACH12SSEL
221 #define EVENT_UDMA_PROG7 EVENT_O_UDMACH12BSEL
222 #define EVENT_UDMA_PROG8 EVENT_O_UDMACH14BSEL
223 #define EVENT_UDMA_PROG9 EVENT_O_UDMACH14BSEL
224
225 #define EVENT_AUX_PROG EVENT_O_GPT0ACAPTSEL
226
227 #define EVENT_I2S_PROG EVENT_O_I2SSTMPSEL0
228
229 #define EVENT_FREEZE_PROG EVENT_O_FRZSEL0
230
231 //*****************************************************************************
232 //
233 // API Functions and prototypes
234 //
235 //*****************************************************************************
236
237 //*****************************************************************************
238 //
256 //
257 //*****************************************************************************
258 __STATIC_INLINE void
259 EventRegister(uint32_t ui32ProgOut, uint32_t ui32EventId)
260 {
261 //
262 // Check the arguments.
263 //
264 ASSERT((ui32ProgOut == EVENT_CM3_PROG) ||
265 (ui32ProgOut == EVENT_RFCORE_PROG) ||
266 (ui32ProgOut == EVENT_TIMER0_A_PROG) ||
267 (ui32ProgOut == EVENT_TIMER0_B_PROG) ||
268 (ui32ProgOut == EVENT_TIMER1_A_PROG) ||
269 (ui32ProgOut == EVENT_TIMER1_B_PROG) ||
270 (ui32ProgOut == EVENT_TIMER2_A_PROG) ||
271 (ui32ProgOut == EVENT_TIMER2_B_PROG) ||
272 (ui32ProgOut == EVENT_TIMER3_A_PROG) ||
273 (ui32ProgOut == EVENT_TIMER3_B_PROG) ||
274 (ui32ProgOut == EVENT_UDMA_PROG0) ||
275 (ui32ProgOut == EVENT_UDMA_PROG1) ||
276 (ui32ProgOut == EVENT_UDMA_PROG2) ||
277 (ui32ProgOut == EVENT_UDMA_PROG3) ||
278 (ui32ProgOut == EVENT_UDMA_PROG4) ||
279 (ui32ProgOut == EVENT_UDMA_PROG5) ||
280 (ui32ProgOut == EVENT_UDMA_PROG6) ||
281 (ui32ProgOut == EVENT_UDMA_PROG7) ||
282 (ui32ProgOut == EVENT_UDMA_PROG8) ||
283 (ui32ProgOut == EVENT_UDMA_PROG9) ||
284 (ui32ProgOut == EVENT_AUX_PROG) ||
285 (ui32ProgOut == EVENT_I2S_PROG) ||
286 (ui32ProgOut == EVENT_FREEZE_PROG));
287 ASSERT((ui32EventId == EVENT_ALWAYS_0) ||
288 (ui32EventId == EVENT_AON_PROG_0) ||
289 (ui32EventId == EVENT_AON_PROG_1) ||
290 (ui32EventId == EVENT_AON_PROG_2) ||
291 (ui32EventId == EVENT_AON_EDGE_DETECT) ||
292 (ui32EventId == EVENT_AON_SPIS_RTX) ||
293 (ui32EventId == EVENT_AON_SPIS_CS) ||
294 (ui32EventId == EVENT_AON_RTCCOMDLY) ||
295 (ui32EventId == EVENT_AUX_SM) ||
296 (ui32EventId == EVENT_I2C_INTERRUPT) ||
297 (ui32EventId == EVENT_AON_AUX0) ||
298 (ui32EventId == EVENT_PTIM_RTX) ||
299 (ui32EventId == EVENT_TIMER2_A) ||
300 (ui32EventId == EVENT_TIMER2_B) ||
301 (ui32EventId == EVENT_TIMER3_A) ||
302 (ui32EventId == EVENT_TIMER3_B) ||
303 (ui32EventId == EVENT_TIMER0_A) ||
304 (ui32EventId == EVENT_TIMER0_B) ||
305 (ui32EventId == EVENT_TIMER1_A) ||
306 (ui32EventId == EVENT_TIMER1_B) ||
307 (ui32EventId == EVENT_SW0_DONE) ||
308 (ui32EventId == EVENT_FLASH) ||
309 (ui32EventId == EVENT_SW1_DMA_DONE) ||
310 (ui32EventId == EVENT_ADC) ||
311 (ui32EventId == EVENT_WATCHDOG) ||
312 (ui32EventId == EVENT_RFCORE_CMD_ACK) ||
313 (ui32EventId == EVENT_RFCORE_HW) ||
314 (ui32EventId == EVENT_RFCORE_CPE0) ||
315 (ui32EventId == EVENT_PRCM_BUSON) ||
316 (ui32EventId == EVENT_AUX_CMP) ||
317 (ui32EventId == EVENT_RFCORE_CPE1) ||
318 (ui32EventId == EVENT_PRCM) ||
319 (ui32EventId == EVENT_AUX_ERR) ||
320 (ui32EventId == EVENT_AUX_ADC) ||
321 (ui32EventId == EVENT_SSI0) ||
322 (ui32EventId == EVENT_SSI1) ||
323 (ui32EventId == EVENT_UART0) ||
324 (ui32EventId == EVENT_UART1) ||
325 (ui32EventId == EVENT_DMA_ERR) ||
326 (ui32EventId == EVENT_DMA_DONE) ||
327 (ui32EventId == EVENT_SSI0_RX_BURST) ||
328 (ui32EventId == EVENT_SSI0_RX_SINGLE) ||
329 (ui32EventId == EVENT_SSI0_TX_BURST) ||
330 (ui32EventId == EVENT_SSI0_TX_SINGLE) ||
331 (ui32EventId == EVENT_SSI1_RX_BURST) ||
332 (ui32EventId == EVENT_SSI1_RX_SINGLE) ||
333 (ui32EventId == EVENT_SSI1_TX_BURST) ||
334 (ui32EventId == EVENT_SSI1_TX_SINGLE) ||
335 (ui32EventId == EVENT_UART0_RX_BURST) ||
336 (ui32EventId == EVENT_UART0_RX_SINGLE) ||
337 (ui32EventId == EVENT_UART0_TX_BURST) ||
338 (ui32EventId == EVENT_UART0_TX_SINGLE) ||
339 (ui32EventId == EVENT_UART1_RX_BURST) ||
340 (ui32EventId == EVENT_UART1_RX_SINGLE) ||
341 (ui32EventId == EVENT_UART1_TX_BURST) ||
342 (ui32EventId == EVENT_UART1_TX_SINGLE) ||
343 (ui32EventId == EVENT_SPIS) ||
344 (ui32EventId == EVENT_AON_SPIS_RX_BURST) ||
345 (ui32EventId == EVENT_AON_SPIS_RX_SINGLE) ||
346 (ui32EventId == EVENT_AON_SPIS_TX_BURST) ||
347 (ui32EventId == EVENT_AON_SPIS_TX_SINGLE) ||
348 (ui32EventId == EVENT_TIMER0_A_COMP) ||
349 (ui32EventId == EVENT_TIMER0_B_COMP) ||
350 (ui32EventId == EVENT_TIMER1_A_COMP) ||
351 (ui32EventId == EVENT_TIMER1_B_COMP) ||
352 (ui32EventId == EVENT_TIMER2_A_COMP) ||
353 (ui32EventId == EVENT_TIMER2_B_COMP) ||
354 (ui32EventId == EVENT_TIMER3_A_COMP) ||
355 (ui32EventId == EVENT_TIMER3_B_COMP) ||
356 (ui32EventId == EVENT_TIMER0_A_SREQ_) ||
357 (ui32EventId == EVENT_TIMER0_B_SREQ) ||
358 (ui32EventId == EVENT_TIMER1_A_SREQ) ||
359 (ui32EventId == EVENT_TIMER1_B_SREQ) ||
360 (ui32EventId == EVENT_TIMER2_A_SREQ) ||
361 (ui32EventId == EVENT_TIMER2_B_SREQ) ||
362 (ui32EventId == EVENT_TIMER3_A_SREQ) ||
363 (ui32EventId == EVENT_TIMER3_B_SREQ) ||
364 (ui32EventId == EVENT_TIMER0_A_REQ) ||
365 (ui32EventId == EVENT_TIMER0_B_REQ) ||
366 (ui32EventId == EVENT_TIMER1_A_REQ) ||
367 (ui32EventId == EVENT_TIMER1_B_REQ) ||
368 (ui32EventId == EVENT_TIMER2_A_REQ) ||
369 (ui32EventId == EVENT_TIMER2_B_REQ) ||
370 (ui32EventId == EVENT_TIMER3_A_REQ) ||
371 (ui32EventId == EVENT_TIMER3_B_REQ) ||
372 (ui32EventId == EVENT_PAD_IN_TIMER_SUB0) ||
373 (ui32EventId == EVENT_PAD_IN_TIMER_SUB1) ||
374 (ui32EventId == EVENT_PAD_IN_TIMER_SUB2) ||
375 (ui32EventId == EVENT_PAD_IN_TIMER_SUB3) ||
376 (ui32EventId == EVENT_PAD_IN_TIMER_SUB4) ||
377 (ui32EventId == EVENT_PAD_IN_TIMER_SUB5) ||
378 (ui32EventId == EVENT_PAD_IN_TIMER_SUB6) ||
379 (ui32EventId == EVENT_PAD_IN_TIMER_SUB7) ||
380 (ui32EventId == EVENT_CRYPTO_RES_RDY) ||
381 (ui32EventId == EVENT_CRYPTO_DMA_DONE) ||
382 (ui32EventId == EVENT_RFCORE_INPUT_1) ||
383 (ui32EventId == EVENT_RFCORE_INPUT_2) ||
384 (ui32EventId == EVENT_RFCORE_INPUT_3) ||
385 (ui32EventId == EVENT_RFCORE_INPUT_4) ||
386 (ui32EventId == EVENT_NMI) ||
387 (ui32EventId == EVENT_SW0) ||
388 (ui32EventId == EVENT_SW1) ||
389 (ui32EventId == EVENT_SW2) ||
390 (ui32EventId == EVENT_SW3) ||
391 (ui32EventId == EVENT_TRNG) ||
392 (ui32EventId == EVENT_AUX0) ||
393 (ui32EventId == EVENT_AUX1) ||
394 (ui32EventId == EVENT_AUX2) ||
395 (ui32EventId == EVENT_AUX3) ||
396 (ui32EventId == EVENT_AUX4) ||
397 (ui32EventId == EVENT_AUX5) ||
398 (ui32EventId == EVENT_AUX6) ||
399 (ui32EventId == EVENT_AUX7) ||
400 (ui32EventId == EVENT_AUX8) ||
401 (ui32EventId == EVENT_AUX9) ||
402 (ui32EventId == EVENT_AUX10) ||
403 (ui32EventId == EVENT_AUX_DMA_SW) ||
404 (ui32EventId == EVENT_AUX_DMA_SINGLE) ||
405 (ui32EventId == EVENT_AUX_DMA_BURST) ||
406 (ui32EventId == EVENT_AON_RTC_UPD) ||
407 (ui32EventId == EVENT_HALTED) ||
408 (ui32EventId == EVENT_ALWAYS_1));
409
410 //
411 // Register the event.
412 //
413 HWREG(EVENT_BASE + ui32ProgOut) = ui32EventId;
414 }
415
416 //*****************************************************************************
417 //
418 // Mark the end of the C bindings section for C++ compilers.
419 //
420 //*****************************************************************************
421 #ifdef __cplusplus
422 }
423 #endif
424
425 #endif // __EVENT_H__
426
427 //*****************************************************************************
428 //
431 //
432 //*****************************************************************************
EVENT_TIMER0_A_REQ
#define EVENT_TIMER0_A_REQ
Definition: event.h:149
EVENT_TIMER2_B_COMP
#define EVENT_TIMER2_B_COMP
Definition: event.h:138
EVENT_PAD_IN_TIMER_SUB3
#define EVENT_PAD_IN_TIMER_SUB3
Definition: event.h:160
EVENT_RFCORE_PROG
#define EVENT_RFCORE_PROG
Definition: event.h:203
EVENT_TIMER3_A
#define EVENT_TIMER3_A
Definition: event.h:86
EVENT_I2C_INTERRUPT
#define EVENT_I2C_INTERRUPT
Definition: event.h:81
EVENT_TIMER1_B_SREQ
#define EVENT_TIMER1_B_SREQ
Definition: event.h:144
EVENT_TIMER1_B_REQ
#define EVENT_TIMER1_B_REQ
Definition: event.h:152
EVENT_TIMER3_B_REQ
#define EVENT_TIMER3_B_REQ
Definition: event.h:156
EVENT_UART1_TX_BURST
#define EVENT_UART1_TX_BURST
Definition: event.h:126
EVENT_I2S_PROG
#define EVENT_I2S_PROG
Definition: event.h:227
EVENT_AUX_ADC
#define EVENT_AUX_ADC
Definition: event.h:105
EVENT_TIMER3_B_PROG
#define EVENT_TIMER3_B_PROG
Definition: event.h:212
EVENT_TIMER1_B_COMP
#define EVENT_TIMER1_B_COMP
Definition: event.h:136
EVENT_TIMER1_A_REQ
#define EVENT_TIMER1_A_REQ
Definition: event.h:151
EVENT_TIMER0_B_REQ
#define EVENT_TIMER0_B_REQ
Definition: event.h:150
EVENT_AON_SPIS_RX_SINGLE
#define EVENT_AON_SPIS_RX_SINGLE
Definition: event.h:130
EVENT_PAD_IN_TIMER_SUB2
#define EVENT_PAD_IN_TIMER_SUB2
Definition: event.h:159
EVENT_SSI1_TX_SINGLE
#define EVENT_SSI1_TX_SINGLE
Definition: event.h:119
EVENT_UART1_RX_SINGLE
#define EVENT_UART1_RX_SINGLE
Definition: event.h:125
debug.h
EVENT_UDMA_PROG4
#define EVENT_UDMA_PROG4
Definition: event.h:218
EVENT_PAD_IN_TIMER_SUB4
#define EVENT_PAD_IN_TIMER_SUB4
Definition: event.h:161
EVENT_SW3
#define EVENT_SW3
Definition: event.h:175
EVENT_ADC
#define EVENT_ADC
Definition: event.h:95
EVENT_TIMER0_B_SREQ
#define EVENT_TIMER0_B_SREQ
Definition: event.h:142
EVENT_AUX4
#define EVENT_AUX4
Definition: event.h:181
EVENT_TIMER2_A
#define EVENT_TIMER2_A
Definition: event.h:84
EVENT_UDMA_PROG2
#define EVENT_UDMA_PROG2
Definition: event.h:216
EVENT_UDMA_PROG9
#define EVENT_UDMA_PROG9
Definition: event.h:223
EVENT_SSI0_TX_SINGLE
#define EVENT_SSI0_TX_SINGLE
Definition: event.h:115
EVENT_AUX8
#define EVENT_AUX8
Definition: event.h:185
EVENT_AON_PROG_2
#define EVENT_AON_PROG_2
Definition: event.h:75
EVENT_TIMER3_A_SREQ
#define EVENT_TIMER3_A_SREQ
Definition: event.h:147
EVENT_AUX_PROG
#define EVENT_AUX_PROG
Definition: event.h:225
EVENT_AUX7
#define EVENT_AUX7
Definition: event.h:184
EVENT_SW1
#define EVENT_SW1
Definition: event.h:173
EVENT_TIMER1_A_SREQ
#define EVENT_TIMER1_A_SREQ
Definition: event.h:143
EVENT_NMI
#define EVENT_NMI
Definition: event.h:171
EVENT_AON_PROG_0
#define EVENT_AON_PROG_0
Definition: event.h:73
EVENT_AUX_CMP
#define EVENT_AUX_CMP
Definition: event.h:101
EVENT_TIMER1_B_PROG
#define EVENT_TIMER1_B_PROG
Definition: event.h:208
ASSERT
#define ASSERT(expr)
Definition: debug.h:65
EVENT_TIMER3_B
#define EVENT_TIMER3_B
Definition: event.h:87
EVENT_AON_SPIS_RX_BURST
#define EVENT_AON_SPIS_RX_BURST
Definition: event.h:129
EVENT_TIMER0_A_SREQ_
#define EVENT_TIMER0_A_SREQ_
Definition: event.h:141
EVENT_UART1
#define EVENT_UART1
Definition: event.h:109
EVENT_TIMER2_B_SREQ
#define EVENT_TIMER2_B_SREQ
Definition: event.h:146
EVENT_AON_SPIS_CS
#define EVENT_AON_SPIS_CS
Definition: event.h:78
EVENT_UDMA_PROG6
#define EVENT_UDMA_PROG6
Definition: event.h:220
EVENT_RFCORE_CPE0
#define EVENT_RFCORE_CPE0
Definition: event.h:99
EVENT_RFCORE_CPE1
#define EVENT_RFCORE_CPE1
Definition: event.h:102
EVENT_PAD_IN_TIMER_SUB0
#define EVENT_PAD_IN_TIMER_SUB0
Definition: event.h:157
EVENT_ALWAYS_1
#define EVENT_ALWAYS_1
Definition: event.h:193
EVENT_TIMER1_A_PROG
#define EVENT_TIMER1_A_PROG
Definition: event.h:207
EVENT_CRYPTO_RES_RDY
#define EVENT_CRYPTO_RES_RDY
Definition: event.h:165
EVENT_AUX_ERR
#define EVENT_AUX_ERR
Definition: event.h:104
EVENT_RFCORE_INPUT_2
#define EVENT_RFCORE_INPUT_2
Definition: event.h:168
EVENT_TIMER2_A_REQ
#define EVENT_TIMER2_A_REQ
Definition: event.h:153
EVENT_TIMER3_B_SREQ
#define EVENT_TIMER3_B_SREQ
Definition: event.h:148
EVENT_RFCORE_INPUT_4
#define EVENT_RFCORE_INPUT_4
Definition: event.h:170
EVENT_UDMA_PROG1
#define EVENT_UDMA_PROG1
Definition: event.h:215
EVENT_UART0_TX_SINGLE
#define EVENT_UART0_TX_SINGLE
Definition: event.h:123
EVENT_AON_RTCCOMDLY
#define EVENT_AON_RTCCOMDLY
Definition: event.h:79
EVENT_AUX_DMA_BURST
#define EVENT_AUX_DMA_BURST
Definition: event.h:190
EVENT_AON_SPIS_TX_BURST
#define EVENT_AON_SPIS_TX_BURST
Definition: event.h:131
EVENT_TIMER0_B_COMP
#define EVENT_TIMER0_B_COMP
Definition: event.h:134
EVENT_TIMER1_A
#define EVENT_TIMER1_A
Definition: event.h:90
EVENT_PRCM
#define EVENT_PRCM
Definition: event.h:103
EVENT_AUX6
#define EVENT_AUX6
Definition: event.h:183
EVENT_DMA_DONE
#define EVENT_DMA_DONE
Definition: event.h:111
EVENT_AON_SPIS_TX_SINGLE
#define EVENT_AON_SPIS_TX_SINGLE
Definition: event.h:132
EVENT_AUX9
#define EVENT_AUX9
Definition: event.h:186
EVENT_UDMA_PROG0
#define EVENT_UDMA_PROG0
Definition: event.h:214
EVENT_SPIS
#define EVENT_SPIS
Definition: event.h:128
EVENT_AUX1
#define EVENT_AUX1
Definition: event.h:178
EVENT_SSI0_TX_BURST
#define EVENT_SSI0_TX_BURST
Definition: event.h:114
EVENT_PAD_IN_TIMER_SUB7
#define EVENT_PAD_IN_TIMER_SUB7
Definition: event.h:164
EVENT_SW0_DONE
#define EVENT_SW0_DONE
Definition: event.h:92
EVENT_CM3_PROG
#define EVENT_CM3_PROG
Definition: event.h:201
EVENT_AON_SPIS_RTX
#define EVENT_AON_SPIS_RTX
Definition: event.h:77
EVENT_UDMA_PROG7
#define EVENT_UDMA_PROG7
Definition: event.h:221
EVENT_TIMER0_A_PROG
#define EVENT_TIMER0_A_PROG
Definition: event.h:205
EVENT_SSI1_TX_BURST
#define EVENT_SSI1_TX_BURST
Definition: event.h:118
EVENT_SSI0
#define EVENT_SSI0
Definition: event.h:106
EVENT_SSI0_RX_BURST
#define EVENT_SSI0_RX_BURST
Definition: event.h:112
EVENT_UART0_TX_BURST
#define EVENT_UART0_TX_BURST
Definition: event.h:122
EVENT_SSI1_RX_SINGLE
#define EVENT_SSI1_RX_SINGLE
Definition: event.h:117
EVENT_TIMER0_A_COMP
#define EVENT_TIMER0_A_COMP
Definition: event.h:133
EVENT_SW2
#define EVENT_SW2
Definition: event.h:174
EVENT_RFCORE_HW
#define EVENT_RFCORE_HW
Definition: event.h:98
EVENT_TRNG
#define EVENT_TRNG
Definition: event.h:176
EVENT_TIMER2_B
#define EVENT_TIMER2_B
Definition: event.h:85
EVENT_UDMA_PROG8
#define EVENT_UDMA_PROG8
Definition: event.h:222
EVENT_HALTED
#define EVENT_HALTED
Definition: event.h:192
EVENT_SSI1_RX_BURST
#define EVENT_SSI1_RX_BURST
Definition: event.h:116
EVENT_UART1_TX_SINGLE
#define EVENT_UART1_TX_SINGLE
Definition: event.h:127
EVENT_TIMER2_A_PROG
#define EVENT_TIMER2_A_PROG
Definition: event.h:209
EventRegister
__STATIC_INLINE void EventRegister(uint32_t ui32ProgOut, uint32_t ui32EventId)
Register a dynamic Event in the event fabric and connect a subscriber.
Definition: event.h:259
EVENT_AON_EDGE_DETECT
#define EVENT_AON_EDGE_DETECT
Definition: event.h:76
EVENT_TIMER3_A_PROG
#define EVENT_TIMER3_A_PROG
Definition: event.h:211
EVENT_CRYPTO_DMA_DONE
#define EVENT_CRYPTO_DMA_DONE
Definition: event.h:166
EVENT_TIMER3_A_COMP
#define EVENT_TIMER3_A_COMP
Definition: event.h:139
EVENT_TIMER1_A_COMP
#define EVENT_TIMER1_A_COMP
Definition: event.h:135
EVENT_PTIM_RTX
#define EVENT_PTIM_RTX
Definition: event.h:83
EVENT_SW0
#define EVENT_SW0
Definition: event.h:172
EVENT_PRCM_BUSON
#define EVENT_PRCM_BUSON
Definition: event.h:100
EVENT_UART0_RX_BURST
#define EVENT_UART0_RX_BURST
Definition: event.h:120
EVENT_FLASH
#define EVENT_FLASH
Definition: event.h:93
EVENT_AUX0
#define EVENT_AUX0
Definition: event.h:177
EVENT_TIMER0_B_PROG
#define EVENT_TIMER0_B_PROG
Definition: event.h:206
EVENT_TIMER2_B_REQ
#define EVENT_TIMER2_B_REQ
Definition: event.h:154
EVENT_DMA_ERR
#define EVENT_DMA_ERR
Definition: event.h:110
EVENT_RFCORE_INPUT_3
#define EVENT_RFCORE_INPUT_3
Definition: event.h:169
EVENT_AUX5
#define EVENT_AUX5
Definition: event.h:182
EVENT_FREEZE_PROG
#define EVENT_FREEZE_PROG
Definition: event.h:229
EVENT_AUX10
#define EVENT_AUX10
Definition: event.h:187
EVENT_SW1_DMA_DONE
#define EVENT_SW1_DMA_DONE
Definition: event.h:94
EVENT_PAD_IN_TIMER_SUB6
#define EVENT_PAD_IN_TIMER_SUB6
Definition: event.h:163
EVENT_AUX2
#define EVENT_AUX2
Definition: event.h:179
EVENT_UDMA_PROG5
#define EVENT_UDMA_PROG5
Definition: event.h:219
EVENT_TIMER0_B
#define EVENT_TIMER0_B
Definition: event.h:89
EVENT_AON_AUX0
#define EVENT_AON_AUX0
Definition: event.h:82
EVENT_AON_RTC_UPD
#define EVENT_AON_RTC_UPD
Definition: event.h:191
EVENT_TIMER3_A_REQ
#define EVENT_TIMER3_A_REQ
Definition: event.h:155
EVENT_TIMER2_A_COMP
#define EVENT_TIMER2_A_COMP
Definition: event.h:137
EVENT_ALWAYS_0
#define EVENT_ALWAYS_0
Definition: event.h:72
EVENT_PAD_IN_TIMER_SUB1
#define EVENT_PAD_IN_TIMER_SUB1
Definition: event.h:158
EVENT_TIMER2_B_PROG
#define EVENT_TIMER2_B_PROG
Definition: event.h:210
EVENT_TIMER3_B_COMP
#define EVENT_TIMER3_B_COMP
Definition: event.h:140
EVENT_RFCORE_CMD_ACK
#define EVENT_RFCORE_CMD_ACK
Definition: event.h:97
EVENT_UDMA_PROG3
#define EVENT_UDMA_PROG3
Definition: event.h:217
EVENT_AUX_SM
#define EVENT_AUX_SM
Definition: event.h:80
EVENT_AUX3
#define EVENT_AUX3
Definition: event.h:180
EVENT_AON_PROG_1
#define EVENT_AON_PROG_1
Definition: event.h:74
EVENT_UART0_RX_SINGLE
#define EVENT_UART0_RX_SINGLE
Definition: event.h:121
EVENT_TIMER0_A
#define EVENT_TIMER0_A
Definition: event.h:88
EVENT_UART1_RX_BURST
#define EVENT_UART1_RX_BURST
Definition: event.h:124
EVENT_RFCORE_INPUT_1
#define EVENT_RFCORE_INPUT_1
Definition: event.h:167
EVENT_AUX_DMA_SW
#define EVENT_AUX_DMA_SW
Definition: event.h:188
EVENT_WATCHDOG
#define EVENT_WATCHDOG
Definition: event.h:96
EVENT_UART0
#define EVENT_UART0
Definition: event.h:108
EVENT_SSI0_RX_SINGLE
#define EVENT_SSI0_RX_SINGLE
Definition: event.h:113
EVENT_AUX_DMA_SINGLE
#define EVENT_AUX_DMA_SINGLE
Definition: event.h:189
EVENT_SSI1
#define EVENT_SSI1
Definition: event.h:107
EVENT_PAD_IN_TIMER_SUB5
#define EVENT_PAD_IN_TIMER_SUB5
Definition: event.h:162
EVENT_TIMER1_B
#define EVENT_TIMER1_B
Definition: event.h:91
EVENT_TIMER2_A_SREQ
#define EVENT_TIMER2_A_SREQ
Definition: event.h:145