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ddi.h
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1 /******************************************************************************
2 * Filename: ddi.h
3 * Revised: 2015-01-14 12:12:44 +0100 (on, 14 jan 2015)
4 * Revision: 42373
5 *
6 * Description: Defines and prototypes for the DDI master interface.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
43 //
44 //*****************************************************************************
45
46 #ifndef __DDI_H__
47 #define __DDI_H__
48
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include <inc/hw_types.h>
63 #include <inc/hw_memmap.h>
64 #include <inc/hw_ddi.h>
65 #include <inc/hw_aux_smph.h>
66 #include <driverlib/debug.h>
67 #include <driverlib/cpu.h>
68
69 //*****************************************************************************
70 //
71 // Support for DriverLib in ROM:
72 // This section renames all functions that are not "static inline", so that
73 // calling these functions will default to implementation in flash. At the end
74 // of this file a second renaming will change the defaults to implementation in
75 // ROM for available functions.
76 //
77 // To force use of the implementation in flash, e.g. for debugging:
78 // - Globally: Define DRIVERLIB_NOROM at project level
79 // - Per function: Use prefix "NOROM_" when calling the function
80 //
81 // Do not define DRIVERLIB_GENERATE_ROM!
82 //
83 //*****************************************************************************
84 #ifndef DRIVERLIB_GENERATE_ROM
85 #define DDI16BitWrite NOROM_DDI16BitWrite
86 #define DDI16BitfieldWrite NOROM_DDI16BitfieldWrite
87 #define DDI16BitRead NOROM_DDI16BitRead
88 #define DDI16BitfieldRead NOROM_DDI16BitfieldRead
89 #endif
90
91 //*****************************************************************************
92 //
93 // Number of register in the DDI slave
94 //
95 //*****************************************************************************
96 #define DDI_SLAVE_REGS 64
97
98 //*****************************************************************************
99 //
100 // Defines that can be passed to the DDIConfigSet()
101 //
102 //*****************************************************************************
103 #define DDI_NO_WAIT 0x00000000
104 #define DDI_WAIT_FOR_ACK 0x00000004
105 #define DDI_SPEED_2 0x00000000
106 #define DDI_SPEED_4 0x00000001
107 #define DDI_SPEED_8 0x00000002
108 #define DDI_SPEED_16 0x00000003
109 #define DDI_CONFIG_MASK 0x00000007
110
111 //*****************************************************************************
112 //
113 // Defines that is used to control the ADI slave and master
114 //
115 //*****************************************************************************
116 #define DDI_PROTECT 0x00000080
117 #define DDI_ACK 0x00000001
118 #define DDI_SYNC 0x00000000
119
120 //*****************************************************************************
121 //
122 // API Functions and prototypes
123 //
124 //*****************************************************************************
125
126
127 //*****************************************************************************
128 //
129 // Helper functions
130 //
131 //*****************************************************************************
132
133 //*****************************************************************************
134 //
149 //
150 //*****************************************************************************
151 __STATIC_INLINE void
152 AuxAdiDdiSafeWrite(uint32_t nAddr, uint32_t nData, uint32_t nSize)
153 {
154 // Disable interrupts and remember whether to re-enable
155 bool bIrqEnabled = !CPUcpsid();
156 // Acquire semaphore for accessing ADI/DDI in AUX, perform access, release semaphore
157 while (!HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0));
158 switch (nSize) {
159 case 1: HWREGB(nAddr) = (uint8_t)nData; break;
160 case 2: HWREGH(nAddr) = (uint16_t)nData; break;
161 case 4: default: HWREG(nAddr) = nData; break;
162 }
163 HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0) = 1;
164 // Restore interrupt enable
165 if (bIrqEnabled) {
166 CPUcpsie();
167 }
168 }
169
170 //*****************************************************************************
171 //
184 //
185 //*****************************************************************************
186 __STATIC_INLINE uint32_t
187 AuxAdiDdiSafeRead(uint32_t nAddr, uint32_t nSize)
188 {
189 uint32_t nRet;
190 // Disable interrupts and remember whether to re-enable
191 bool bIrqEnabled = !CPUcpsid();
192 // Acquire semaphore for accessing ADI/DDI in AUX, perform access, release semaphore
193 while (!HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0));
194 switch (nSize) {
195 case 1: nRet = HWREGB(nAddr); break;
196 case 2: nRet = HWREGH(nAddr); break;
197 case 4: default: nRet = HWREG(nAddr); break;
198 }
199 HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0) = 1;
200 // Restore interrupt enable
201 if (bIrqEnabled) {
202 CPUcpsie();
203 }
204 return nRet;
205 }
206
207 #ifdef DRIVERLIB_DEBUG
208 //*****************************************************************************
209 //
222 //
223 //*****************************************************************************
224 static bool
225 DDIBaseValid(uint32_t ui32Base)
226 {
227 return(ui32Base == AUX_DDI0_OSC_BASE);
228 }
229 #endif
230
231 //*****************************************************************************
232 //
244 //
245 //*****************************************************************************
246 __STATIC_INLINE uint32_t
247 DDIStatusGet(uint32_t ui32Base)
248 {
249 //
250 // Check the arguments.
251 //
252 ASSERT(DDIBaseValid(ui32Base));
253
254 //
255 // Return the status value for the correct DDI Slave.
256 //
257 return AuxAdiDdiSafeRead(ui32Base + DDI_O_SLAVESTAT, 4);
258 }
259
260 //*****************************************************************************
261 //
296 //
297 //*****************************************************************************
298 __STATIC_INLINE void
299 DDIConfigSet(uint32_t ui32Base, uint32_t ui32Config, bool bProtect)
300 {
301 //
302 // Check the arguments.
303 //
304 ASSERT(DDIBaseValid(ui32Base));
305 ASSERT(((ui32Config & 0x4) == DDI_NO_WAIT) ||
306 ((ui32Config & 0x4) == DDI_WAIT_FOR_ACK));
307 ASSERT(((ui32Config & 0x3) == DDI_SPEED_2) ||
308 ((ui32Config & 0x3) == DDI_SPEED_4) ||
309 ((ui32Config & 0x3) == DDI_SPEED_8) ||
310 ((ui32Config & 0x3) == DDI_SPEED_16));
311
312 //
313 // Configure the DDI slave.
314 //
315 AuxAdiDdiSafeWrite(
316 ui32Base + DDI_O_SLAVECONF,
317 (ui32Config & 0x7) | (bProtect ? DDI_PROTECT : 0),
318 4
319 );
320 }
321
322 //*****************************************************************************
323 //
340 //
341 //*****************************************************************************
342 __STATIC_INLINE void
343 DDISync(uint32_t ui32Base)
344 {
345 //
346 // Check the arguments.
347 //
348 ASSERT(DDIBaseValid(ui32Base));
349
350 //
351 // Synchronize the DDI slave to guarantee future write operations.
352 //
353 AuxAdiDdiSafeWrite(ui32Base + DDI_O_SLAVESTAT, DDI_SYNC, 1);
354 }
355
356 //*****************************************************************************
357 //
376 //
377 //*****************************************************************************
378 __STATIC_INLINE void
379 DDIProtect(uint32_t ui32Base)
380 {
381 uint32_t ui32Val;
382
383 //
384 // Check the arguments.
385 //
386 ASSERT(DDIBaseValid(ui32Base));
387
388 //
389 // Lock the register interface on the DDI slave.
390 //
391 ui32Val = AuxAdiDdiSafeRead(ui32Base + DDI_O_SLAVECONF, 4);
392 ui32Val |= DDI_PROTECT;
393 AuxAdiDdiSafeWrite(ui32Base + DDI_O_SLAVECONF, ui32Val, 4);
394 }
395
396 //*****************************************************************************
397 //
415 //
416 //*****************************************************************************
417 __STATIC_INLINE void
418 DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg,
419 uint32_t ui32Val)
420 {
421 //
422 // Check the arguments.
423 //
424 ASSERT(DDIBaseValid(ui32Base));
425 ASSERT(ui32Reg < DDI_SLAVE_REGS);
426
427 //
428 // Write the value to the register.
429 //
430 AuxAdiDdiSafeWrite(ui32Base + ui32Reg, ui32Val, 4);
431 }
432
433 //*****************************************************************************
434 //
447 //
448 //*****************************************************************************
449 __STATIC_INLINE uint32_t
450 DDI32RegRead(uint32_t ui32Base, uint32_t ui32Reg)
451 {
452 //
453 // Check the arguments.
454 //
455 ASSERT(DDIBaseValid(ui32Base));
456 ASSERT(ui32Reg < DDI_SLAVE_REGS);
457
458 //
459 // Read the register and return the value.
460 //
461 return AuxAdiDdiSafeRead(ui32Base + ui32Reg, 4);
462 }
463
464 //*****************************************************************************
465 //
484 //
485 //*****************************************************************************
486 __STATIC_INLINE void
487 DDI32BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
488 {
489 uint32_t ui32RegOffset;
490
491 //
492 // Check the arguments.
493 //
494 ASSERT(DDIBaseValid(ui32Base));
495 ASSERT(ui32Reg < DDI_SLAVE_REGS);
496
497 //
498 // Get the correct address of the first register used for setting bits
499 // in the DDI slave.
500 //
501 ui32RegOffset = DDI_O_SET;
502
503 //
504 // Set the selected bits.
505 //
506 AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + ui32Reg, ui32Val, 4);
507 }
508
509 //*****************************************************************************
510 //
524 //
525 //*****************************************************************************
526 __STATIC_INLINE void
527 DDI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg,
528 uint32_t ui32Val)
529 {
530 uint32_t ui32RegOffset;
531
532 //
533 // Check the arguments.
534 //
535 ASSERT(DDIBaseValid(ui32Base));
536 ASSERT(ui32Reg < DDI_SLAVE_REGS);
537
538 //
539 // Get the correct address of the first register used for setting bits
540 // in the DDI slave.
541 //
542 ui32RegOffset = DDI_O_CLR;
543
544 //
545 // Clear the selected bits.
546 //
547 AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + ui32Reg, ui32Val, 4);
548 }
549
550 //*****************************************************************************
551 //
575 //
576 //*****************************************************************************
577 __STATIC_INLINE void
578 DDI8SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Byte,
579 uint16_t ui16Mask, uint16_t ui16Val)
580 {
581 uint32_t ui32RegOffset;
582
583 //
584 // Check the arguments.
585 //
586 ASSERT(DDIBaseValid(ui32Base));
587 ASSERT(ui32Reg < DDI_SLAVE_REGS);
588 ASSERT(!(ui16Val & 0xFF00));
589 ASSERT(!(ui16Mask & 0xFF00));
590
591 //
592 // Get the correct address of the first register used for setting bits
593 // in the DDI slave.
594 //
595 ui32RegOffset = DDI_O_MASK8B + (ui32Reg << 1) + (ui32Byte << 1);
596
597 //
598 // Set the selected bits.
599 //
600 AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset, (ui16Mask << 8) | ui16Val, 2);
601 }
602
603 //*****************************************************************************
604 //
628 //
629 //*****************************************************************************
630 __STATIC_INLINE void
631 DDI16SetValBit(uint32_t ui32Base, uint32_t ui32Reg, bool bWriteHigh,
632 uint32_t ui32Mask, uint32_t ui32Val)
633 {
634 uint32_t ui32RegOffset;
635
636 //
637 // Check the arguments.
638 //
639 ASSERT(DDIBaseValid(ui32Base));
640 ASSERT(ui32Reg < DDI_SLAVE_REGS);
641 ASSERT(!(ui32Val & 0xFFFF0000));
642 ASSERT(!(ui32Mask & 0xFFFF0000));
643
644 //
645 // Get the correct address of the first register used for setting bits
646 // in the DDI slave.
647 //
648 ui32RegOffset = DDI_O_MASK16B + (ui32Reg << 1) + (bWriteHigh ? 4 : 0);
649
650 //
651 // Set the selected bits.
652 //
653 AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset, (ui32Mask << 16) | ui32Val, 4);
654 }
655
656 //*****************************************************************************
657 //
673 //
674 //*****************************************************************************
675 extern void DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg,
676 uint32_t ui32Mask, uint32_t ui32WrData);
677
678
679 //*****************************************************************************
680 //
696 //
697 //*****************************************************************************
698 extern void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg,
699 uint32_t ui32Mask, uint32_t ui32Shift,
700 uint16_t ui32Data);
701
702 //*****************************************************************************
703 //
716 //
717 //*****************************************************************************
718 extern uint16_t DDI16BitRead(uint32_t ui32Base, uint32_t ui32Reg,
719 uint32_t ui32Mask);
720
721 //*****************************************************************************
722 //
738 //
739 //*****************************************************************************
740 extern uint16_t DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg,
741 uint32_t ui32Mask, uint32_t ui32Shift);
742
743 //*****************************************************************************
744 //
745 // Support for DriverLib in ROM:
746 // Redirect to implementation in ROM when available.
747 //
748 //*****************************************************************************
749 #ifndef DRIVERLIB_NOROM
750 #include <driverlib/rom.h>
751 #ifdef ROM_DDI16BitWrite
752 #undef DDI16BitWrite
753 #define DDI16BitWrite ROM_DDI16BitWrite
754 #endif
755 #ifdef ROM_DDI16BitfieldWrite
756 #undef DDI16BitfieldWrite
757 #define DDI16BitfieldWrite ROM_DDI16BitfieldWrite
758 #endif
759 #ifdef ROM_DDI16BitRead
760 #undef DDI16BitRead
761 #define DDI16BitRead ROM_DDI16BitRead
762 #endif
763 #ifdef ROM_DDI16BitfieldRead
764 #undef DDI16BitfieldRead
765 #define DDI16BitfieldRead ROM_DDI16BitfieldRead
766 #endif
767 #endif
768
769 //*****************************************************************************
770 //
771 // Mark the end of the C bindings section for C++ compilers.
772 //
773 //*****************************************************************************
774 #ifdef __cplusplus
775 }
776 #endif
777
778 #endif // __DDI_H__
779
780 //*****************************************************************************
781 //
784 //
785 //*****************************************************************************
DDI16BitWrite
void DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32WrData)
Write a single bit using a 16-bit maskable write.
Definition: ddi.c:64
DDI32RegWrite
__STATIC_INLINE void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
Definition: ddi.h:418
debug.h
AuxAdiDdiSafeRead
__STATIC_INLINE uint32_t AuxAdiDdiSafeRead(uint32_t nAddr, uint32_t nSize)
Definition: ddi.h:187
DDI_PROTECT
#define DDI_PROTECT
Definition: ddi.h:116
DDI16BitRead
uint16_t DDI16BitRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask)
Read a bit via the DDI using 16-bit READ.
Definition: ddi.c:152
ASSERT
#define ASSERT(expr)
Definition: debug.h:65
DDI16BitfieldWrite
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bit field via the DDI using 16-bit maskable write.
Definition: ddi.c:108
DDIStatusGet
__STATIC_INLINE uint32_t DDIStatusGet(uint32_t ui32Base)
Get the status of the DDI.
Definition: ddi.h:247
DDI16BitfieldRead
uint16_t DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift)
Read a bitfield via the DDI using 16-bit READ.
Definition: ddi.c:198
DDISync
__STATIC_INLINE void DDISync(uint32_t ui32Base)
Synchronize a DDI slave.
Definition: ddi.h:343
DDI_SPEED_2
#define DDI_SPEED_2
Definition: ddi.h:105
DDIConfigSet
__STATIC_INLINE void DDIConfigSet(uint32_t ui32Base, uint32_t ui32Config, bool bProtect)
Configure the DDI Slave.
Definition: ddi.h:299
CPUcpsid
uint32_t CPUcpsid(void)
Disable all external interrupts.
Definition: cpu.c:91
cpu.h
DDI_WAIT_FOR_ACK
#define DDI_WAIT_FOR_ACK
Definition: ddi.h:104
DDI_SPEED_8
#define DDI_SPEED_8
Definition: ddi.h:107
DDI_SYNC
#define DDI_SYNC
Definition: ddi.h:118
DDI32BitsClear
__STATIC_INLINE void DDI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Clear specific bits in a 32 bit DDI register.
Definition: ddi.h:527
DDIProtect
__STATIC_INLINE void DDIProtect(uint32_t ui32Base)
Protect a DDI slave by locking the register access.
Definition: ddi.h:379
DDI32RegRead
__STATIC_INLINE uint32_t DDI32RegRead(uint32_t ui32Base, uint32_t ui32Reg)
Read the value in a 32 bit register.
Definition: ddi.h:450
DDI_NO_WAIT
#define DDI_NO_WAIT
Definition: ddi.h:103
DDI16SetValBit
__STATIC_INLINE void DDI16SetValBit(uint32_t ui32Base, uint32_t ui32Reg, bool bWriteHigh, uint32_t ui32Mask, uint32_t ui32Val)
Set a value on any 16 bits inside a 32 bit register aligned on a half-word boundary in the DDI slave...
Definition: ddi.h:631
DDI_SPEED_16
#define DDI_SPEED_16
Definition: ddi.h:108
CPUcpsie
uint32_t CPUcpsie(void)
Enable all external interrupts.
Definition: cpu.c:249
DDI8SetValBit
__STATIC_INLINE void DDI8SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Byte, uint16_t ui16Mask, uint16_t ui16Val)
Set a value on any 8 bits inside a 32 bit register in the DDI slave.
Definition: ddi.h:578
rom.h
DDI_SLAVE_REGS
#define DDI_SLAVE_REGS
Definition: ddi.h:96
DDI_SPEED_4
#define DDI_SPEED_4
Definition: ddi.h:106
DDI32BitsSet
__STATIC_INLINE void DDI32BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Set specific bits in a DDI slave register.
Definition: ddi.h:487
AuxAdiDdiSafeWrite
__STATIC_INLINE void AuxAdiDdiSafeWrite(uint32_t nAddr, uint32_t nData, uint32_t nSize)
Definition: ddi.h:152