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prcm.h
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1 /******************************************************************************
2 * Filename: prcm.h
3 * Revised: 2015-01-14 12:12:44 +0100 (on, 14 jan 2015)
4 * Revision: 42373
5 *
6 * Description: Defines and prototypes for the PRCM
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
43 //
44 //*****************************************************************************
45
46 #ifndef __PRCM_H__
47 #define __PRCM_H__
48
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include <inc/hw_types.h>
63 #include <inc/hw_memmap.h>
64 #include <inc/hw_ints.h>
65 #include <inc/hw_prcm.h>
66 #include <inc/hw_nvic.h>
67 #include <inc/hw_aon_rtc.h>
68 #include <driverlib/interrupt.h>
69 #include <driverlib/debug.h>
70 #include <driverlib/cpu.h>
71
72 //*****************************************************************************
73 //
74 // Support for DriverLib in ROM:
75 // This section renames all functions that are not "static inline", so that
76 // calling these functions will default to implementation in flash. At the end
77 // of this file a second renaming will change the defaults to implementation in
78 // ROM for available functions.
79 //
80 // To force use of the implementation in flash, e.g. for debugging:
81 // - Globally: Define DRIVERLIB_NOROM at project level
82 // - Per function: Use prefix "NOROM_" when calling the function
83 //
84 // Do not define DRIVERLIB_GENERATE_ROM!
85 //
86 //*****************************************************************************
87 #ifndef DRIVERLIB_GENERATE_ROM
88 #define PRCMInfClockConfigureSet NOROM_PRCMInfClockConfigureSet
89 #define PRCMInfClockConfigureGet NOROM_PRCMInfClockConfigureGet
90 #define PRCMClockConfigureSet NOROM_PRCMClockConfigureSet
91 #define PRCMClockConfigureGet NOROM_PRCMClockConfigureGet
92 #define PRCMAudioClockConfigSet NOROM_PRCMAudioClockConfigSet
93 #define PRCMAudioClockConfigSetOverride NOROM_PRCMAudioClockConfigSetOverride
94 #define PRCMPowerDomainOn NOROM_PRCMPowerDomainOn
95 #define PRCMPowerDomainOff NOROM_PRCMPowerDomainOff
96 #define PRCMPeripheralRunEnable NOROM_PRCMPeripheralRunEnable
97 #define PRCMPeripheralRunDisable NOROM_PRCMPeripheralRunDisable
98 #define PRCMPeripheralSleepEnable NOROM_PRCMPeripheralSleepEnable
99 #define PRCMPeripheralSleepDisable NOROM_PRCMPeripheralSleepDisable
100 #define PRCMPeripheralDeepSleepEnable NOROM_PRCMPeripheralDeepSleepEnable
101 #define PRCMPeripheralDeepSleepDisable NOROM_PRCMPeripheralDeepSleepDisable
102 #define PRCMPowerDomainStatus NOROM_PRCMPowerDomainStatus
103 #define PRCMDeepSleep NOROM_PRCMDeepSleep
104 #define PRCMRetentionEnable NOROM_PRCMRetentionEnable
105 #define PRCMRetentionDisable NOROM_PRCMRetentionDisable
106 #endif
107
108 //*****************************************************************************
109 //
110 // Defines for the different Cortex M3 power modes.
111 //
112 //*****************************************************************************
113 #define PRCM_RUN_MODE 0x00000001
114 #define PRCM_SLEEP_MODE 0x00000002
115 #define PRCM_DEEP_SLEEP_MODE 0x00000004
116
117 //*****************************************************************************
118 //
119 // Defines used for setting the clock divison factors
120 //
121 //*****************************************************************************
122 #define PRCM_CLOCK_DIV_1 0x0000000
123 #define PRCM_CLOCK_DIV_2 0x0000001
124 #define PRCM_CLOCK_DIV_4 0x0000002
125 #define PRCM_CLOCK_DIV_8 0x0000003
126 #define PRCM_CLOCK_DIV_16 0x0000004
127 #define PRCM_CLOCK_DIV_32 0x0000005
128 #define PRCM_CLOCK_DIV_64 0x0000006
129 #define PRCM_CLOCK_DIV_128 0x0000007
130 #define PRCM_CLOCK_DIV_256 0x0000008
131
132 //*****************************************************************************
133 //
134 // Defines used for enabling and disabling domains and memories in the MCU
135 // domain
136 //
137 //*****************************************************************************
138 #define PRCM_DOMAIN_RFCORE 0x00000001 // RF Core domain ID for
139 // clock/power control.
140 #define PRCM_DOMAIN_SERIAL 0x00000002 // Serial domain ID for
141 // clock/power control.
142 #define PRCM_DOMAIN_PERIPH 0x00000004 // Peripheral domain ID for
143 // clock/power control.
144 #define PRCM_DOMAIN_SYSBUS 0x00000008 // Bus domain ID for clock/power
145 // control.
146 #define PRCM_DOMAIN_VIMS 0x00000010 // VIMS domain ID for clock/power
147 // control.
148 #define PRCM_DOMAIN_CPU 0x00000020 // CPU domain ID for clock/power
149 // control.
150 #define PRCM_DOMAIN_TIMER 0x00000040 // GPT domain ID for clock
151 // control.
152 #define PRCM_DOMAIN_CLKCTRL 0x00000080 // Clock Control domain ID for
153 // clock/power control.
154 #define PRCM_DOMAIN_MCU 0x00000100 // Reset control for entire MCU
155 // domain.
156 #define PRCM_DOMAIN_POWER_OFF 0x00000002 // The domain is powered off
157 #define PRCM_DOMAIN_POWER_ON 0x00000001 // The domain is powered on
158 #define PRCM_DOMAIN_POWER_DOWN_READY \
159 0x00000000 // The domain is ready to be
160 // powered down.
161
162 //*****************************************************************************
163 //
164 // Defines for setting up the audio interface in the I2S module.
165 //
166 //*****************************************************************************
167 #define PRCM_WCLK_NEG_EDGE 0x00000008
168 #define PRCM_WCLK_POS_EDGE 0x00000000
169 #define PRCM_WCLK_SINGLE_PHASE 0x00000000
170 #define PRCM_WCLK_DUAL_PHASE 0x00000002
171 #define PRCM_WCLK_USER_DEF 0x00000004
172
173 #define I2S_SAMPLE_RATE_16K 0x00000001
174 #define I2S_SAMPLE_RATE_24K 0x00000002
175 #define I2S_SAMPLE_RATE_32K 0x00000004
176 #define I2S_SAMPLE_RATE_48K 0x00000008
177
178 //*****************************************************************************
179 //
180 // Defines used for enabling and disabling peripheral modules in the MCU
181 // domain
182 //
183 //*****************************************************************************
184 #define PRCM_PERIPH_TIMER0 0x00000000 // Peripheral ID for GPT module 0
185 #define PRCM_PERIPH_TIMER1 0x00000001 // Peripheral ID for GPT module 1
186 #define PRCM_PERIPH_TIMER2 0x00000002 // Peripheral ID for GPT module 2
187 #define PRCM_PERIPH_TIMER3 0x00000003 // Peripheral ID for GPT module 3
188 #define PRCM_PERIPH_SSI0 0x00000100 // Peripheral ID for SSI module 0
189 #define PRCM_PERIPH_SSI1 0x00000101 // Peripheral ID for SSI module 1
190 #define PRCM_PERIPH_UART0 0x00000200 // Peripheral ID for UART module 0
191 #define PRCM_PERIPH_UART1 0x00000201 // Peripheral ID for UART module 1
192 #define PRCM_PERIPH_I2C0 0x00000300 // Peripheral ID for I2C module 0
193 #define PRCM_PERIPH_I2C1 0x00000301 // Peripheral ID for I2C module 1
194 #define PRCM_PERIPH_CRYPTO 0x00000400 // Peripheral ID for CRYPTO module
195 #define PRCM_PERIPH_TRNG 0x00000401 // Peripheral ID for TRNG module
196 #define PRCM_PERIPH_UDMA 0x00000408 // Peripheral ID for UDMA module
197 #define PRCM_PERIPH_GPIO 0x00000500 // Peripheral ID for GPIO module
198 #define PRCM_PERIPH_I2S 0x00000600 // Peripheral ID for I2S module
199
200 //*****************************************************************************
201 //
202 // API Functions and prototypes
203 //
204 //*****************************************************************************
205
206 #ifdef DRIVERLIB_DEBUG
207 //*****************************************************************************
208 //
218 //
219 //*****************************************************************************
220 static bool
221 PRCMPeripheralValid(uint32_t ui32Peripheral)
222 {
223 return((ui32Peripheral == PRCM_PERIPH_TIMER0) ||
224 (ui32Peripheral == PRCM_PERIPH_TIMER1) ||
225 (ui32Peripheral == PRCM_PERIPH_TIMER2) ||
226 (ui32Peripheral == PRCM_PERIPH_TIMER3) ||
227 (ui32Peripheral == PRCM_PERIPH_SSI0) ||
228 (ui32Peripheral == PRCM_PERIPH_SSI1) ||
229 (ui32Peripheral == PRCM_PERIPH_UART0) ||
230 (ui32Peripheral == PRCM_PERIPH_UART1) ||
231 (ui32Peripheral == PRCM_PERIPH_I2C0) ||
232 (ui32Peripheral == PRCM_PERIPH_I2C1) ||
233 (ui32Peripheral == PRCM_PERIPH_UDMA) ||
234 (ui32Peripheral == PRCM_PERIPH_TRNG) ||
235 (ui32Peripheral == PRCM_PERIPH_CRYPTO) ||
236 (ui32Peripheral == PRCM_PERIPH_GPIO) ||
237 (ui32Peripheral == PRCM_PERIPH_I2S));
238 }
239 #endif
240
241 //*****************************************************************************
242 //
269 //
270 //*****************************************************************************
271 extern void PRCMInfClockConfigureSet(uint32_t ui32ClkDiv,
272 uint32_t ui32PowerMode);
273
274 //*****************************************************************************
275 //
293 //
294 //*****************************************************************************
295 extern uint32_t PRCMInfClockConfigureGet(uint32_t ui32PowerMode);
296
297 //*****************************************************************************
298 //
307 //
308 //*****************************************************************************
309 __STATIC_INLINE void
310 PRCMMcuPowerOff(void)
311 {
312 //
313 // Assert the power off request signal.
314 //
315 HWREG(PRCM_BASE + PRCM_O_VDCTL) |= PRCM_VDCTL_MCU_VD;
316 }
317
318 //*****************************************************************************
319 //
329 //
330 //*****************************************************************************
331 __STATIC_INLINE void
332 PRCMMcuPowerOffCancel(void)
333 {
334 //
335 // Assert the power off request signal.
336 //
337 HWREG(PRCM_BASE + PRCM_O_VDCTL) &= ~PRCM_VDCTL_MCU_VD;
338 }
339
340 //*****************************************************************************
341 //
357 //
358 //*****************************************************************************
359 __STATIC_INLINE void
360 PRCMMcuUldoConfigure(uint32_t ui32Enable)
361 {
362 uint32_t ui32Val;
363
364 //
365 // Enable/disable the uLDO request signal.
366 //
367 ui32Val = HWREG(PRCM_BASE + PRCM_O_VDCTL);
368 if(ui32Enable)
369 {
370 ui32Val |= PRCM_VDCTL_ULDO;
371 }
372 else
373 {
374 ui32Val &= ~PRCM_VDCTL_ULDO;
375 }
376 HWREG(PRCM_BASE + PRCM_O_VDCTL) = ui32Val;
377 }
378
379 //*****************************************************************************
380 //
436 //
437 //*****************************************************************************
438 extern void PRCMClockConfigureSet(uint32_t ui32Domains, uint32_t ui32ClkDiv);
439
440 //*****************************************************************************
441 //
458 //
459 //*****************************************************************************
460 extern uint32_t PRCMClockConfigureGet(uint32_t ui32Domain);
461
462 //*****************************************************************************
463 //
469 //
470 //*****************************************************************************
471 __STATIC_INLINE void
472 PRCMAudioClockEnable(void)
473 {
474 //
475 // Enable the audio clock generation.
476 //
477 HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) |= PRCM_I2SCLKCTL_EN;
478 }
479
480 //*****************************************************************************
481 //
487 //
488 //*****************************************************************************
489 __STATIC_INLINE void
490 PRCMAudioClockDisable(void)
491 {
492 //
493 // Disable the audio clock generation
494 //
495 HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) &= ~PRCM_I2SCLKCTL_EN;
496 }
497
498 //*****************************************************************************
499 //
527 //
528 //*****************************************************************************
529 extern void PRCMAudioClockConfigSet(uint32_t ui32ClkConfig,
530 uint32_t ui32SampleRate);
531
532 //*****************************************************************************
533 //
555 //
556 //*****************************************************************************
557 extern void PRCMAudioClockConfigSetOverride(uint32_t ui32ClkConfig, uint32_t ui32MstDiv,
558 uint32_t ui32BitDiv, uint32_t ui32WordDiv);
559
560 //*****************************************************************************
561 //
585 //
586 //*****************************************************************************
587 __STATIC_INLINE void
588 PRCMLoadSet(void)
589 {
590 //
591 // Enable the update of all load related registers.
592 //
593 HWREG(PRCM_NONBUF_BASE + PRCM_O_CLKLOADCTL) = PRCM_CLKLOADCTL_LOAD;
594 }
595
596 //*****************************************************************************
597 //
605 //
606 //*****************************************************************************
607 __STATIC_INLINE bool
608 PRCMLoadGet(void)
609 {
610 //
611 // Return the load status.
612 //
613 return ((HWREG(PRCM_BASE + PRCM_O_CLKLOADCTL) & PRCM_CLKLOADCTL_LOAD_DONE) ?
614 true : false);
615 }
616
617 //*****************************************************************************
618 //
635 //
636 //*****************************************************************************
637 __STATIC_INLINE void
638 PRCMDomainEnable(uint32_t ui32Domains)
639 {
640 //
641 // Check the arguments.
642 //
643 ASSERT((ui32Domains & PRCM_DOMAIN_RFCORE) ||
644 (ui32Domains & PRCM_DOMAIN_VIMS));
645
646 //
647 // Enable the clock domain(s).
648 //
649 if(ui32Domains & PRCM_DOMAIN_RFCORE)
650 {
651 HWREG(PRCM_BASE + PRCM_O_RFCCLKG) = PRCM_RFCCLKG_CLK_EN;
652 }
653 if(ui32Domains & PRCM_DOMAIN_VIMS)
654 {
655 HWREG(PRCM_BASE + PRCM_O_VIMSCLKG) = PRCM_VIMSCLKG_CLK_EN_M;
656 }
657 }
658
659 //*****************************************************************************
660 //
678 //
679 //*****************************************************************************
680 __STATIC_INLINE void
681 PRCMDomainDisable(uint32_t ui32Domains)
682 {
683 //
684 // Check the arguments.
685 //
686 ASSERT((ui32Domains & PRCM_DOMAIN_RFCORE) ||
687 (ui32Domains & PRCM_DOMAIN_VIMS));
688
689 //
690 // Disable the power domains.
691 //
692 if(ui32Domains & PRCM_DOMAIN_RFCORE)
693 {
694 HWREG(PRCM_BASE + PRCM_O_RFCCLKG) = 0x0;
695 }
696 if(ui32Domains & PRCM_DOMAIN_VIMS)
697 {
698 HWREG(PRCM_BASE + PRCM_O_VIMSCLKG) = 0x0;
699 }
700 }
701
702 //*****************************************************************************
703 //
750 //
751 //*****************************************************************************
752 extern void PRCMPowerDomainOn(uint32_t ui32Domains);
753
754 //*****************************************************************************
755 //
775 //
776 //*****************************************************************************
777 extern void PRCMPowerDomainOff(uint32_t ui32Domains);
778
779 //*****************************************************************************
780 //
788 //
789 //*****************************************************************************
790 __STATIC_INLINE void
791 PRCMRfPowerDownWhenIdle(void)
792 {
793 //
794 // Configure the RF power domain.
795 //
796 HWREG(PRCM_BASE + PRCM_O_PDCTL0RFC) &= ~PRCM_PDCTL0RFC_ON;
797 }
798
799 //*****************************************************************************
800 //
840 //
841 //*****************************************************************************
842 extern void PRCMPeripheralRunEnable(uint32_t ui32Peripheral);
843
844 //*****************************************************************************
845 //
882 //
883 //*****************************************************************************
884 extern void PRCMPeripheralRunDisable(uint32_t ui32Peripheral);
885
886 //*****************************************************************************
887 //
922 //
923 //*****************************************************************************
924 extern void PRCMPeripheralSleepEnable(uint32_t ui32Peripheral);
925
926 //*****************************************************************************
927 //
963 //
964 //*****************************************************************************
965 extern void PRCMPeripheralSleepDisable(uint32_t ui32Peripheral);
966
967 //*****************************************************************************
968 //
1003 //
1004 //*****************************************************************************
1005 extern void PRCMPeripheralDeepSleepEnable(uint32_t ui32Peripheral);
1006
1007 //*****************************************************************************
1008 //
1046 //
1047 //*****************************************************************************
1048 extern void PRCMPeripheralDeepSleepDisable(uint32_t ui32Peripheral);
1049
1050 //*****************************************************************************
1051 //
1067 //
1068 //*****************************************************************************
1069 extern uint32_t PRCMPowerDomainStatus(uint32_t ui32Domains);
1070
1071 //*****************************************************************************
1072 //
1082 //
1083 //*****************************************************************************
1084 __STATIC_INLINE bool
1085 PRCMRfReady(void)
1086 {
1087 //
1088 // Return the ready status of the RF Core.
1089 //
1090 return ((HWREG(PRCM_BASE + PRCM_O_PDSTAT1RFC) &
1091 PRCM_PDSTAT1RFC_ON) ? true : false);
1092 }
1093
1094 //*****************************************************************************
1095 //
1108 //
1109 //*****************************************************************************
1110 __STATIC_INLINE bool
1111 PRCMWdtResetStatus(void)
1112 {
1113 //
1114 // Return the WDT reset status.
1115 //
1116 return ((HWREG(PRCM_BASE + PRCM_O_WARMRESET) & PRCM_WARMRESET_WDT_STAT)
1117 ? true : false);
1118 }
1119
1120 //*****************************************************************************
1121 //
1132 //
1133 //*****************************************************************************
1134 __STATIC_INLINE void
1135 PRCMSleep(void)
1136 {
1137 //
1138 // Wait for an interrupt.
1139 //
1140 CPUwfi();
1141 }
1142
1143 //*****************************************************************************
1144 //
1155 //
1156 //*****************************************************************************
1157 extern void PRCMDeepSleep(void);
1158
1159 //*****************************************************************************
1160 //
1173 //
1174 //*****************************************************************************
1175 extern void PRCMRetentionEnable(uint32_t ui32PowerDomain);
1176
1177 //*****************************************************************************
1178 //
1191 //
1192 //*****************************************************************************
1193 extern void PRCMRetentionDisable(uint32_t ui32PowerDomain);
1194
1195 //*****************************************************************************
1196 //
1197 // Support for DriverLib in ROM:
1198 // Redirect to implementation in ROM when available.
1199 //
1200 //*****************************************************************************
1201 #ifndef DRIVERLIB_NOROM
1202 #include <driverlib/rom.h>
1203 #ifdef ROM_PRCMInfClockConfigureSet
1204 #undef PRCMInfClockConfigureSet
1205 #define PRCMInfClockConfigureSet ROM_PRCMInfClockConfigureSet
1206 #endif
1207 #ifdef ROM_PRCMInfClockConfigureGet
1208 #undef PRCMInfClockConfigureGet
1209 #define PRCMInfClockConfigureGet ROM_PRCMInfClockConfigureGet
1210 #endif
1211 #ifdef ROM_PRCMClockConfigureSet
1212 #undef PRCMClockConfigureSet
1213 #define PRCMClockConfigureSet ROM_PRCMClockConfigureSet
1214 #endif
1215 #ifdef ROM_PRCMClockConfigureGet
1216 #undef PRCMClockConfigureGet
1217 #define PRCMClockConfigureGet ROM_PRCMClockConfigureGet
1218 #endif
1219 #ifdef ROM_PRCMAudioClockConfigSet
1220 #undef PRCMAudioClockConfigSet
1221 #define PRCMAudioClockConfigSet ROM_PRCMAudioClockConfigSet
1222 #endif
1223 #ifdef ROM_PRCMAudioClockConfigSetOverride
1224 #undef PRCMAudioClockConfigSetOverride
1225 #define PRCMAudioClockConfigSetOverride ROM_PRCMAudioClockConfigSetOverride
1226 #endif
1227 #ifdef ROM_PRCMPowerDomainOn
1228 #undef PRCMPowerDomainOn
1229 #define PRCMPowerDomainOn ROM_PRCMPowerDomainOn
1230 #endif
1231 #ifdef ROM_PRCMPowerDomainOff
1232 #undef PRCMPowerDomainOff
1233 #define PRCMPowerDomainOff ROM_PRCMPowerDomainOff
1234 #endif
1235 #ifdef ROM_PRCMPeripheralRunEnable
1236 #undef PRCMPeripheralRunEnable
1237 #define PRCMPeripheralRunEnable ROM_PRCMPeripheralRunEnable
1238 #endif
1239 #ifdef ROM_PRCMPeripheralRunDisable
1240 #undef PRCMPeripheralRunDisable
1241 #define PRCMPeripheralRunDisable ROM_PRCMPeripheralRunDisable
1242 #endif
1243 #ifdef ROM_PRCMPeripheralSleepEnable
1244 #undef PRCMPeripheralSleepEnable
1245 #define PRCMPeripheralSleepEnable ROM_PRCMPeripheralSleepEnable
1246 #endif
1247 #ifdef ROM_PRCMPeripheralSleepDisable
1248 #undef PRCMPeripheralSleepDisable
1249 #define PRCMPeripheralSleepDisable ROM_PRCMPeripheralSleepDisable
1250 #endif
1251 #ifdef ROM_PRCMPeripheralDeepSleepEnable
1252 #undef PRCMPeripheralDeepSleepEnable
1253 #define PRCMPeripheralDeepSleepEnable ROM_PRCMPeripheralDeepSleepEnable
1254 #endif
1255 #ifdef ROM_PRCMPeripheralDeepSleepDisable
1256 #undef PRCMPeripheralDeepSleepDisable
1257 #define PRCMPeripheralDeepSleepDisable ROM_PRCMPeripheralDeepSleepDisable
1258 #endif
1259 #ifdef ROM_PRCMPowerDomainStatus
1260 #undef PRCMPowerDomainStatus
1261 #define PRCMPowerDomainStatus ROM_PRCMPowerDomainStatus
1262 #endif
1263 #ifdef ROM_PRCMDeepSleep
1264 #undef PRCMDeepSleep
1265 #define PRCMDeepSleep ROM_PRCMDeepSleep
1266 #endif
1267 #ifdef ROM_PRCMRetentionEnable
1268 #undef PRCMRetentionEnable
1269 #define PRCMRetentionEnable ROM_PRCMRetentionEnable
1270 #endif
1271 #ifdef ROM_PRCMRetentionDisable
1272 #undef PRCMRetentionDisable
1273 #define PRCMRetentionDisable ROM_PRCMRetentionDisable
1274 #endif
1275 #endif
1276
1277 //*****************************************************************************
1278 //
1279 // Mark the end of the C bindings section for C++ compilers.
1280 //
1281 //*****************************************************************************
1282 #ifdef __cplusplus
1283 }
1284 #endif
1285
1286 #endif // __PRCM_H__
1287
1288 //*****************************************************************************
1289 //
1292 //
1293 //*****************************************************************************
PRCM_PERIPH_TIMER1
#define PRCM_PERIPH_TIMER1
Definition: prcm.h:185
PRCMMcuUldoConfigure
__STATIC_INLINE void PRCMMcuUldoConfigure(uint32_t ui32Enable)
Assert or deassert a request for the uLDO.
Definition: prcm.h:360
PRCMLoadGet
__STATIC_INLINE bool PRCMLoadGet(void)
Check if any of the load sensitive register has been updated.
Definition: prcm.h:608
PRCMAudioClockDisable
__STATIC_INLINE void PRCMAudioClockDisable(void)
Disable the audio clock generation.
Definition: prcm.h:490
PRCMMcuPowerOff
__STATIC_INLINE void PRCMMcuPowerOff(void)
Request a power off of the MCU voltage domain.
Definition: prcm.h:310
debug.h
PRCM_PERIPH_TRNG
#define PRCM_PERIPH_TRNG
Definition: prcm.h:195
PRCMClockConfigureGet
uint32_t PRCMClockConfigureGet(uint32_t ui32Domain)
Get the clock configuration for a specific sub system in the MCU Voltage Domain.
Definition: prcm.c:335
PRCM_PERIPH_I2S
#define PRCM_PERIPH_I2S
Definition: prcm.h:198
PRCMInfClockConfigureGet
uint32_t PRCMInfClockConfigureGet(uint32_t ui32PowerMode)
Use this function to retreive the set infrastructure clock configuration.
Definition: prcm.c:212
PRCM_PERIPH_TIMER0
#define PRCM_PERIPH_TIMER0
Definition: prcm.h:184
ASSERT
#define ASSERT(expr)
Definition: debug.h:65
PRCMSleep
__STATIC_INLINE void PRCMSleep(void)
Put the processor into sleep mode.
Definition: prcm.h:1135
PRCMPowerDomainStatus
uint32_t PRCMPowerDomainStatus(uint32_t ui32Domains)
Get the status for a specific power domain.
Definition: prcm.c:728
PRCM_PERIPH_UART1
#define PRCM_PERIPH_UART1
Definition: prcm.h:191
PRCM_DOMAIN_VIMS
#define PRCM_DOMAIN_VIMS
Definition: prcm.h:146
PRCMRfReady
__STATIC_INLINE bool PRCMRfReady(void)
Return the access status of the RF Core.
Definition: prcm.h:1085
PRCMLoadSet
__STATIC_INLINE void PRCMLoadSet(void)
Use this function to synchronize the load settings.
Definition: prcm.h:588
PRCM_PERIPH_TIMER2
#define PRCM_PERIPH_TIMER2
Definition: prcm.h:186
PRCMPeripheralSleepEnable
void PRCMPeripheralSleepEnable(uint32_t ui32Peripheral)
Enables a peripheral in sleep mode.
Definition: prcm.c:648
PRCMPeripheralSleepDisable
void PRCMPeripheralSleepDisable(uint32_t ui32Peripheral)
Disables a peripheral in sleep mode.
Definition: prcm.c:668
PRCMAudioClockConfigSetOverride
void PRCMAudioClockConfigSetOverride(uint32_t ui32ClkConfig, uint32_t ui32MstDiv, uint32_t ui32BitDiv, uint32_t ui32WordDiv)
Configure the audio clock generation with manual setting of clock divider.
Definition: prcm.c:469
PRCM_PERIPH_SSI0
#define PRCM_PERIPH_SSI0
Definition: prcm.h:188
PRCM_PERIPH_TIMER3
#define PRCM_PERIPH_TIMER3
Definition: prcm.h:187
PRCM_PERIPH_SSI1
#define PRCM_PERIPH_SSI1
Definition: prcm.h:189
PRCM_PERIPH_I2C1
#define PRCM_PERIPH_I2C1
Definition: prcm.h:193
PRCM_PERIPH_CRYPTO
#define PRCM_PERIPH_CRYPTO
Definition: prcm.h:194
PRCM_PERIPH_GPIO
#define PRCM_PERIPH_GPIO
Definition: prcm.h:197
PRCMRfPowerDownWhenIdle
__STATIC_INLINE void PRCMRfPowerDownWhenIdle(void)
Configure RF core to power down when idle.
Definition: prcm.h:791
PRCMDomainDisable
__STATIC_INLINE void PRCMDomainDisable(uint32_t ui32Domains)
Disable clock domains in the MCU voltage domain.
Definition: prcm.h:681
PRCM_PERIPH_UART0
#define PRCM_PERIPH_UART0
Definition: prcm.h:190
interrupt.h
cpu.h
PRCM_PERIPH_UDMA
#define PRCM_PERIPH_UDMA
Definition: prcm.h:196
CPUwfi
__STATIC_INLINE void CPUwfi(void)
Wait for interrupt.
Definition: cpu.h:154
PRCMRetentionEnable
void PRCMRetentionEnable(uint32_t ui32PowerDomain)
Enable retention on specific power domains.
Definition: prcm.c:799
PRCMDeepSleep
void PRCMDeepSleep(void)
Put the processor into deep-sleep mode.
Definition: prcm.c:775
PRCMInfClockConfigureSet
void PRCMInfClockConfigureSet(uint32_t ui32ClkDiv, uint32_t ui32PowerMode)
Configure the infrastructure clock.
Definition: prcm.c:152
PRCMPowerDomainOn
void PRCMPowerDomainOn(uint32_t ui32Domains)
Turn power on in power domains in the MCU domain.
Definition: prcm.c:514
PRCMMcuPowerOffCancel
__STATIC_INLINE void PRCMMcuPowerOffCancel(void)
Cancel a request for a power off of the MCU voltage domain.
Definition: prcm.h:332
PRCM_DOMAIN_RFCORE
#define PRCM_DOMAIN_RFCORE
Definition: prcm.h:138
PRCMRetentionDisable
void PRCMRetentionDisable(uint32_t ui32PowerDomain)
Disable retention on power domains.
Definition: prcm.c:864
PRCMPeripheralRunDisable
void PRCMPeripheralRunDisable(uint32_t ui32Peripheral)
Disables a peripheral in Run mode.
Definition: prcm.c:628
PRCMWdtResetStatus
__STATIC_INLINE bool PRCMWdtResetStatus(void)
Read reset status for WatchDog Timer.
Definition: prcm.h:1111
PRCMClockConfigureSet
void PRCMClockConfigureSet(uint32_t ui32Domains, uint32_t ui32ClkDiv)
Setup the clock division factor for a subsystem in the MCU voltage domain.
Definition: prcm.c:276
PRCMPeripheralRunEnable
void PRCMPeripheralRunEnable(uint32_t ui32Peripheral)
Enables a peripheral in Run mode.
Definition: prcm.c:608
PRCMPeripheralDeepSleepEnable
void PRCMPeripheralDeepSleepEnable(uint32_t ui32Peripheral)
Enables a peripheral in deep-sleep mode.
Definition: prcm.c:688
rom.h
PRCMPowerDomainOff
void PRCMPowerDomainOff(uint32_t ui32Domains)
Turn off a specific power domain.
Definition: prcm.c:561
PRCMPeripheralDeepSleepDisable
void PRCMPeripheralDeepSleepDisable(uint32_t ui32Peripheral)
Disables a peripheral in deep-sleep mode.
Definition: prcm.c:708
PRCMAudioClockConfigSet
void PRCMAudioClockConfigSet(uint32_t ui32ClkConfig, uint32_t ui32SampleRate)
Configure the audio clock generation.
Definition: prcm.c:386
PRCMDomainEnable
__STATIC_INLINE void PRCMDomainEnable(uint32_t ui32Domains)
Enable clock domains in the MCU voltage domain.
Definition: prcm.h:638
PRCMAudioClockEnable
__STATIC_INLINE void PRCMAudioClockEnable(void)
Enable the audio clock generation.
Definition: prcm.h:472
PRCM_PERIPH_I2C0
#define PRCM_PERIPH_I2C0
Definition: prcm.h:192