## AUX_AIODIO0

Instance: AUX_AIODIO0
Component: AUX_AIODIO
Base address: 0x400c1000

AUX Analog/Digital Input Output Controller

### TOP:AUX_AIODIO0 Register Summary

Register Name | Type | Register Width (Bits) | Register Reset | Address Offset | Physical Address
GPIODOUT | RW | 32 | 0x0000 0000 | 0x0000 0000 | 0x400C 1000
IOMODE | RW | 32 | 0x0000 0000 | 0x0000 0004 | 0x400C 1004
GPIODIN | RO | 32 | 0x0000 0000 | 0x0000 0008 | 0x400C 1008
GPIODOUTSET | RW | 32 | 0x0000 0000 | 0x0000 000C | 0x400C 100C
GPIODOUTCLR | RW | 32 | 0x0000 0000 | 0x0000 0010 | 0x400C 1010
GPIODOUTTGL | RW | 32 | 0x0000 0000 | 0x0000 0014 | 0x400C 1014
GPIODIE | RW | 32 | 0x0000 0000 | 0x0000 0018 | 0x400C 1018

### TOP:AUX_AIODIO0 Register Descriptions

### TOP:AUX_AIODIO:GPIODOUT

Address offset | 0x0000 0000
Physical address | 0x400C 1000 | Instance | AUX_AIODIO0
Description | General Purpose Input/Output Data Out This register is used to set data on the pads assigned to AUX
Type | RW

Bits | Field Name | Description | Type | Reset
31:8 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x00 0000
7:0 | IO7_0 | Output values for AUXIO0 through AUXIO7 (for AIODIO0) or AUXIO8 through AUXIO15 (for AIODIO1). | RW | 0x00

### TOP:AUX_AIODIO:IOMODE

Address offset | 0x0000 0004
Physical address | 0x400C 1004 | Instance | AUX_AIODIO0
Description | Input Output Mode Controls pull-up pull-down and output mode for the IO pins assigned to AUX
Type | RW

Bits | Field Name | Description | Type | Reset
31:16 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x0000
15:14 | IO7 | Selects mode for AUXIO7 (for AIODIO0) or AUXIO15 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 7 = 1 Analog input/output with GPIODIE bit 7 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0
13:12 | IO6 | Selects mode for AUXIO6 (for AIODIO0) or AUXIO14 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 6 = 1 Analog input/output with GPIODIE bit 6 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0
11:10 | IO5 | Selects mode for AUXIO5 (for AIODIO0) or AUXIO13 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 5 = 1 Analog input/output with GPIODIE bit 5 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0
9:8 | IO4 | Selects mode for AUXIO4 (for AIODIO0) or AUXIO12 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 4 = 1 Analog input/output with GPIODIE bit 4 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0
7:6 | IO3 | Selects mode for AUXIO3 (for AIODIO0) or AUXIO11 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 3 = 1 Analog input/output with GPIODIE bit 3 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0
5:4 | IO2 | Selects mode for AUXIO2 (for AIODIO0) or AUXIO10 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 2 = 1 Analog input/output with GPIODIE bit 2 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0
3:2 | IO1 | Selects mode for AUXIO1 (for AIODIO0) or AUXIO9 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 1 = 1 Analog input/output with GPIODIE bit 1 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0
1:0 | IO0 | Selects mode for AUXIO0 (for AIODIO0) or AUXIO8 (for AIODIO1).
Value | ENUM name | Description
0x0 | OUT | Output
0x1 | IN | Digital input with GPIODIE bit 0 = 1 Analog input/output with GPIODIE bit 0 = 0
0x2 | OPEN_DRAIN | Open-drain: The pin is driven low when the corresponding GPIODOUT bit is 0, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
0x3 | OPEN_SOURCE | Open-source: The pin is driven high when the corresponding GPIODOUT bit is 1, and otherwise tri-stated or pulled depending on the corresponding IOC configuration.
| RW | 0x0

### TOP:AUX_AIODIO:GPIODIN

Address offset | 0x0000 0008
Physical address | 0x400C 1008 | Instance | AUX_AIODIO0
Description | General Purpose Input Output Data In
Type | RO

Bits | Field Name | Description | Type | Reset
31:8 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x00 0000
7:0 | IO7_0 | Input values for AUXIO0 through AUXIO7 (for AIODIO0) or AUXIO8 through AUXIO15 (for AIODIO1). | RO | 0x00

### TOP:AUX_AIODIO:GPIODOUTSET

Address offset | 0x0000 000C
Physical address | 0x400C 100C | Instance | AUX_AIODIO0
Description | General Purpose Input Output Data Out Set Strobes for setting output data register bits
Type | RW

Bits | Field Name | Description | Type | Reset
31:8 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x00 0000
7:0 | IO7_0 | Writing 1(s) to one or more bit positions sets the corresponding bit(s) in GPIODOUT. Read value is 0x00. | RW | 0x00

### TOP:AUX_AIODIO:GPIODOUTCLR

Address offset | 0x0000 0010
Physical address | 0x400C 1010 | Instance | AUX_AIODIO0
Description | General Purpose Input Output Data Out Clear Strobes for clearing output data register bits
Type | RW

Bits | Field Name | Description | Type | Reset
31:8 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x00 0000
7:0 | IO7_0 | Writing 1(s) to one or more bit positions clears the corresponding bit(s) in GPIODOUT. Read value is 0x00. | RW | 0x00

### TOP:AUX_AIODIO:GPIODOUTTGL

Address offset | 0x0000 0014
Physical address | 0x400C 1014 | Instance | AUX_AIODIO0
Description | General Purpose Input Output Data Out Toggle Strobes for toggling output data register bits
Type | RW

Bits | Field Name | Description | Type | Reset
31:8 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x00 0000
7:0 | IO7_0 | Writing 1(s) to one or more bit positions toggles the corresponding bit(s) in GPIODOUT. Read value is 0x00. | RW | 0x00

### TOP:AUX_AIODIO:GPIODIE

Address offset | 0x0000 0018
Physical address | 0x400C 1018 | Instance | AUX_AIODIO0
Description | General Purpose Input Output Input Enable
Type | RW

Bits | Field Name | Description | Type | Reset
31:8 | Reserved | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) | RO | 0x00 0000
7:0 | IO7_0 | Enables (1) or disables (0) digital input buffers for each AUX I/O pin. Input buffers must be enabled to allow reading pin values through GPIODIN. Input buffers must be disabled for analog input or floating pins to avoid current leakage. | RW | 0x00