/******************************************************************************
*  Filename:       hw_aux_smph.h
*  Revised:        2015-01-15 18:41:47 +0100 (to, 15 jan 2015)
*  Revision:       42400
*
* Copyright (c) 2015, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
*    this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
*    this list of conditions and the following disclaimer in the documentation
*    and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
*    be used to endorse or promote products derived from this software without
*    specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/

#ifndef __HW_AUX_SMPH_H__
#define __HW_AUX_SMPH_H__


//*****************************************************************************
//
// This section defines the register offsets of
// AUX_SMPH component
//
//*****************************************************************************
// Semaphore 0
#define AUX_SMPH_O_SMPH0                                            0x00000000

// Semaphore 1
#define AUX_SMPH_O_SMPH1                                            0x00000004

// Semaphore 2
#define AUX_SMPH_O_SMPH2                                            0x00000008

// Semaphore 3
#define AUX_SMPH_O_SMPH3                                            0x0000000C

// Semaphore 4
#define AUX_SMPH_O_SMPH4                                            0x00000010

// Semaphore 5
#define AUX_SMPH_O_SMPH5                                            0x00000014

// Semaphore 6
#define AUX_SMPH_O_SMPH6                                            0x00000018

// Semaphore 7
#define AUX_SMPH_O_SMPH7                                            0x0000001C

// Sticky Request For Single Semaphore
#define AUX_SMPH_O_AUTOTAKE                                         0x00000020

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH0
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH0_STAT                                         0x00000001
#define AUX_SMPH_SMPH0_STAT_BITN                                    0
#define AUX_SMPH_SMPH0_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH0_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH1
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH1_STAT                                         0x00000001
#define AUX_SMPH_SMPH1_STAT_BITN                                    0
#define AUX_SMPH_SMPH1_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH1_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH2
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH2_STAT                                         0x00000001
#define AUX_SMPH_SMPH2_STAT_BITN                                    0
#define AUX_SMPH_SMPH2_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH2_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH3
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH3_STAT                                         0x00000001
#define AUX_SMPH_SMPH3_STAT_BITN                                    0
#define AUX_SMPH_SMPH3_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH3_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH4
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH4_STAT                                         0x00000001
#define AUX_SMPH_SMPH4_STAT_BITN                                    0
#define AUX_SMPH_SMPH4_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH4_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH5
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH5_STAT                                         0x00000001
#define AUX_SMPH_SMPH5_STAT_BITN                                    0
#define AUX_SMPH_SMPH5_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH5_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH6
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH6_STAT                                         0x00000001
#define AUX_SMPH_SMPH6_STAT_BITN                                    0
#define AUX_SMPH_SMPH6_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH6_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_SMPH7
//
//*****************************************************************************
// Field: [0]    STAT
//
// Status when reading:
//
// 0: Semaphore was already taken
// 1: Semaphore was available and hence taken by this read access
//
// Reading the register causes it to change value to 0. Releasing the semaphore
// is done by writing 1
#define AUX_SMPH_SMPH7_STAT                                         0x00000001
#define AUX_SMPH_SMPH7_STAT_BITN                                    0
#define AUX_SMPH_SMPH7_STAT_M                                       0x00000001
#define AUX_SMPH_SMPH7_STAT_S                                       0

//*****************************************************************************
//
// Register: AUX_SMPH_O_AUTOTAKE
//
//*****************************************************************************
// Field: [2:0] SMPH_ID
//
// Requesting a certain semaphore is done by writing the corresponding semaphore
// ID, 0x0-0x7, to SMPH_ID. The request is sticky and once the semaphore becomes
// available it will be taken. At the same time, SMPH_AUTOTAKE_DONE event is
// asserted. This event is deasserted when SW releases the semaphore or a new ID is
// written to SMPH_ID.
//
// Note: SW must wait until SMPH_AUTOTAKE_DONE event is triggered before writing
// a new ID to SMPH_ID . Failing to do so might lead to permanently lost
// semaphores as the owners may be unknown
#define AUX_SMPH_AUTOTAKE_SMPH_ID_M                                 0x00000007
#define AUX_SMPH_AUTOTAKE_SMPH_ID_S                                 0

#endif // __HW_AUX_SMPH_H__
