------------------------------------------------------------------------------- -- TI SN74ABT8543 -- -- IEEE Std 1149.1 (JTAG) Boundary-Scan Test Device -- -- with Octal Registered Bus Transceivers -- ------------------------------------------------------------------------------- -- Created by : Texas Instruments Incorporated -- -- Documentation : SN74ABT8543 Data Sheet (SCBS120) -- -- Product Status: Released to Production (RTP) -- -- BSDL revision : 1.2 -- -- BSDL status : Production -- -- Date created : 05/01/94 -- -- Last modified : 07/26/97 -- -- Modification history - -- -- - misc clean-up, cosmetic only -- -- - remove package constant NT, add package constant DL -- ------------------------------------------------------------------------------- -- -- -- IMPORTANT NOTICE -- -- -- -- Texas Instruments (TI) reserves the right to make changes to its -- -- products or to discontinue any semiconductor product or service without -- -- notice, and advises its customers to obtain the latest version of -- -- relevant information to verify, before placing orders, that the -- -- information being relied on is current. -- -- -- -- TI warrants performance of its semiconductor products and related -- -- software to the specifications applicable at the time of sale in -- -- accordance with TI's standard warranty. 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Nor does TI warrant or represent that any license, -- -- either express or implied, is granted under any patent right, copyright, -- -- mask work right, or other intellectual property right of TI covering or -- -- relating to any combination, machine, or process in which such -- -- semiconductor products or services might be or are used. -- -- -- -- Copyright (c) 1997, Texas Instruments Incorporated -- -- -- ------------------------------------------------------------------------------- entity sn74abt8543 is generic (PHYSICAL_PIN_MAP : string := "UNDEFINED"); port (LEAB_NEG:in bit; LEBA_NEG:in bit; CEAB_NEG:in bit; CEBA_NEG:in bit; OEAB_NEG:in bit; OEBA_NEG:in bit; A:inout bit_vector(1 to 8); B:inout bit_vector(1 to 8); GND, VCC:linkage bit; TDO:out bit; TDI, TMS, TCK:in bit); use STD_1149_1_1990.all; -- Get standard attributes and definitions attribute PIN_MAP of sn74abt8543 : entity is PHYSICAL_PIN_MAP; constant JT : PIN_MAP_STRING := "LEAB_NEG:1, LEBA_NEG:28," & "CEAB_NEG:2, CEBA_NEG:27, OEAB_NEG:3," & "OEBA_NEG:26, GND:7, VCC:21, TDO:13, TMS:14," & "TCK:15, TDI:16, A:(4,5,6,8,9,10,11,12)," & "B:(25,24,23,22,20,19,18,17)"; constant DL : PIN_MAP_STRING := "LEAB_NEG:1, LEBA_NEG:28," & "CEAB_NEG:2, CEBA_NEG:27, OEAB_NEG:3," & "OEBA_NEG:26, GND:7, VCC:21, TDO:13, TMS:14," & "TCK:15, TDI:16, A:(4,5,6,8,9,10,11,12)," & "B:(25,24,23,22,20,19,18,17)"; constant DW : PIN_MAP_STRING := "LEAB_NEG:1, LEBA_NEG:28," & "CEAB_NEG:2, CEBA_NEG:27, OEAB_NEG:3," & "OEBA_NEG:26, GND:7, VCC:21, TDO:13, TMS:14," & "TCK:15, TDI:16, A:(4,5,6,8,9,10,11,12)," & "B:(25,24,23,22,20,19,18,17)"; constant FK : PIN_MAP_STRING := "LEAB_NEG:8, LEBA_NEG:7," & "CEAB_NEG:9, CEBA_NEG:6, OEAB_NEG:10," & "OEBA_NEG:5, GND:14, VCC:28, TDO:20, TMS:21," & "TCK:22, TDI:23, A:(11,12,13,15,16,17,18,19)," & "B:(4,3,2,1,27,26,25,24)"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (50.0e6, BOTH); attribute INSTRUCTION_LENGTH of sn74abt8543 : entity is 8; attribute INSTRUCTION_OPCODE of sn74abt8543 : entity is "BYPASS (11111111, 10000001), " & "EXTEST (00000000), " & "SAMPLE (10000010), " & "INTEST (00000011), " & "HIGHZ (00000110), " & -- Control Boundary to High-Impedance "CLAMP (10000111), " & -- Control Boundary to 1/0 "RUNT (00001001), " & -- Boundary Run Test "READBN (00001010), " & -- Boundary Read Normal Mode "READBT (10001011), " & -- Boundary Read Test Mode "CELLTST(00001100), " & -- Boundary Self-Test Normal Mode "TOPHIP (10001101), " & -- Boundary Toggle Outputs Test Mode "SCANCN (10001110), " & -- BCR Scan Normal Mode "SCANCT (00001111) " ; -- BCR Scan Test Mode attribute INSTRUCTION_CAPTURE of sn74abt8543 : entity is "10000001"; attribute INSTRUCTION_DISABLE of sn74abt8543 : entity is "HIGHZ"; attribute INSTRUCTION_GUARD of sn74abt8543 : entity is "CLAMP"; attribute REGISTER_ACCESS of sn74abt8543 : entity is "BOUNDARY (EXTEST, SAMPLE, INTEST, READBN, READBT, CELLTST)," & "BYPASS (BYPASS, HIGHZ, CLAMP, RUNT, TOPHIP)," & "BCR[11] (SCANCN, SCANCT)" ; attribute BOUNDARY_CELLS of sn74abt8543 : entity is "BC_1"; attribute BOUNDARY_LENGTH of sn74abt8543 : entity is 40; attribute BOUNDARY_REGISTER of sn74abt8543 : entity is "0 (BC_1, B(1) ,output3 , X, 39, 0, Z)," & "1 (BC_1, B(2) ,output3 , X, 39, 0, Z)," & "2 (BC_1, B(3) ,output3 , X, 39, 0, Z)," & "3 (BC_1, B(4) ,output3 , X, 39, 0, Z)," & "4 (BC_1, B(5) ,output3 , X, 39, 0, Z)," & "5 (BC_1, B(6) ,output3 , X, 39, 0, Z)," & "6 (BC_1, B(7) ,output3 , X, 39, 0, Z)," & "7 (BC_1, B(8) ,output3 , X, 39, 0, Z)," & "8 (BC_1, B(1) ,input , X)," & "9 (BC_1, B(2) ,input , X)," & "10 (BC_1, B(3) ,input , X)," & "11 (BC_1, B(4) ,input , X)," & "12 (BC_1, B(5) ,input , X)," & "13 (BC_1, B(6) ,input , X)," & "14 (BC_1, B(7) ,input , X)," & "15 (BC_1, B(8) ,input , X)," & "16 (BC_1, A(1) ,output3 , X, 38, 0, Z)," & "17 (BC_1, A(2) ,output3 , X, 38, 0, Z)," & "18 (BC_1, A(3) ,output3 , X, 38, 0, Z)," & "19 (BC_1, A(4) ,output3 , X, 38, 0, Z)," & "20 (BC_1, A(5) ,output3 , X, 38, 0, Z)," & "21 (BC_1, A(6) ,output3 , X, 38, 0, Z)," & "22 (BC_1, A(7) ,output3 , X, 38, 0, Z)," & "23 (BC_1, A(8) ,output3 , X, 38, 0, Z)," & "24 (BC_1, A(1) ,input , X)," & "25 (BC_1, A(2) ,input , X)," & "26 (BC_1, A(3) ,input , X)," & "27 (BC_1, A(4) ,input , X)," & "28 (BC_1, A(5) ,input , X)," & "29 (BC_1, A(6) ,input , X)," & "30 (BC_1, A(7) ,input , X)," & "31 (BC_1, A(8) ,input , X)," & "32 (BC_1, CEBA_NEG,input , X)," & "33 (BC_1, CEAB_NEG,input , X)," & "34 (BC_1, LEBA_NEG,input , X)," & "35 (BC_1, LEAB_NEG,input , X)," & "36 (BC_1, OEBA_NEG,input , X)," & "37 (BC_1, OEAB_NEG,input , X)," & "38 (BC_1, * ,controlr, 0)," & "39 (BC_1, * ,controlr, 0) " ; end sn74abt8543;