Overview for Clock Jitter Cleaners

TI’s high performance jitter cleaners are widely used in applications like wireless base stations, remote radio units (RRU), radar, medical and test equipment. A wide range of on-chip features make it easy to synchronize multiple JESD204B data converters and remove jitter from dirty or recovered reference clock ICs.

Jitter Cleaner Diagram
  • Ultra low jitter : 88fs typ 12K-10M
  • Ultra low inband phase noise through leading BiCMOS technology
Lower system cost
  • Industry’s first and most popular JESD204B jitter cleaner family LMK0482x
  • Supports JESD204B and non-JESD204B applications with a single device
  • Full SYSREF support reduces SoC complexity and cost
PLL Jitter Cleaner Diagram
  • PLLATINUM dual phase locked loop (PLL) concept reduces cost and improves performance
  • Generates frequencies up to 3GHz with an integrated high performance VCO

Browse by application

Browse featured products

  LMK04828 LMK04808 LMK04906 CDCM7005 CDCM7005-SP
Description High performance dual loop jitter cleaner with JESD204B support High performance dual loop jitter cleaner High performance dual loop jitter cleaner High performance single loop Jitter cleaner Space grade single loop jitter cleaner
No. of Outputs 15 14 6 5 5
Output Frequency (Max ) (MHz ) 3080 3072 2600 1500 1500
No. of Inputs 2 2 3 2 2
RMS Jitter (fs)
12kHz to 20MHz
88 111 100 NA - single loop NA - single loop
Applications Wireless, Industrial Wireless, Industrial Wireless, Industrial Industrial Space

See all jitter cleaners

Clock Jitter Cleaners videos

WEBENCH® Clock Architect

TI's WEBENCH Clock Architect online design tool makes the designer's life easier by generating complete clock-tree solutions. Multiple solutions are generated, each optimized for performance, cost or board space.

WEBENCH® Designer