The ADC128S102 device is a low-power, eight-channel CMOS 12-bit analog-to-digital converter specified for conversion throughput rates of 50 kSPS to 1 MSPS. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. The device can be configured to accept up to eight input signals at inputs IN0 through IN7.
The output serial data is straight binary and is compatible with several standards, such as SPI, QSPI, MICROWIRE, and many common DSP serial interfaces.
The ADC128S102 may be operated with independent analog and digital supplies. The analog supply (VA) can range from 2.7 V to 5.25 V, and the digital supply (VD) can range from 2.7 V to VA. Normal power consumption using a 3-V or 5-V supply is 2.3 mW and 10.7 mW, respectively. The power-down feature reduces the power consumption to 0.06 µW using a 3-V supply and 0.25 µW using a 5-V supply.
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|# Input Channels|
|INL (Max) (+/-LSB)|
|Power Consumption (Typ) (mW)|
|Analog Voltage AVDD (Min) (V)|
|Analog Voltage AVDD (Max) (V)|
|Digital Supply (Min) (V)|
|Digital Supply (Max) (V)|
|Operating Temperature Range (C)|
|Package Size: mm2:W x L (PKG)|
Microwire (Serial I/O)
-55 to 125
-55 to 115
-55 to 125
25 to 25
|See datasheet (CFP)||See datasheet (CFP)|
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