ADC12D1620QML-SP 12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling ADC with improved ENOB – aerospace | TI.com

ADC12D1620QML-SP
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12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling ADC with improved ENOB – aerospace

12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling ADC with improved ENOB – aerospace - ADC12D1620QML-SP
Datasheet
ADC12D1620QML-SP 12-Bit, Single Or Dual, 3200- or 1600-MSPS RF Sampling Analog-to-Digital Converter (ADC) datasheet
 

Description

The ADC12D1620QML device uses a package redesign to achieve better ENOB, SNR, and X-talk compared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power, high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a low-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

Features

  • Total Ionizing Dose (TID) to 300 krad(Si)
  • Single Event Functional Interrupt (SEFI) Tested
  • Single Event Latch-up (SEL) > 120 MeV-cm2/mg
  • Cold Sparing Capable
  • Wide Temperature Range –55°C to +125°C
  • Power Consumption = 3.8 W or 2.7 W (1600- or 800-MHz Clock)
  • 3-dB Input Bandwidth = 3 GHz
  • Low-Sampling Power-Saving Mode (LSPSM) Reduces Power Consumption and Improves Performance for fCLK ≤ 800 MHz
  • Auto-Sync Function for Multi-Chip Systems
  • Time Stamp Feature to Capture External Trigger
  • Test Patterns at Output for System Debug
  • 1:1 Non-Demuxed or 1:2 or 1:4 Parallel Demuxed LVDS Outputs
  • Single 1.9-V Power Supply

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Parametrics

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Part number Order Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
ADC12D1620QML-SP Order now 1600
3200    		 Ultra High Speed     12     2
1    		 59.8     9.5     67.4     3880     0.8     Parallel LVDS     -55 to 125
25 to 25    		 2400     Yes     CCGA | 376
CLGA | 256    		 376CCGA: 781 mm2: 27.94 x 27.94 (CCGA | 376)
256CLGA: 781 mm2: 27.94 x 27.94 (CLGA | 256)    		 Space     Folding Interpolating    
ADC12D1600QML-SP Samples not available 1600
3200    		 Ultra High Speed     12     2
1    		 58.2     9.3     67.3     3880     0.8     Parallel LVDS     25 to 25
-55 to 125    		 2400     Yes     CCGA | 376     376CCGA: 781 mm2: 27.94 x 27.94 (CCGA | 376)     Space     Folding Interpolating