Product details

Sample rate (max) (Msps) 130 Resolution (Bits) 16 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 1400 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.4 Power consumption (typ) (mW) 755 Architecture Pipeline SNR (dB) 78.5 ENOB (bit) 12.7 SFDR (dB) 95.5 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 130 Resolution (Bits) 16 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 1400 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.4 Power consumption (typ) (mW) 755 Architecture Pipeline SNR (dB) 78.5 ENOB (bit) 12.7 SFDR (dB) 95.5 Operating temperature range (°C) -40 to 85 Input buffer No
WQFN (NKD) 64 81 mm² 9 x 9
  • Dual Supplies: 1.8V and 3.0V Operation
  • On Chip Automatic Calibration During Power-Up
  • Low Power Consumption
  • Multi-Level Multi-Function Pins for CLK/DF and PD
  • Power-Down and Sleep Modes
  • On Chip Precision Reference and Sample-and-Hold Circuit
  • On Chip Low Jitter Duty-Cycle Stabilizer
  • Offset Binary or 2's Complement Data Format
  • Full Data Rate LVDS Output Port
  • 64-pin WQFN Package (9x9x0.8, 0.5mm Pin-Pitch)

Key Specifications

  • High IF Sampling Receivers
  • Multi-carrier Base Station Receivers
    • GSM/EDGE, CDMA2000, UMTS, LTE, and WiMax
  • Test and Measurement Equipment
  • Communications Instrumentation
  • Data Acquisition
  • Portable Instrumentation

All trademarks are the property of their respective owners.

  • Dual Supplies: 1.8V and 3.0V Operation
  • On Chip Automatic Calibration During Power-Up
  • Low Power Consumption
  • Multi-Level Multi-Function Pins for CLK/DF and PD
  • Power-Down and Sleep Modes
  • On Chip Precision Reference and Sample-and-Hold Circuit
  • On Chip Low Jitter Duty-Cycle Stabilizer
  • Offset Binary or 2's Complement Data Format
  • Full Data Rate LVDS Output Port
  • 64-pin WQFN Package (9x9x0.8, 0.5mm Pin-Pitch)

Key Specifications

  • High IF Sampling Receivers
  • Multi-carrier Base Station Receivers
    • GSM/EDGE, CDMA2000, UMTS, LTE, and WiMax
  • Test and Measurement Equipment
  • Communications Instrumentation
  • Data Acquisition
  • Portable Instrumentation

All trademarks are the property of their respective owners.

The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16V130 could be re-calibrated at any time by asserting and then de-asserting power-down. An integrated low noise and stable voltage reference and differential reference buffer amplifier easies board level design. On-chip duty cycle stabilizer with low additive jitter allows wide duty cycle range of input clock without compromising its dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.4 GHz. The digital data is provided via full data rate LVDS outputs – making possible the 64-pin, 9mm x 9mm WQFN package. The ADC16V130 operates on dual power supplies +1.8V and +3.0V with a power-down feature to reduce the power consumption to very low levels while allowing fast recovery to full operation.

The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16V130 could be re-calibrated at any time by asserting and then de-asserting power-down. An integrated low noise and stable voltage reference and differential reference buffer amplifier easies board level design. On-chip duty cycle stabilizer with low additive jitter allows wide duty cycle range of input clock without compromising its dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.4 GHz. The digital data is provided via full data rate LVDS outputs – making possible the 64-pin, 9mm x 9mm WQFN package. The ADC16V130 operates on dual power supplies +1.8V and +3.0V with a power-down feature to reduce the power consumption to very low levels while allowing fast recovery to full operation.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 8
Type Title Date
* Data sheet ADC16V130 16-Bit, 130 MSPS A/D Converter with LVDS Outputs datasheet (Rev. E) 15 Mar 2013
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
User guide ADC16V130 16-Bit, 130 MSPS AD Converter with LVDS Outputs Eval Bd User Guide (Rev. A) 26 Jul 2013
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note AN-2177 Using the LMH6554 as a ADC Driver (Rev. A) 26 Apr 2013
Application note Drivng HSpeed ADCs w/LMH6521 DVGA for High IF AC-Coupled Apps (Rev. A) 26 Apr 2013
Application note AN-1950 Silently Powering Low Noise Applications (Rev. A) 22 Apr 2013
User guide SP16130CH4RB Low IF Receiver Reference Design User Guide 27 Jan 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Support software

WAVEVISION5 WaveVision 5 Software

WaveVision 5 software is part of the WaveVision evaluation system that also includes WaveVision 5 Data Capture Board. The WaveVision 5 system is an easy-to-use data acquisition and analysis tool, designed to help users evaluate Texas Instruments' Signal Path solutions.

While WaveVision 5 software (...)

Supported products & hardware

Supported products & hardware

Products
High-speed ADCs (≥10 MSPS)
ADC08D1020 8-Bit, Dual 1.0 GSPS or Single 2.0 GSPS, Analog-to-Digital Converter (ADC) ADC08D1520 8-Bit, Dual 1.5-GSPS or Single 3.0-GSPS Analog-to-Digital Converter (ADC) ADC10D1000 10-Bit, Dual 1.0-GSPS or Single 2.0-GSPS Analog-to-Digital Converter (ADC) ADC10D1500 10-Bit, Dual 1.5-GSPS or Single 3.0-GSPS Analog-to-Digital Converter (ADC) ADC10DV200 Dual-Channel, 10-Bit, 200-MSPS Analog-to-Digital Converter (ADC) ADC12D1000 12-Bit, Dual 1.0-GSPS or Single 2.0-GSPS Analog-to-Digital Converter (ADC) ADC12D1000RF 12-Bit, Dual 1.0-GSPS or Single 2.0-GSPS, RF Sampling Analog-to-Digital Converter (ADC) ADC12D1600 12-bit, dual 1.6-GSPS or single 3.2-GSPS analog-to-digital converter (ADC) ADC12D1600RF 12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling analog-to-digital converter (ADC) ADC12D1800 12-bit, dual 1.8GSPS or single 3.6GSPS analog-to-digital converter (ADC) ADC12D1800RF 12-Bit, Dual 1.8GSPS or Single 3.6GSPS, RF-Sampling Analog-to-Digital Converter (ADC) ADC12D500RF 12-Bit, Dual 500-MSPS or Single 1.0-GSPS, RF Sampling Analog-to-Digital Converter (ADC) ADC12D800RF 12-Bit, Dual 800-MSPS or Single 1.6-GSPS, RF Sampling Analog-to-Digital Converter (ADC) ADC14DC080 Dual-Channel, 14-Bit, 80-MSPS, 1.0-GHz Input Bandwidth Analog-to-Digital Converter (ADC) ADC16DV160 Dual-Channel, 16-Bit, 160-MSPS Analog-to-Digital Converter (ADC) ADC16V130 16-Bit, 130-MSPS Analog-to-Digital Converter (ADC)
Hardware development
Evaluation board
ADC08D1520RB The ADC08D1520RB: Low-Power, 8-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter Reference Board ADC12D1600RB 12-bit, dual 1.6-/1.8-GSPS or single 3.2-/3.6-GSPS ADC reference board ADC16DV160HFEB ADC16DV160HFEB Evaluation Board LM98640CVAL Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output WAVEVSN-BRD-5.1 WaveVision 5 Data Capture Board Version 5.1
Software
Application software & framework
WAVEVISION5 Data acquisition and analysis software
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
WQFN (NKD) 64 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos