ADS54J54 Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter (ADC) | TI.com

ADS54J54 (ACTIVE)

Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter (ADC)

Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter (ADC) - ADS54J54
Datasheet
 

Description

The ADS54J54 is a low power, wide bandwidth 14-bit 500 MSPS quad channel analog-to-digital converter (ADC). It supports the JESD204B serial interface with data rates up to 5 Gbps supporting 1 or 2 lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS54J54 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. Optional 2x Decimation Filter provides high-pass or low-pass filter modes.

Features

  • 4 Channel, 14-Bit 500 MSPS ADC
  • Analog Input Buffer with High
    Impedance Input
  • Flexible Input Clock Buffer With Divide
    by 1/2/4
  • 1.25 VPP Differential Full-
    Scale Input
  • JESD204B Serial Interface
    • Subclass 1 compliant up to 5 Gbps
    • 1 Lane Per ADC up to 250 Msps
    • 2 Lanes Per ADC up to 500 Msps
  • 64-Pin QFN Package (9 mm × 9 mm)
  • Key Specifications:
    • Power Dissipation: 875 mW/ch
    • Input Bandwidth (3 dB): 900 MHz
    • Aperture Jitter: 98 fs rms
    • Channel Isolation: 85 dB
    • Performance at ƒin = 170 MHz at 1.25 VPP,
      1lane 2x Decimation –1 dBFS
      • SNR: 67.2 dBFS
      • SFDR: 85 dBc HD2,3; 95 dBFS non-HD2,3
    • Performance at ƒin = 370 MHz at 1.25 VPP,
      2lane no Decimation –1 dBFS
      • SNR: 64.7 dBFS
      • SFDR: 75 dBc HD2,3; 83 dBFS non-HD2,3

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Parametrics Compare all products in High-speed ADCs (>10MSPS)

 
Sample Rate (Max) (MSPS)
Features
Resolution (Bits)
Number of input channels
SNR (dB)
ENOB (Bits)
SFDR (dB)
Power consumption (Typ) (mW)
Input range (Vp-p)
Interface
Operating temperature range (C)
Analog input BW (MHz)
Input buffer
Package Group
Package size: mm2:W x L (PKG)
Rating
Architecture
DNL (Typ) (+/-LSB)
INL (Typ) (+/-LSB)
Reference mode
ADS54J54
500    
High Performance    
14    
4    
65.8    
11    
85    
3500    
1.25    
JESD204B    
-40 to 85    
900    
Yes    
VQFN | 64    
64VQFN: 81 mm2: 9 x 9 (VQFN | 64)    
Catalog    
Pipeline    
0.9    
3    
Int