SBAS773A September 2017  – December 2017 ADS7142

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - All Modes
    6. 6.6 Electrical Characteristics - Manual Mode
    7. 6.7 Electrical Characteristics - Autonomous Modes
    8. 6.8 Electrical Characteristics - High Precision Mode
    9. 6.9 Timing Requirements
    10. 6.10Switching Characteristics
    11. 6.11Typical Characteristics for All Modes
    12. 6.12Typical Characteristics for Manual Mode
    13. 6.13Typical Characteristics for Autonomous Modes
    14. 6.14Typical Characteristics for High Precision Mode
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1 Analog Input and Multiplexer
        1. 7.3.1.1Two-Channel, Single-Ended Configuration
        2. 7.3.1.2 Single-Channel, Single-Ended Configuration
        3. 7.3.1.3Single-Channel, Pseudo-Differential Configuration
      2. 7.3.2 OFFSET Calibration
      3. 7.3.3 Reference
      4. 7.3.4 ADC Transfer Function
      5. 7.3.5 Oscillator and Timing Control
      6. 7.3.6 I2C Address Selector
      7. 7.3.7 Data Buffer
        1. 7.3.7.1Filling of the Data Buffer
        2. 7.3.7.2Reading data from the Data Buffer
      8. 7.3.8 Accumulator
      9. 7.3.9 Digital Window Comparator
      10. 7.3.10I2C Protocol Features
        1. 7.3.10.1General Call
        2. 7.3.10.2General Call with Software Reset
        3. 7.3.10.3General Call with Write Software programmable part of slave address
        4. 7.3.10.4Configuring Device into High Speed I2C mode
        5. 7.3.10.5Bus Clear
      11. 7.3.11Device Programming
        1. 7.3.11.1Reading Registers
          1. 7.3.11.1.1Single Register Read
          2. 7.3.11.1.2Reading a Continuous Block of Registers
        2. 7.3.11.2Writing Registers
          1. 7.3.11.2.1Single Register Write
          2. 7.3.11.2.2Set Bit
          3. 7.3.11.2.3Clear Bit
          4. 7.3.11.2.4Writing a continuous block of registers
    4. 7.4Device Functional Modes
      1. 7.4.1Device Power Up and Reset
      2. 7.4.2Manual Mode
        1. 7.4.2.1Manual Mode with CH0 Only
        2. 7.4.2.2Manual Mode with AUTO Sequence
      3. 7.4.3Autonomous Modes
        1. 7.4.3.1Autonomous Mode with Threshold Monitoring and Diagnostics
          1. 7.4.3.1.1 Autonomous Mode with Pre Alert Data
          2. 7.4.3.1.2 Autonomous Mode with Post Alert Data
        2. 7.4.3.2Autonomous Mode with Burst Data
          1. 7.4.3.2.1Autonomous Mode with Start Burst
          2. 7.4.3.2.2Autonomous Mode with Stop Burst
      4. 7.4.4High Precision Mode
    5. 7.5Optimizing Power Consumed by the Device
    6. 7.6Register Map
      1. 7.6.1RESET REGISTERS
        1. 7.6.1.1WKEY Register (address = 17h), [reset = 00h]
        2. 7.6.1.2DEVICE_RESET Register (address = 14h), [reset = 00h]
      2. 7.6.2FUNCTIONAL MODE SELECT REGISTERS
        1. 7.6.2.1OFFSET_CAL Register (address = 15h), [reset = 00h]
        2. 7.6.2.2OPMODE_SEL Register (address = 1Ch), [reset = 00h]
        3. 7.6.2.3OPMODE_I2CMODE_STATUS Register (address = 00h), [reset = 00h]
      3. 7.6.3INPUT CONFIG REGISTER
        1. 7.6.3.1CHANNEL_INPUT_CFG Register (address = 24h), [reset = 00h]
      4. 7.6.4ANALOG MUX and SEQUENCER REGISTERS
        1. 7.6.4.1AUTO_SEQ_CHEN Register (address = 20h), [reset = 03h]
        2. 7.6.4.2START_SEQUENCE Register (address = 1Eh), [reset = 00h]
        3. 7.6.4.3ABORT_SEQUENCE Register (address = 1Fh), [reset = 00h]
        4. 7.6.4.4SEQUENCE_STATUS Register (address = 04h), [reset = 00h]
      5. 7.6.5OSCILLATOR and TIMING CONTROL REGISTERS
        1. 7.6.5.1OSC_SEL Register (address = 18h), [reset = 00h]
        2. 7.6.5.2nCLK_SEL Register (address = 19h), [reset = 00h]
      6. 7.6.6DATA BUFFER CONTROL REGISTER
        1. 7.6.6.1DATA_BUFFER_OPMODE Register (address = 2Ch), [reset = 01h]
        2. 7.6.6.2DOUT_FORMAT_CFG Register (address = 28h), [reset = 00h]
        3. 7.6.6.3DATA_BUFFER_STATUS Register (address = 01h), [reset = 00h]
      7. 7.6.7ACCUMULATOR CONTROL REGISTERS
        1. 7.6.7.1ACC_EN Register (address = 30h), [reset = 00h]
        2. 7.6.7.2ACC_CH0_LSB Register (address = 08h), [reset = 00h]
        3. 7.6.7.3ACC_CH0_MSB Register (address = 09h), [reset = 00h]
        4. 7.6.7.4ACC_CH1_LSB Register (address = 0Ah), [reset = 00h]
        5. 7.6.7.5ACC_CH1_MSB Register (address = 0Bh), [reset = 00h]
        6. 7.6.7.6ACCUMULATOR_STATUS Register (address = 02h), [reset = 00h]
      8. 7.6.8DIGITAL WINDOW COMPARATOR REGISTERS
        1. 7.6.8.1 ALERT_DWC_EN Register (address = 37h), [reset = 00h]
        2. 7.6.8.2 ALERT_CHEN (address = 34h), [reset = 00h]
        3. 7.6.8.3 DWC_HTH_CH0_MSB Register (address = 39h), [reset = 00h]
        4. 7.6.8.4 DWC_HTH_CH0_LSB Register (address = 38h), [reset = 00h]
        5. 7.6.8.5 DWC_LTH_CH0_MSB Register (address = 3Bh), [reset = 00h]
        6. 7.6.8.6 DWC_LTH_CH0_LSB Register (address = 3Ah), [reset = 00h]
        7. 7.6.8.7 DWC_HYS_CH0 (address = 40h), [reset = 00h]
        8. 7.6.8.8 DWC_HTH_CH1_MSB Register (address = 3Dh), [reset = 00h]
        9. 7.6.8.9 DWC_HTH_CH1_LSB Register (address = 3Ch), [reset = 00h]
        10. 7.6.8.10DWC_LTH_CH1_MSB Register (address = 3Fh), [reset = 00h]
        11. 7.6.8.11DWC_LTH_CH1_LSB Register (address = 3Eh), [reset = 00h]
        12. 7.6.8.12DWC_HYS_CH1 (address = 41h), [reset = 00h]
        13. 7.6.8.13 PRE_ALT_MAX_EVENT_COUNT Register (address = 36h), [reset = 00h]
        14. 7.6.8.14ALERT_TRIG_CHID Register (address = 03h), [reset = 00h]
        15. 7.6.8.15ALERT_LOW_FLAGS Register (address = 0C), [reset = 00h]
        16. 7.6.8.16ALERT_HIGH_FLAGS Register (address = 0Eh), [reset = 00h]
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Applications
      1. 8.2.1ADS7142 as a Programmable Comparator with False Trigger Prevention and Diagnostics
        1. 8.2.1.1Design Requirements
          1. 8.2.1.1.1Higher Power Consumption
          2. 8.2.1.1.2 Fixed Threshold Voltages
        2. 8.2.1.2Detailed Design Procedure
          1. 8.2.1.2.1Programmable Thresholds and Hysteresis
          2. 8.2.1.2.2False Trigger Prevention with Event Counter
          3. 8.2.1.2.3Fault Diagnostics with Data Buffer
        3. 8.2.1.3Application Curve
      2. 8.2.2Event-triggered PIR sensing with ADS7142
        1. 8.2.2.1Design Requirements
        2. 8.2.2.2Detailed Design Procedure
        3. 8.2.2.3Application Curves
  9. Power-Supply Recommendations
    1. 9.1AVDD and DVDD Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Documentation Support
    2. 11.2Receiving Notification of Documentation Updates
    3. 11.3Community Resources
    4. 11.4Trademarks
    5. 11.5Electrostatic Discharge Caution
    6. 11.6Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

Features

  • Standalone, Nanopower Sensor Monitor for
    Cost-sensitive Designs
  • Small Package Size: 1.5 mm x 2 mm
  • Efficient Host Sleep and Wake-up
    • Autonomous Monitoring at 900 nW
    • Windowed Comparator for Event-triggered Host Wake-up
    • Data Buffering during Host Sleep
  • Independent Sensor Configuration and Calibration
    • Dual-Channel, Pseudo-Differential, or Ground-Sense Input Configuration
    • Programmable Thresholds for Calibration
    • Internal Calibration improves Offset and Drift
  • False Trigger Prevention
    • Programmable Thresholds per Channel
    • Programmable Hysteresis for Noise Immunity
    • Event Counter for Transient Rejection
  • Deep Data Analysis
    • Data Buffer for Fault Diagnostics
    • High Precision Mode for 16-bit Accuracy
    • One-Shot Mode for Fast Data Capture
  • I2C™ Interface
    • Compatible from 1.65 V to 3.6 V
    • 8 Configurable Addresses
    • Up to 3.4 MHz (High Speed)
  • Wide Operating Range
    • Analog Supply: 1.65 V to 3.6 V
    • Temperature Range: –40°C to 125°C

Applications

  • Sensor Nodes for Internet of Things (IoT)
  • Gas, Heat, PIR Motion and Smoke Detectors
  • Preventive Maintenance for Elevators, Escalators, HVAC, Industrial Equipment, and so forth
  • Wearable Electronics
  • Zero Cross Detection for Fault Indicators
  • Supervisory Functions
  • Comparator with Programmable Reference
  • Sensors for Deep Learning Artificial Intelligence

Description

The ADS7142 autonomously monitors signals while optimizing system power, reliability, and performance. It implements event-triggered interrupts per channel using a digital windowed comparator with programmable high and low thresholds, hysteresis, and event counter. The device includes a dual-channel analog multiplexer in front of a successive approximation register analog-to-digital converter (SAR ADC) followed by an internal data buffer for converting and capturing data from sensors.

The ADS7142 is available in 10-pin QFN package and consumes only 900 nW of power. The small form-factor and low power consumption make this device suitable for space-constrained and/or battery-powered applications.

Device Information(1)

PART NAMEPACKAGEBODY SIZE (NOM)
ADS7142X2QFN (10)1.50 mm × 2.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.
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