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18-Bit, 1-MSPS, 1-Ch SAR ADC with Internal VREF Buffer, Internal LDO and Enhanced SPI Interface


Models (4)

Title Category Type Date
±50mA to ±10A, 0V to 75V Common-Mode TINA-TI Spice Model TINA-TI Spice Model ZIP 10 Oct 2017
ADS8910B TINA-TI Reference Design TINA-TI Reference Design TSC 28 Jun 2016
ADS8910B TINA-TI Spice Model TINA-TI Spice Model TSM 28 Jun 2016
ADS8910B IBIS Model IBIS Model ZIP 28 Jun 2016

Design kits & evaluation modules (1)

Name Part# Type
ADS8910B 18-Bit 1MSPS SAR ADC EVM Performance Demonstration Kit (PDK) ADS8910BEVM-PDK Evaluation Modules & Boards

Reference designs

Transmitting SPI Signals Over LVDS Interface Reference Design

This TI Design demonstrates how to resolve and optimize signal integrity challenges typically found when sending SPI signals over longer distance on the same PCB or off PCB to another board in a noisy environment by transmitting SPI signals over LVDS interface. The concept offers high noise (...)

View the Important Notice for reference designs covering authorized use, intellectual property matters and disclaimers.

Software (1)

Source Files for SBAA267  (ZIP 103 KB )    01 Dec 2017  

Development tools (3)

Name Part# Type
Analog engineer's calculator ANALOG-ENGINEER-CALC Calculation Tools
Analog-to-digital converter input driver design tool supporting multiple input types ADC-INPUT-CALC Calculation Tools
SPICE-based analog simulation program TINA-TI Circuit Design & Simulation