SBAS771A June 2017  – July 2017 AMC1303E0510 , AMC1303E0520 , AMC1303E2510 , AMC1303E2520 , AMC1303M0510 , AMC1303M0520 , AMC1303M2510 , AMC1303M2520

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configurations and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Power Ratings
    6. 7.6 Insulation Specifications
    7. 7.7 Safety-Related Certifications
    8. 7.8 Safety Limiting Values
    9. 7.9 Electrical Characteristics: AMC1303x05x
    10. 7.10Electrical Characteristics: AMC1303x25x
    11. 7.11Switching Characteristics
    12. 7.12 Insulation Characteristics Curves
    13. 7.13Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1Analog Input
      2. 8.3.2Modulator
      3. 8.3.3Isolation Channel Signal Transmission
      4. 8.3.4Digital Output
      5. 8.3.5Manchester Coding Feature
    4. 8.4Device Functional Modes
      1. 8.4.1Fail-Safe Output
      2. 8.4.2Output Behavior in Case of a Full-Scale Input
  9. Application and Implementation
    1. 9.1Application Information
      1. 9.1.1Digital Filter Usage
    2. 9.2Typical Applications
      1. 9.2.1Frequency Inverter Application
        1. 9.2.1.1Design Requirements
        2. 9.2.1.2Detailed Design Procedure
        3. 9.2.1.3Application Curves
      2. 9.2.2Isolated Voltage Sensing
        1. 9.2.2.1Design Requirements
        2. 9.2.2.2Detailed Design Procedure
        3. 9.2.2.3Application Curve
      3. 9.2.3Do's and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation Support
    1. 12.1Device Support
      1. 12.1.1Device Nomenclature
        1. 12.1.1.1Isolation Glossary
    2. 12.2Documentation Support
      1. 12.2.1Related Documentation
    3. 12.3Related Links
    4. 12.4Receiving Notification of Documentation Updates
    5. 12.5Community Resources
    6. 12.6Trademarks
    7. 12.7Electrostatic Discharge Caution
    8. 12.8Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DWV|8
Orderable Information

Specifications

Absolute Maximum Ratings(1)

MINMAXUNIT
Supply voltage, AVDD to AGND or DVDD to DGND–0.36.5V
Analog input voltage at AINP, AINNAGND – 6 AVDD + 0.5V
Digital output voltage at DOUT, CLKOUT DGND – 0.5 DVDD + 0.5V
Input current to any pin except supply pins–1010mA
Junction temperature, TJ 150°C
Storage temperature, Tstg –65150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

ESD Ratings

VALUEUNIT
V(ESD) Electrostatic dischargeHuman-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)±2000V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)
MINNOMMAXUNIT
AVDDAnalog (high-side) supply voltage (AVDD to AGND)3.05.05.5 V
DVDDDigital (controller-side) supply voltage (DVDD to DGND)2.73.35.5V
TA Operating ambient temperature–40 125 °C

Thermal Information

THERMAL METRIC(1) AMC1303xUNIT
DWV (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance 112.2°C/W
RθJC(top) Junction-to-case (top) thermal resistance 47.6°C/W
RθJB Junction-to-board thermal resistance 60.0°C/W
ψJT Junction-to-top characterization parameter 23.1°C/W
ψJB Junction-to-board characterization parameter 60.0°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Power Ratings

PARAMETERTEST CONDITIONSMINTYPMAXUNIT
PDMaximum power dissipation
(both sides)
AMC1303Exxx20, AVDD = DVDD = 5.5 V89.65mW
AMC1303Mxxx20, AVDD = DVDD = 5.5 V93.50
PD1Maximum power dissipation
(high-side supply)
AMC1303xxx20, AVDD = 5.5 V53.90mW
PD2Maximum power dissipation
(low-side supply)
AMC1303Exxx20, DVDD = 5.5 V35.75mW
AMC1303Mxxx20, DVDD = 5.5 V39.60

Insulation Specifications

over operating ambient temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSVALUEUNIT
GENERAL
CLRExternal clearance(1)Shortest pin-to-pin distance through air≥ 9mm
CPGExternal creepage(1)Shortest pin-to-pin distance across the package surface≥ 9mm
DTIDistance through insulationMinimum internal gap (internal clearance) of the double insulation
(2 × 0.0105 mm)
≥ 0.021mm
CTIComparative tracking indexDIN EN 60112 (VDE 0303-11); IEC 60112≥ 600V
Material groupAccording to IEC 60664-1I
Overvoltage category
per IEC 60664-1
Rated mains voltage ≤ 300 VRMSI-IV
Rated mains voltage ≤ 600 VRMSI-IV
Rated mains voltage ≤ 1000 VRMSI-III
DIN V VDE V 0884-11 (VDE V 0884-11): 2017-01(2)
VIORM Maximum repetitive peak isolation voltageAt ac voltage (bipolar)2121VPK
VIOWM Maximum-rated isolation working voltageAt ac voltage (sine wave)1500VRMS
At dc voltage2121VDC
VIOTM Maximum transient isolation voltageVTEST = VIOTM, t = 60 s (qualification test)7000VPK
VTEST = 1.2 × VIOTM, t = 1 s (100% production test)8400
VIOSM Maximum surge isolation voltage(3)Test method per IEC 60065, 1.2-μs, 50-μs waveform,
VTEST = 1.6 × VIOSM = 12800 VPK (qualification)
8000VPK
qpd Apparent charge(4)Method a, after input/output safety test subgroup 2 / 3,
Vini = VIOTM, tini = 60 s, Vpd(m) = 1.2 × VIORM = 2545 VPK, tm = 10 s
≤ 5pC
Method a, after environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s, Vpd(m) = 1.6 × VIORM = 3394 VPK, tm = 10 s
≤ 5
Method b1, at routine test (100% production) and type test,
Vini = VIOTM, tini = 1 s, Vpd(m) = 1.875 × VIORM = 3977 VPK, tm = 1 s
≤ 5
CIO Barrier capacitance,
input to output(5)
VIO = 0.5 VPP at 1 MHz~1 pF
RIO Insulation resistance,
input to output(5)
VIO = 500 V at TA = 25°C> 1012 Ω
VIO = 500 V at 100°C ≤ TA ≤ 125°C> 1011 Ω
VIO = 500 V at TS = 150°C> 109 Ω
Pollution degree2
Climatic category40/125/21
UL1577
VISO Withstand isolation voltageVTEST = VISO = 5000 VRMS or 7000 VDC, t = 60 s (qualification),
VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production test)
5000VRMS
Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques such as inserting grooves and ribs on the PCB are used to help increase these specifications.
This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
Apparent charge is electrical discharge caused by a partial discharge (pd).
All pins on each side of the barrier are tied together, creating a two-pin device.

Safety-Related Certifications

VDEUL
Certified according to DIN V VDE V 0884-11 (VDE V 0884-11): 2017-01, DIN EN 60950-1 (VDE 0805 Teil 1): 2014-08, and
DIN EN 60065 (VDE 0860): 2005-11
Recognized under 1577 component recognition and
CSA component acceptance NO 5 programs
Reinforced insulationSingle protection
Certificate number: 40040142File number: E181974

Safety Limiting Values

Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output (I/O) circuitry. A failure of the I/O may allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier, potentially leading to secondary system failures.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
IS Safety input, output, or supply current,
see Figure 3
θJA = 112.2°C/W, VDD1 = VDD2 = 5.5 V,
TJ = 150°C, TA = 25°C
202.5mA
θJA = 112.2°C/W, VDD1 = VDD2 = 3.6 V,
TJ = 150°C, TA = 25°C
309.4
PS Safety input, output, or total power,
see Figure 4
θJA = 112.2°C/W, TJ = 150°C, TA = 25°C1114(1)mW
TS Maximum safety temperature150°C
Input, output, or the sum of input and output power must not exceed this value.

The maximum safety temperature is the maximum junction temperature specified for the device. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of a device installed on a high-K test board for leaded surface-mount packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.

Electrical Characteristics: AMC1303x05x

minimum and maximum specifications apply from TA = –40°C to +125°C, AVDD = 3.0 V to 5.5 V, DVDD = 2.7 V to 5.5 V, AINP = –50 mV to 50 mV, AINN = AGND, and sinc3 filter with OSR = 256 (unless otherwise noted); typical specifications are at TA = 25°C, AVDD = 5 V, and DVDD = 3.3 V.
PARAMETERTEST CONDITIONSMINTYP MAXUNIT
ANALOG INPUTS
VClipping Differential input voltage before clipping outputVIN = AINP – AINN±64mV
FSRSpecified linear differential full-scaleVIN = AINP – AINN–50 50mV
Absolute common-mode input voltage(1)(AINP + AINN) / 2 to AGND–2AVDDV
VCM Operating common-mode input voltage(AINP + AINN) / 2 to AGND–0.032 AVDD – 2.1V
VCMov Common-mode overvoltage detection level(AINP + AINN) / 2 to AGNDAVDD – 2V
Hysteresis of the common-mode overvoltage detection level90mV
CIN Single-ended input capacitanceAINN = AGND 4 pF
CIND Differential input capacitance 2 pF
RIN Single-ended input resistanceAINN = AGND4.75
RIND Differential input resistance 4.9
IIB Input bias currentAINP = AINN = AGND, IIB = IIBP + IIBN–97 –72–57µA
IIO Input offset current ±10 nA
CMTICommon-mode transient immunity 50 100 kV/µs
CMRRCommon-mode rejection ratioAINP = AINN, fIN = 0 Hz, VCM min ≤ VIN ≤ VCM max –99 dB
AINP = AINN, fIN from 0.1 Hz to 50 kHz, VCM min ≤ VIN ≤ VCM max –98
PSRRPower-supply rejection ratioAINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V,
at dc
–108 dB
AINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V,
10 kHz, 100-mV ripple
–107
BWInput bandwidth(2) AMC1303x0510 430 kHz
AMC1303x0520 800
DC ACCURACY
DNLDifferential nonlinearityResolution: 16 bits–0.99 0.99LSB
INLIntegral nonlinearity(3)Resolution: 16 bits–4 ±14LSB
EO Offset error Initial, at TA = 25°C, AINP = AINN = AGND–50 ±2.550µV
TCEO Offset error thermal drift(4) –1±0.25 1µV/°C
EG Gain error Initial, at TA = 25°C–0.2% ±0.005%0.2%
TCEG Gain error thermal drift(5) –40±2040ppm/°C
AC ACCURACY
SNRSignal-to-noise ratioAMC1303x0510, fIN = 35 Hz8184 dB
AMC1303x0520, fIN = 35 Hz7983
THDTotal harmonic distortionfIN = 35 Hz–97–86 dB
SFDRSpurious-free dynamic rangeAMC1303x0510, fIN = 35 Hz96dB
AMC1303x0520, fIN = 35 Hz97
DIGITAL OUTPUTS (CMOS Logic)
CLOAD Output load capacitance30pF
VOH High-level output voltageIOH = –20 µA DVDD – 0.1V
IOH = –4 mA DVDD – 0.4
VOL Low-level output voltageIOL = 20 µA 0.1V
IOL = 4 mA 0.4
POWER SUPPLY
IAVDDHigh-side supply currentAMC1303x0510, 3.0 V ≤ AVDD ≤ 3.6 V5.47.3mA
AMC1303x0510, 4.5 V ≤ AVDD ≤ 5.5 V6.08.0
AMC1303x0520, 3.0 V ≤ AVDD ≤ 3.6 V6.38.5
AMC1303x0520, 4.5 V ≤ AVDD ≤ 5.5 V7.29.8
IDVDDController-side supply currentAMC1303E0510, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
3.34.5mA
AMC1303E0510, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
3.65.0
AMC1303M0510, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
3.54.7
AMC1303M0510, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
3.95.4
AMC1303E0520, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
4.15.5
AMC1303E0520, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
4.76.5
AMC1303M0520, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
4.66.0
AMC1303M0520, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
5.47.2
Steady-state voltage supported by the device in case of a system failure. See the specified common-mode input voltage VCM for normal operation. Observe analog input voltage range as specified in the Absolute Maximum Ratings table.
This parameter is the –3-dB, second-order, roll-off frequency of the integrated differential input amplifier to consider for antialiasing filter designs.
Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR.
Offset error drift is calculated using the box method as described by the following equation: AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 ec_eodrift_bas654.gif .
Gain error drift is calculated using the box method as described by the following equation: AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 ec_egdrift_bas654.gif .

Electrical Characteristics: AMC1303x25x

minimum and maximum specifications apply from TA = –40°C to +125°C, AVDD = 3.0 V to 5.5 V, DVDD = 2.7 V to 5.5 V, AINP = –250 mV to 250 mV, AINN = AGND, and sinc3 filter with OSR = 256 (unless otherwise noted); typical specifications are at TA = 25°C, AVDD = 5 V, and DVDD = 3.3 V
PARAMETERTEST CONDITIONSMINTYP MAXUNIT
ANALOG INPUTS
VClipping Differential input voltage before clipping outputVIN = AINP – AINN±320mV
FSRSpecified linear differential full-scaleVIN = AINP – AINN–250 250mV
Absolute common-mode input voltage(1)(AINP + AINN) / 2 to AGND–2AVDDV
VCM Operating common-mode input voltage(AINP + AINN) / 2 to AGND–0.16 AVDD – 2.1V
VCMov Common-mode overvoltage detection level(AINP + AINN) / 2 to AGNDAVDD – 2V
Hysteresis of common-mode overvoltage detection level90mV
CIN Single-ended input capacitanceAINN = AGND 2 pF
CIND Differential input capacitance 1 pF
RIN Single-ended input resistanceAINN = AGND19
RIND Differential input resistance 22
IIB Input bias currentAINP = AINN = AGND, IIB = IIBP + IIBN–82 –60–48µA
IIO Input offset current ±5 nA
CMTICommon-mode transient immunity 50100 kV/µs
CMRRCommon-mode rejection ratioAINP = AINN, fIN = 0 Hz,
VCM min ≤ VIN ≤ VCM max
–98 dB
AINP = AINN, fIN from 0.1 Hz to 50 kHz,
VCM min ≤ VIN ≤ VCM max
–98
PSRRPower-supply rejection ratioAINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V,
at dc
–97 dB
AINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V,
10-kHz, 100-mV ripple
–94.5
BWInput bandwidth(2) AMC1303x2510 510 kHz
AMC1303x2520 900
DC ACCURACY
DNLDifferential nonlinearityResolution: 16 bits–0.99 0.99LSB
INLIntegral nonlinearity(3)Resolution: 16 bits–4 ±14LSB
EO Offset error Initial, at TA = 25°C, AINP = AINN = AGND–100 ±4.5100µV
TCEO Offset error thermal drift(4) –1±0.15 1μV/°C
EG Gain error Initial, at TA = 25°C–0.2% –0.005%0.2%
TCEG Gain error thermal drift(5) –40±2040ppm/°C
AC ACCURACY
SNRSignal-to-noise ratioAMC1303x2510, fIN = 35 Hz85 87 dB
AMC1303x2520, fIN = 35 Hz84.5 86.5
THDTotal harmonic distortionAMC1303x2510, fIN = 35 Hz –97–86dB
AMC1303x2520, fIN = 35 Hz –101–86
SFDRSpurious-free dynamic rangefIN = 35 Hz 98 dB
DIGITAL OUTPUTS (CMOS LOGIC)
CLOAD Output load capacitance30pF
VOH High-level output voltageIOH = –20 µA DVDD – 0.1V
IOH = –4 mA DVDD – 0.4
VOL Low-level output voltageIOL = 20 µA 0.1V
IOL = 4 mA 0.4
POWER SUPPLY
IAVDDHigh-side supply currentAMC1303x2510, 3.0 V ≤ AVDD ≤ 3.6 V5.47.3mA
AMC1303x2510, 4.5 V ≤ AVDD ≤ 5.5 V6.08.0
AMC1303x2520, 3.0 V ≤ AVDD ≤ 3.6 V6.38.5
AMC1303x2520, 4.5 V ≤ AVDD ≤ 5.5 V7.29.8
IDVDDController-side supply currentAMC1303E2510, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
3.34.5mA
AMC1303E2510, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
3.65.0
AMC1303M2510, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
3.54.7
AMC1303M2510, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
3.95.4
AMC1303E2520, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
4.15.5
AMC1303E2520, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
4.76.5
AMC1303M2520, 2.7 V ≤ DVDD ≤ 3.6 V,
CLOAD = 15 pF
4.66.0
AMC1303M2520, 4.5 V ≤ DVDD ≤ 5.5 V,
CLOAD = 15 pF
5.47.2
Steady-state voltage supported by the device in case of a system failure. See the specified common-mode input voltage VCM for normal operation. Observe analog input voltage range as specified in the Absolute Maximum Ratings table.
This parameter is the –3-dB, second-order, roll-off frequency of the integrated differential input amplifier to consider for antialiasing filter designs.
Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR.
Offset error drift is calculated using the box method as described by the following equation: AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 ec_eodrift_bas654.gif .
Gain error drift is calculated using the box method as described by the following equation: AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 ec_egdrift_bas654.gif

Switching Characteristics

over operating ambient temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
fCLKInternal clock frequency,
on the CLKOUT pin of the AMC1303Mx only
AMC1303Mxx10 9.6 10 10.4 MHz
AMC1303Mxx20 19.2 20 20.8
Duty CycleInternal clock duty cycle(1),
on the CLKOUT pin of the AMC1303Mx only
45%50%55%
thDOUT hold time after rising edge of CLKOUTAMC1303Mx, CLOAD = 15 pF7ns
tdDOUT delay time after rising edge of CLKOUTAMC1303Mx, CLOAD = 15 pF15ns
trDOUT, CLKOUT rise time10% to 90%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF0.83.5ns
10% to 90%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF1.83.9
tfDOUT, CLKOUT fall time90% to 10%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF0.83.5ns
90% to 10%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF1.83.9
tASTART Analog startup timeAVDD step to 3.0 V with DVDD ≥ 2.7 V0.5ms
Duty cycle values are specified by design.
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 tim_int_bas771.gif Figure 1. AMC1303Mx Digital Interface Timing
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 tim_start_bas771.gif Figure 2. Digital Interface Startup Timing

Insulation Characteristics Curves

AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D001_SBAS734.gif
Figure 3. Thermal Derating Curve for Safety-Limiting Current per VDE
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 tddb_curve_reinforced_dw.gif
TA up to 150°C, stress-voltage frequency = 60 Hz,
isolation working voltage = 1500 VRMS, operating lifetime = 135 years
Figure 5. Reinforced Isolation Capacitor Lifetime Projection
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D002_SBAS734.gif
Figure 4. Thermal Derating Curve for Safety-Limiting
Power per VDE

Typical Characteristics

at TA = 25°C, AVDD = 5 V, DVDD = 3.3 V, AINP = –50 mV to 50 mV (AMC1303x05x) or –250 mV to 250 mV (AMC1303x25x), AINN = AGND, and sinc3 filter with OSR = 256 (unless otherwise noted)
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D003_SBAS734.gif
Figure 6. Maximum Operating Common-Mode Input Voltage vs High-Side Supply Voltage
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D005_SBAS734.gif
Figure 8. Input Bias Current vs
Common-Mode Input Voltage
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D012_SBAS771.gif
Figure 10. Power-Supply Rejection Ratio vs
Ripple Frequency
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D008_SBAS771.gif
Figure 12. Offset Error vs High-Side Supply Voltage
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D010_SBAS771.gif
Figure 14. Gain Error vs High-Side Supply Voltage
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D013_SBAS771.gif
Capture time = 105 ms
Figure 16. Signal-to-Noise Ratio vs High-Side Supply Voltage
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D015_SBAS771.gif
Capture time = 105 ms
Figure 18. Signal-to-Noise Ratio vs Input Signal Frequency
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D037_SBAS771.gif
AMC1303x05x, capture time = 105 ms
Figure 20. Signal-to-Noise Ratio vs Input Signal Amplitude
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Capture time = 839 ms
Figure 22. Total Harmonic Distortion vs Temperature
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AMC1303x25x, capture time = 839 ms
Figure 24. Total Harmonic Distortion vs
Input Signal Amplitude
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D021_SBAS771.gif
Capture time = 105 ms
Figure 26. Spurious-Free Dynamic Range vs
High-Side Supply Voltage
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Capture time = 105 ms
Figure 28. Spurious-Free Dynamic Range vs
Input Signal Frequency
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AMC1303x05x, capture time = 105 ms
Figure 30. Spurious-Free Dynamic Range vs
Input Signal Amplitude
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AMC1303x0520, capture time = 839 ms, VIN = 100 mVPP
Figure 32. Frequency Spectrum With 35-Hz Input Signal
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AMC1303x2520, capture time = 839 ms, VIN = 500 mVPP
Figure 34. Frequency Spectrum With 35-Hz Input Signal
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Figure 36. High-Side Supply Current vs Temperature
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DVDD = 3.3 V
Figure 38. Controller-Side Supply Current vs Temperature
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AMC1303Mxx10
Figure 40. Output Clock Frequency vs Temperature
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Figure 7. Common-Mode Overvoltage Detection Level vs Temperature
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Figure 9. Common-Mode Rejection Ratio vs
Input Signal Frequency
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Figure 11. Integral Nonlinearity vs Temperature
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Figure 13. Offset Error vs Temperature
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Figure 15. Gain Error vs Temperature
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Capture time = 105 ms
Figure 17. Signal-to-Noise Ratio vs Temperature
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AMC1303x25x, capture time = 105 ms
Figure 19. Signal-to-Noise Ratio vs Input Signal Amplitude
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D017_SBAS771.gif
Capture time = 839 ms
Figure 21. Total Harmonic Distortion vs
High-Side Supply Voltage
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D019_SBAS771.gif
Capture time = 839 ms
Figure 23. Total Harmonic Distortion vs
Input Signal Frequency
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D038_SBAS771.gif
AMC1303x05x, capture time = 839 ms
Figure 25. Total Harmonic Distortion vs
Input Signal Amplitude
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Capture time = 105 ms
Figure 27. Spurious-Free Dynamic Range vs Temperature
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AMC1303x25x, capture time = 105 ms
Figure 29. Spurious-Free Dynamic Range vs
Input Signal Amplitude
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AMC1303x0510, capture time = 839 ms, VIN = 100 mVPP
Figure 31. Frequency Spectrum With 35-Hz Input Signal
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AMC1303x2510, capture time = 839 ms, VIN = 500 mVPP
Figure 33. Frequency Spectrum With 35-Hz Input Signal
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Figure 35. High-Side Supply Current vs
High-Side Supply Voltage
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Figure 37. Controller-Side Supply Current vs
Controller-Side Supply Voltage
AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 D031_SBAS771.gif
DVDD = 5 V
Figure 39. Controller-Side Supply Current vs Temperature
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AMC1303Mxx20
Figure 41. Output Clock Frequency vs Temperature