SLUSCA6B March   2016  – March 2017

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Feature Description
      1. 9.2.1  Device Power-On-Reset (POR)
      2. 9.2.2  Device Power Up from Battery without Input Source
      3. 9.2.3  Device Power Up from Input Source
        1. 9.2.3.1 Power Up REGN Regulation (LDO)
        2. 9.2.3.2 Poor Source Qualification
        3. 9.2.3.3 Input Source Type Detection
          1. 9.2.3.3.1 D+/D- Detection Sets Input Current Limit (bq25898D)
          2. 9.2.3.3.2 PSEL Pin Sets Input Current Limit (bq25898)
          3. 9.2.3.3.3 Force Input Current Limit Detection
        4. 9.2.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 9.2.3.5 Converter Power-Up
      4. 9.2.4  Input Current Optimizer (ICO)
      5. 9.2.5  Boost Mode Operation from Battery
      6. 9.2.6  Power Path Management
        1. 9.2.6.1 Narrow VDC Architecture
        2. 9.2.6.2 Dynamic Power Management
        3. 9.2.6.3 Supplement Mode
      7. 9.2.7  Battery Charging Management
        1. 9.2.7.1 Autonomous Charging Cycle
        2. 9.2.7.2 Battery Charging Profile
        3. 9.2.7.3 Charging Termination
        4. 9.2.7.4 Resistance Compensation (IRCOMP)
        5. 9.2.7.5 Thermistor Qualification
          1. 9.2.7.5.1 JEITA Guideline Compliance in Charge Mode
          2. 9.2.7.5.2 Cold/Hot Temperature Window in Boost Mode
        6. 9.2.7.6 Charging Safety Timer
      8. 9.2.8  Battery Monitor
      9. 9.2.9  Status Outputs (PG, STAT, and INT)
        1. 9.2.9.1 Power Good Indicator (PG)
        2. 9.2.9.2 Charging Status Indicator (STAT)
        3. 9.2.9.3 Interrupt to Host (INT)
      10. 9.2.10 BATFET (Q4) Control
        1. 9.2.10.1 BATFET Disable Mode (Shipping Mode)
        2. 9.2.10.2 BATFET Enable (Exit Shipping Mode)
        3. 9.2.10.3 BATFET Full System Reset
      11. 9.2.11 Current Pulse Control Protocol
      12. 9.2.12 Input Current Limit on ILIM
      13. 9.2.13 Thermal Regulation and Thermal Shutdown
        1. 9.2.13.1 Thermal Protection in Buck Mode
          1. 9.2.13.1.1 Thermal Protection in Boost Mode
      14. 9.2.14 Voltage and Current Monitoring in Buck and Boost Mode
        1. 9.2.14.1 Voltage and Current Monitoring in Buck Mode
          1. 9.2.14.1.1 Input Overvoltage (ACOV)
          2. 9.2.14.1.2 System Overvoltage Protection (SYSOVP)
        2. 9.2.14.2 Voltage and Current Monitoring in Boost Mode
          1. 9.2.14.2.1 VBUS Overcurrent Protection
          2. 9.2.14.2.2 Boost Mode Overvoltage Protection
      15. 9.2.15 Battery Protection
        1. 9.2.15.1 Battery Overvoltage Protection (BATOVP)
        2. 9.2.15.2 Battery Over-Discharge Protection
        3. 9.2.15.3 System Overcurrent Protection
      16. 9.2.16 Serial Interface
        1. 9.2.16.1 Data Validity
        2. 9.2.16.2 START and STOP Conditions
        3. 9.2.16.3 Byte Format
        4. 9.2.16.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 9.2.16.5 Slave Address and Data Direction Bit
        6. 9.2.16.6 Single Read and Write
        7. 9.2.16.7 Multi-Read and Multi-Write
    3. 9.3 Device Functional Modes
      1. 9.3.1 Host Mode and Default Mode
    4. 9.4 Register Map
      1. 9.4.1  REG00
      2. 9.4.2  REG01
      3. 9.4.3  REG02
      4. 9.4.4  REG03
      5. 9.4.5  REG04
      6. 9.4.6  REG05
      7. 9.4.7  REG06
      8. 9.4.8  REG07
      9. 9.4.9  REG08
      10. 9.4.10 REG09
      11. 9.4.11 REG0A
      12. 9.4.12 REG0B
      13. 9.4.13 REG0C
      14. 9.4.14 REG0D
      15. 9.4.15 REG0E
      16. 9.4.16 REG0F
      17. 9.4.17 REG10
      18. 9.4.18 REG11
      19. 9.4.19 REG12
      20. 9.4.20 REG13
      21. 9.4.21 REG14
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application Diagram
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
        2. 10.2.2.2 Buck Input Capacitor
        3. 10.2.2.3 System Output Capacitor
      3. 10.2.3 Application Curves
    3. 10.3 System Example
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YFF|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • High Efficiency 4-A, 1.5-MHz Switch Mode Buck Charge
    • 92% Charge Efficiency at 3 A and 91% Charge Efficiency at 4 A Charge Current
    • Optimize for High Voltage Input (9 V / 12 V)
    • Low Power PFM mode for Light Load Operations
  • USB On-the-Go (OTG) with Adjustable Output from 4.5 V to 5.5 V
    • Selectable 500-KHz / 1.5-MHz Boost Converter with up-to 2.4 A Output
    • 94% Boost Efficiency at 5 V at 1 A Output
    • Accurate Hiccup Mode Overcurent Protection
  • Single Input to Support USB Input and Adjustable High Voltage Adapters
    • Support 3.9-V to 14-V Input Voltage Range
    • Input Current Limit (100 mA to 3.25 A with 50-mA resolution) to Support USB2.0, USB3.0 standard and High Voltage Adapters
    • Maximum Power Tracking by Input Voltage Limit up-to 14V for Wide Range of Adapters
    • Auto Detect USB SDP, CDP, DCP, and Non-Standard Adapters (bq25898)
    • Programmable D+/D- Drivers for Non-Standard Adapter Handshake
  • Remote Battery Sensing
  • Input Current Optimizer (ICO) to Maximize Input Power without Overloading Adapters
  • Resistance Compensation (IRCOMP) from Charger Output to Cell Terminal
  • Highest Battery Discharge Efficiency with 5-mΩ Battery Discharge MOSFET up to 9 A
  • Integrated ADC for System Monitor
    (Voltage, Temperature, Charge Current)
  • Narrow VDC (NVDC) Power Path Management
    • Instant-on Works with No Battery or Deeply Discharged Battery
    • Ideal Diode Operation in Battery Supplement Mode
  • BATFET Control to Support Ship Mode, Wake Up, and Full System Reset
  • Flexible Autonomous and I2C Mode for Optimal System Performance
  • High Integration includes all MOSFETs, Current Sensing and Loop Compensation
  • 12-µA Low Battery Leakage Current to Support Ship Mode
  • High Accuracy
    • ±0.5% Charge Voltage Regulation
    • ±5% Charge Current Regulation
    • ±7.5% Input Current Regulation
  • Safety
    • Battery Temperature Sensing for Charge and Boost Mode
    • Thermal Regulation and Thermal Shutdown
  • Available in 2.8-mm x 2.5-mm 42-Ball DSBGA Package

2 Applications

  • Smart Phone
  • Tablet PC
  • Portable Internet Devices

3 Description

The bq25898, bq25898D are highly-integrated 4-A switch-mode battery charge management and system power path management devices for single cell Li-Ion and Li-polymer battery. The devices support high input voltage fast charging.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
bq25898 DSBGA (42) 2.80 mm x 2.50 mm
bq25898D DSBGA (42) 2.80 mm x 2.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

bq25898 bq25898D fp_circuit2_slusca6.gif

4 Revision History

Changes from A Revision (December 2016) to B Revision

  • Full data sheet to product folder Go

Changes from * Revision (March 2016) to A Revision