SLUSCA6B March 2016  – March 2017


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1Absolute Maximum Ratings
    2. 8.2ESD Ratings
    3. 8.3Recommended Operating Conditions
    4. 8.4Thermal Information
    5. 8.5Electrical Characteristics
    6. 8.6Timing Requirements
    7. 8.7Typical Characteristics
  9. Detailed Description
    1. 9.1Functional Block Diagram
    2. 9.2Feature Description
      1. 9.2.1 Device Power-On-Reset (POR)
      2. 9.2.2 Device Power Up from Battery without Input Source
      3. 9.2.3 Device Power Up from Input Source
        1. Up REGN Regulation (LDO)
        2. Source Qualification
        3. Source Type Detection
          1. Detection Sets Input Current Limit (bq25898D)
          2. Pin Sets Input Current Limit (bq25898)
          3. Input Current Limit Detection
        4. Voltage Limit Threshold Setting (VINDPM Threshold)
        5. Power-Up
      4. 9.2.4 Input Current Optimizer (ICO)
      5. 9.2.5 Boost Mode Operation from Battery
      6. 9.2.6 Power Path Management
        1. VDC Architecture
        2. Power Management
        3. Mode
      7. 9.2.7 Battery Charging Management
        1. Charging Cycle
        2. Charging Profile
        3. Termination
        4. Compensation (IRCOMP)
        5. Qualification
          1. Guideline Compliance in Charge Mode
          2. Temperature Window in Boost Mode
        6. Safety Timer
      8. 9.2.8 Battery Monitor
      9. 9.2.9 Status Outputs (PG, STAT, and INT)
        1. Good Indicator (PG)
        2. Status Indicator (STAT)
        3. to Host (INT)
      10. 9.2.10BATFET (Q4) Control
        1. Disable Mode (Shipping Mode)
        2. Enable (Exit Shipping Mode)
        3. Full System Reset
      11. 9.2.11Current Pulse Control Protocol
      12. 9.2.12Input Current Limit on ILIM
      13. 9.2.13Thermal Regulation and Thermal Shutdown
        1. Protection in Buck Mode
          1. Protection in Boost Mode
      14. 9.2.14Voltage and Current Monitoring in Buck and Boost Mode
        1. and Current Monitoring in Buck Mode
          1. Overvoltage (ACOV)
          2. Overvoltage Protection (SYSOVP)
        2. and Current Monitoring in Boost Mode
          1. Overcurrent Protection
          2. Mode Overvoltage Protection
      15. 9.2.15Battery Protection
        1. Overvoltage Protection (BATOVP)
        2. Over-Discharge Protection
        3. Overcurrent Protection
      16. 9.2.16Serial Interface
        1. Validity
        2. and STOP Conditions
        3. Format
        4. (ACK) and Not Acknowledge (NACK)
        5. Address and Data Direction Bit
        6. Read and Write
        7. and Multi-Write
    3. 9.3Device Functional Modes
      1. 9.3.1Host Mode and Default Mode
    4. 9.4Register Map
      1. 9.4.1 REG00
      2. 9.4.2 REG01
      3. 9.4.3 REG02
      4. 9.4.4 REG03
      5. 9.4.5 REG04
      6. 9.4.6 REG05
      7. 9.4.7 REG06
      8. 9.4.8 REG07
      9. 9.4.9 REG08
      10. 9.4.10REG09
      11. 9.4.11REG0A
      12. 9.4.12REG0B
      13. 9.4.13REG0C
      14. 9.4.14REG0D
      15. 9.4.15REG0E
      16. 9.4.16REG0F
      17. 9.4.17REG10
      18. 9.4.18REG11
      19. 9.4.19REG12
      20. 9.4.20REG13
      21. 9.4.21REG14
  10. 10Application and Implementation
    1. 10.1Application Information
    2. 10.2Typical Application Diagram
      1. 10.2.1Design Requirements
      2. 10.2.2Detailed Design Procedure
        1. Selection
        2. Input Capacitor
        3. Output Capacitor
      3. 10.2.3Application Curves
    3. 10.3System Example
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1Layout Guidelines
    2. 12.2Layout Example
  13. 13Device and Documentation Support
    1. 13.1Device Support
      1. 13.1.1Third-Party Products Disclaimer
    2. 13.2Related Links
    3. 13.3Receiving Notification of Documentation Updates
    4. 13.4Community Resources
    5. 13.5Trademarks
    6. 13.6Electrostatic Discharge Caution
    7. 13.7Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YFF|42
Orderable Information

Description (Continued)

The low impedance power path optimizes switch-mode operation efficiency, reduces battery charging time and extends battery life during discharging phase. The I2C Serial interface with charging and system settings makes the device a truly flexible solution.

The bq25898/98D is a highly-integrated 4-A switch-mode battery charge management and system power path management device for single cell Li-Ion and Li-polymer battery. It features fast charging with high input voltage support for a wide range of smartphone, tablet and portable devices. Its low impedance power path optimizes switch-mode operation efficiency, reduces battery charging time and extends battery life during discharging phase. It also integrates Input Current Optimizer (ICO) and Resistance Compensation (IRCOMP) to deliver maximum charging power to battery. The solution is highly integrated with input reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and battery FET (BATFET, Q4) between system and battery. It also integrates the bootstrap diode for the high-side gate drive and battery monitor for simplified system design. The I2C serial interface with charging and system settings makes the device a truly flexible solution.

The device supports a wide range of input sources, including standard USB host port, USB charging port, and USB compliant adjustable high voltage adapter. To support fast charging using adjustable high voltage adapter, the bq25898D provides support for MaxCharge™ handshake using D+/D- pins and DSEL pin for USB switch control. In addition, both bq25898D and bq25898 include interface to support adjustable high voltage adapter using input current pulse protocol. To set the default input current limit, device uses the built-in USB interface (bq25898D) or takes the result from detection circuit in the system (bq25898), such as USB PHY device. The device is compliant with USB 2.0 and USB 3.0 power spec with input current and voltage regulation. In addition, the Input Current Optimizer (ICO) supports the detection of maximum power point detection of the input source without overload. The device also meets USB On-the-Go (OTG) operation power rating specification by supplying 5 V (Adjustable 4.5V-5.5V) on VBUS with current limit up to 2.4 A.

The power path management regulates the system slightly above battery voltage but does not drop below 3.5V minimum system voltage (programmable). With this feature, the system maintains operation even when the battery is completely depleted or removed. When the input current limit or voltage limit is reached, the power path management automatically reduces the charge current to zero. As the system load continues to increase, the power path discharges the battery until the system power requirement is met. This operation prevents overloading the input source.

The device initiates and completes a charging cycle without software control. It automatically detects the battery voltage and charges the battery in three phases: pre-conditioning, constant current and constant voltage. At the end of the charging cycle, the charger automatically terminates when the charge current is below a preset limit in the constant voltage phase. When the full battery falls below the recharge threshold, the charger will automatically start another charging cycle.

The charger provides various safety features for battery charging and system operations, including battery temperature negative thermistor monitoring, charging safety timer and overvoltage/overcurrent protections. The thermal regulation reduces charge current when the junction temperature exceeds 120°C (programmable). The STAT output reports the charging status and any fault conditions. The PG output (bq25898) indicates if a good power source is present. The INT immediately notifies host when fault occurs.

The device also provides a 7-bit analog-to-digital converter (ADC) for monitoring charge current and input/battery/system (VBUS, BAT, SYS, TS) voltages. The QON pin provides BATFET enable/reset control to exit low power ship mode or full system reset function.

The devices are available in a 42-ball, 2.8 mm x 2.5 mm DSBGA package.