Product details

Architecture Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12.6 GBW (typ) (MHz) 1000 BW at Acl (MHz) 1000 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 8000 Vn at flatband (typ) (nV√Hz) 4.8 Vn at 1 kHz (typ) (nV√Hz) 5.9 Iq per channel (typ) (mA) 5.8 Vos (offset voltage at 25°C) (max) (mV) 30 Rail-to-rail No Rating Catalog Operating temperature range (°C) -45 to 85 Input bias current (max) (pA) 7000000 Offset drift (typ) (µV/°C) 125 Iout (typ) (mA) 60 2nd harmonic (dBc) 76 3rd harmonic (dBc) 98 Frequency of harmonic distortion measurement (MHz) 5
Architecture Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12.6 GBW (typ) (MHz) 1000 BW at Acl (MHz) 1000 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 8000 Vn at flatband (typ) (nV√Hz) 4.8 Vn at 1 kHz (typ) (nV√Hz) 5.9 Iq per channel (typ) (mA) 5.8 Vos (offset voltage at 25°C) (max) (mV) 30 Rail-to-rail No Rating Catalog Operating temperature range (°C) -45 to 85 Input bias current (max) (pA) 7000000 Offset drift (typ) (µV/°C) 125 Iout (typ) (mA) 60 2nd harmonic (dBc) 76 3rd harmonic (dBc) 98 Frequency of harmonic distortion measurement (MHz) 5
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Wide Bandwidth: 1000MHz
  • High Slew Rate: 8000V/µs
  • Flexible Supply Range:
    ±1.4V to ±6.3V Dual Supplies
    +2.8V to +12.6V Single Supply
  • Output Current: 60mA (continuous)
  • Peak Output Current: 350mA
  • Low Quiescent Current: 5.8mA
  • Standard Buffer Pinout
  • Optional Mid-Supply Reference Buffer
  • APPLICATIONS
    • Low Impedance Reference Buffers
    • Clock Distribution Circuits
    • Video/Broadcast Equipment
    • Communications Equipment
    • High-Speed Data Acquisition
    • Test Equipment and Instrumentation

All other trademarks are the property of their respective owners.

  • Wide Bandwidth: 1000MHz
  • High Slew Rate: 8000V/µs
  • Flexible Supply Range:
    ±1.4V to ±6.3V Dual Supplies
    +2.8V to +12.6V Single Supply
  • Output Current: 60mA (continuous)
  • Peak Output Current: 350mA
  • Low Quiescent Current: 5.8mA
  • Standard Buffer Pinout
  • Optional Mid-Supply Reference Buffer
  • APPLICATIONS
    • Low Impedance Reference Buffers
    • Clock Distribution Circuits
    • Video/Broadcast Equipment
    • Communications Equipment
    • High-Speed Data Acquisition
    • Test Equipment and Instrumentation

All other trademarks are the property of their respective owners.

The BUF602 is a closed-loop buffer recommended for a wide range of applications. Its wide bandwidth (1000MHz) and high slew rate (8000V/µs) make it ideal for buffering very high-frequency signals. For AC-coupled applications, an optional mid-point reference (VREF) is provided, reducing the number of external components required and the necessary supply current to provide that reference.

The BUF602 is available in a standard SO-8 surface-mount package and in an SOT23-5 where a smaller footprint is needed.

The BUF602 is a closed-loop buffer recommended for a wide range of applications. Its wide bandwidth (1000MHz) and high slew rate (8000V/µs) make it ideal for buffering very high-frequency signals. For AC-coupled applications, an optional mid-point reference (VREF) is provided, reducing the number of external components required and the necessary supply current to provide that reference.

The BUF602 is available in a standard SO-8 surface-mount package and in an SOT23-5 where a smaller footprint is needed.

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Technical documentation

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Type Title Date
* Data sheet High-Speed, Closed-Loop Buffer datasheet (Rev. B) 22 May 2008
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
User guide DEM-BUF-SO-1A Demonstration Fixture (Rev. B) 12 Apr 2012
User guide DEM-BUF-SOT-1A User's Guide (Rev. A) 22 Apr 2011
User guide DEM-BUF-SO-1A Demonstration Fixture (Rev. A) 28 Mar 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DEM-BUF-SO-1A — DEM-BUF-SO-1A

<p>The <b>DEM-BUF-SO-1A</b> demonstration fixture helps designers evaluate the operation and performance of TI's high speed, closed-loop buffers. This unpopulated PC board is compatible with products offered in the 8-lead SOIC (D) package.</p>

<p>For more information on this type of buffer (...)

User guide: PDF
Not available on TI.com
Evaluation board

DEM-BUF-SOT-1A — DEM-BUF-SOT-1A

User guide: PDF
Not available on TI.com
Simulation model

BUF602 PSpice Model (Rev. B)

SBOJ002B.ZIP (39 KB) - PSpice Model
Simulation model

BUF602 TINA-TI Reference Design

SBOMA37.TSC (2972 KB) - TINA-TI Reference Design
Simulation model

BUF602 TINA-TI Spice Model

SBOMA38.ZIP (6 KB) - TINA-TI Spice Model
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Calculation tool

VOLT-DIVIDER-CALC — Voltage divider calculation tool

The voltage divider calculation tool (VOLT-DIVIDER-CALC) quickly determines a set of resistors for a voltage divider. This KnowledgeBase JavaScript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. VOLT-DIVIDER-CALC can also be used to (...)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins Download
SOIC (D) 8 View options
SOT-23 (DBV) 5 View options

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