CD4007UB types are comprised of three n-channel and three p-channel enhancement-type MOS transistors. The transistor elements are accessible through the package terminals to provide a convenient means for constructing the various typical circuits as shown in Fig. 2.
More complex functions are possible using multiple packages. Numbers shown in parentheses indicate terminals that are connected together to form the various configurations listed.
The CD4007UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Data sheet acquired from Harris Semiconductor
|VCC (Min) (V)|
|VCC (Max) (V)|
|Inputs per channel|
|IOL (Max) (mA)|
|IOH (Max) (mA)|
|Data rate (Max) (Mbps)|
|Operating temperature range (C)|
|Package size: mm2:W x L (PKG)|
|Standard Speed (tpd > 50ns)|
|-55 to 125|
PDIP | 14
SOIC | 14
SO | 14
TSSOP | 14
See datasheet (PDIP)
14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)