Product details

Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Catalog
Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOP (NS) 16 79.56 mm² 10.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Very low power consumption:
       70 µW (typ.) at VCO fo = 10 kHz, VDD = 5 V
  • Operating frequency range up to 1.4 MHz (typ.) at VDD = 10 V, RI = 5 k
  • Low frequency drift: 0.04%/°C (typ.) at VDD = 10 V
  • Choice of two phase comparators:
    • Exclusive-OR network (I)
    • Edge-controlled memory network with phase-pulse output for lock indication (II)
  • High VCO linearity: <1% (typ.) at VDD = 10 V
  • VCO inhibit control for ON-OFF keying and ultra-low standby power consumption
  • Source-follower output of VCO control input (Demod. output)
  • Zener diode to assist supply regulation
  • Standardized, symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications
    • FM demodulator and modulator
    • Frequency synthesis and multiplication
    • Frequency discriminator
    • Data synchronization
    • Voltage-to-frequency conversion
    • Tone decoding
    • FSK - Modems
    • Signal conditioning
    • (See ICAN-6101) "RCA COS/MOS Phase-Locked Loop - A Versatile Building Block for Micropower Digital and Analog Applications"
  • Very low power consumption:
       70 µW (typ.) at VCO fo = 10 kHz, VDD = 5 V
  • Operating frequency range up to 1.4 MHz (typ.) at VDD = 10 V, RI = 5 k
  • Low frequency drift: 0.04%/°C (typ.) at VDD = 10 V
  • Choice of two phase comparators:
    • Exclusive-OR network (I)
    • Edge-controlled memory network with phase-pulse output for lock indication (II)
  • High VCO linearity: <1% (typ.) at VDD = 10 V
  • VCO inhibit control for ON-OFF keying and ultra-low standby power consumption
  • Source-follower output of VCO control input (Demod. output)
  • Zener diode to assist supply regulation
  • Standardized, symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications
    • FM demodulator and modulator
    • Frequency synthesis and multiplication
    • Frequency discriminator
    • Data synchronization
    • Voltage-to-frequency conversion
    • Tone decoding
    • FSK - Modems
    • Signal conditioning
    • (See ICAN-6101) "RCA COS/MOS Phase-Locked Loop - A Versatile Building Block for Micropower Digital and Analog Applications"

CD4046B CMOS Micropower Phase-Locked Loop (PLL) consists of a low-power, linear voltage-controlled oscillator (VCO) and two different phase comparators having a common signal-input amplifier and a common comparator input. A 5.2-V zener diode is provided for supply regulation if necessary.

The CD4046B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4046B CMOS Micropower Phase-Locked Loop (PLL) consists of a low-power, linear voltage-controlled oscillator (VCO) and two different phase comparators having a common signal-input amplifier and a common comparator input. A 5.2-V zener diode is provided for supply regulation if necessary.

The CD4046B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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Technical documentation

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Type Title Date
* Data sheet CD4046B TYPES datasheet (Rev. B) 27 Jun 2003
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note CD4046B Phase-Locked Loop (Rev. A) 01 Feb 2002
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 Dec 2001

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Package Pins Download
PDIP (N) 16 View options
SOP (NS) 16 View options
TSSOP (PW) 16 View options

Ordering & quality

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  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

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