The HC75 and HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.
Data sheet acquired from Harris Semiconductor
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Bits (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||IOL (Max) (mA)||IOH (Max) (mA)||3-state output||Operating temperature range (C)|
||HCT||4.5||5.5||4||5||25||0.04||35||4||-4||No||-55 to 125|
|CD54HCT75||Samples not available||HCT||4.5||5.5||4||4.5||25||0.04||35||4||-4||No||-55 to 125|